Hi,
We are in the design phase of a handheld device with OMAP L138.
We are planning to derive an FPGA and TLV320AIC12K from the output clock of OMAPL138. Input clock source for OMAP is 24 Mhz.
My questions:
1.is it ok to feed the clock out (OBSCLK) to both FPGA and TLV320AIC12K with some buffer.
2. Is is ok to feed 24 Mhz instead of 24.5 Mhz for the chip TLV320AIC12K. The LogicPD reference design uses separate 24.5 Mhz clock.
3. Any other clock output possible from L138 processor as we have to give the clock to 2 chips (FPGA and voice codec)
Thanks
Arul.