TDA4VM: NumBatches = 6, model conversion failed

Hi,

Could you confirm the SDK version you are using ? 

From the posted logs it appears like 8.2.

The batch processing support is available for multi core dsp AM69A/TDA4VH from 9.0 SDK onwards.

Hi Pratik,

Thank you for the support.

After replacing SDK9.0, the following issues occur:

Could you help share the latest TI deep Learning Product User Guide?

May I know if Ubuntu18.04 is supported?

Thanks and regards,

Cherry

Hi,

Cherry Zhou said:

May I know if Ubuntu18.04 is supported?

Lets lean how to check OS version support for particular sdk.

Navigate to ti.com and search for SoC you are working on / looking for then navigate the respective sdk version you are interested, something like below.

https://www.ti.com/tool/PROCESSOR-SDK-J721E

Click to release note documentation, https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/09_00_01_01/exports/docs/psdk_rtos/docs/user_guide/release_notes_09_00_00_j721e.html

You can check the field, https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/09_00_01_01/exports/docs/psdk_rtos/docs/user_guide/release_notes_09_00_00_j721e.html#device-support-and-validation-information

Cherry Zhou said:

Could you help share the latest TI deep Learning Product User Guide?

Now lets learn how to to get latest user guide for TIDL product.

Follow the above listed flow, and reach to main product page https://www.ti.com/tool/PROCESSOR-SDK-J721E

Select the correct sdk version, and click on sdk doc https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/09_00_01_01/exports/docs/psdk_rtos/docs/user_guide/index.html

Click on SDK Components and select TIDL, click on user guide here https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/09_00_01_01/exports/docs/psdk_rtos/docs/user_guide/sdk_components_j721e.html#ti-deep-learning-product-tidl

Hi Pratik,

After upgrading SDK to 9.0, is there still no support for large-size multi-batch (1024*576, batch4 input) model inference at the board end? 

WARNING: [TIDL_E_DATAFLOW_INFO_NULL] Network compiler returned with error or didn't executed, this model can only be used on PC/Host emulation mode, it is not expected to work on target/EVM.

The customer has tried the following:

gmm@gmm:~/tda4/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/c7x-mma-tidl/ti_dl/utils/tidlModelImport$ ./out/tidl_model_import.out /home/gmm/tda4/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/c7x-mma-tidl/ti_dl/test/testvecs/config/import/public/onnx/tidl_import_batch4_resnet18_1024_576.txt
ONNX Model (Proto) File : ../../test/testvecs/models/public/onnx/resnet18-1024_576-sim.onnx
TIDL Network File : ../../test/testvecs/config/tidl_models/onnx/tidl_net_batch4_resnet18_1024.bin
TIDL IO Info File : ../../test/testvecs/config/tidl_models/onnx/tidl_io_batch4_resnet18_1024_
Current ONNX OpSet Version : 8
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

Processing config file #0 : /home/gmm/tda4/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/c7x-mma-tidl/ti_dl/test/testvecs/config/tidl_models/onnx/tidl_import_batch4_resnet18_1024_576.txt.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . .. T 264461.15 .... ..... ...
A : 895, 0.0000, 1.0000, 405 .... .....
# 1 . .. T 271820.34 .... ..... ...
A : 557, 0.0000, 1.0000, 733 .... .....
# 2 . .. T 264794.91 .... ..... ...
A : 442, 0.0000, 0.6667, 675 .... .....
# 3 . .. T 263599.49 .... ..... ...
A : 498, 0.0000, 0.5000, 456 .... .....


***************** Calibration iteration number 0 started ************************
~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

Processing config file #0 : /home/gmm/tda4/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/c7x-mma-tidl/ti_dl/test/testvecs/config/tidl_models/onnx/tidl_import_batch4_resnet18_1024_576.txt.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . .. T 223584.37 .... ..... ...
A : 895, 0.0000, 1.0000, 405 .... .....
# 1 . .. T 222254.42 .... ..... ...
A : 557, 0.0000, 0.5000, 733 .... .....
# 2 . .. T 222516.39 .... ..... ...
A : 442, 0.0000, 0.3333, 656 .... .....
# 3 . .. T 221994.04 .... ..... ...
A : 498, 0.0000, 0.2500, 475 .... .....


***************** Calibration iteration number 0 completed ************************
------------------ Network Compiler Traces -----------------------------
successful Memory allocation
Floating point exception (core dumped)
Could not open /home/gmm/tda4/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/c7x-mma-tidl/ti_dl/test/testvecs/config/tidl_models/onnx/batch4_resnet18_1024/perfSimInfo.bin
WARNING: [TIDL_E_DATAFLOW_INFO_NULL] Network compiler returned with error or didn't executed, this model can only be used on PC/Host emulation mode, it is not expected to work on target/EVM.
****************************************************
** 1 WARNINGS 0 ERRORS **
****************************************************

Thanks and regards,

Cherry

Currently am Out of Office, Please expect the delay in my responses until 20 Nov.

Thank you for your kind patience.

Hi,

My I know is there any updates? 

Thanks and regards,

Cherry

Hi,

Which SoC specific sdk you are using ?

As mentioned earlier batch processing is supported for multi core devices (TDA4VH/AM69A), make sure you use the same.

Note that : 

• Number of batches <= Number of cores
• For TDA4VH/AM69A, maximum number of DSP cores is 4, so models upto batch size of 4 are supported. Larger number of batches can be implemented by running inference iteratively on a 4 batch model