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AM623: AM623: Question on SK-AM62 Design

xu.dengke
Prodigy 90 points

Part Number: AM623

Hi TI team,

        I have some doubts about the RST circuit design of eMMC;

         U58 is an AND gate, so the output is only high when inputs 1 and 2 are high, otherwise it is low. However, there is also an up pull on the RST side, so the RST side is always high, right?

         Please help explain, thank you

  • 0
    TI__Guru 64655 points

    The GPIO controlled input originates from a AM62x IO that is turned off until the eMMC driver software initializes it to be a software-controlled reset output. The input allows the eMMC software driver to reset the eMMC device without resetting the entire system. The external pull-up on this signal is required to hold the undriven signal high until software initializes the associated GPIO. The device would not be able to boot from eMMC if the signal had an external pull-down attached since the ROM codes doesn't know which GPIO is used to implement a software reset.

    The RESETSTATz input will be driven low when the AM62x device is being reset (power-on reset or warm reset). This input allows the eMMC device to be reset for the first time after the system receives power or if the AM62x device encounters a warm reset event like a watchdog timeout.

    I agree the AND gate output is always driven, so I'm not sure why the hardware team placed a pull-up on that signal. 

    Regards,
    Paul