I had a post
http://e2e.ti.com/support/embedded/f/355/p/124046/443930.aspx#443930
As one can see I got some suggestions and I followed all of them that is
1. Corrected the typo in TMS320C28346.cmd as suggested by Judah.
The Memory segment "CSM_PWL_PROG" should be renamed "CSM_PWL".
2. Corrected another typo in platform.xs as suggested by Scott
In Platform.xs replace this line:
"TMS320C28346" : "Type_2934x",
With this:
"TMS320C28346" : "Type_2834x",
But the clock module is producing wrong timings. I found out that PLL settings were not right for my board (PLLCRDIV = 10 I wanted it to be 29 ).
I changed following line in platform.xs
Boot.pllcrDIV = 10; to Boot.pllcrDIV = 29; and added following line.
Boot.pllOSCCLK = 20; I have not invented these lines. They are there in platform.xs in another platform that worked in past for me that is ti.platforms.control28346 So now my lines from line number 120 to 124 in platform.xs are as follows Boot.disableWatchdog = true;
Boot.configurePll = true;
Boot.pllOSCCLK = 20;
Boot.pllcrDIV = 29;
Boot.pllstsDIVSEL = 2;
It works for me but I have modified the platform.xs file too much so I need a nod from TI or some other wounded soldier. Meanwhile I will continue to use the older platform.
sunil