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TMS320C6713 DSK - EMIF, custom daughtercard

Hallo!

I'm trying to communicate between the TMS320C6713 DSK and my custom daughtercard through EMIF in the CE3 address space. I implemented an asynchronous 16 bit flash interface on the daughtercard (FPGA) similar to the one described in SPRA568A, p.10, figure 7.

I do the following to configure EMIF at DSP side:

void initEMIF(void)
{
  Uint32 gblctl = EMIF_GBLCTL_RMK(
    EMIF_GBLCTL_NOHOLD_ENABLE,
    EMIF_GBLCTL_EKEN_ENABLE,
    EMIF_GBLCTL_CLK1EN_DEFAULT,
    EMIF_GBLCTL_CLK2EN_DEFAULT
    );

  Uint32 cectl = EMIF_CECTL_RMK(
    EMIF_CECTL_WRSETUP_DEFAULT,
    EMIF_CECTL_WRSTRB_DEFAULT,
    EMIF_CECTL_WRHLD_DEFAULT,
    EMIF_CECTL_RDSETUP_DEFAULT,
    EMIF_CECTL_TA_DEFAULT,
    EMIF_CECTL_RDSTRB_DEFAULT,
    EMIF_CECTL_MTYPE_ASYNC16,
    EMIF_CECTL_RDHLD_DEFAULT
    );

  EMIF_configArgs(
    EMIF_GBLCTL_OF(gblctl),     /* global control */
    EMIF_CECTL_DEFAULT,         /* CE0 control */
    EMIF_CECTL_DEFAULT,         /* CE1 control */
    EMIF_CECTL_DEFAULT,         /* CE2 control */
    EMIF_CECTL_OF(cectl),       /* CE3 control */
    EMIF_SDCTL_DEFAULT,         /* SDRAM control */
    EMIF_SDTIM_DEFAULT,         /* SDRAM timing */
    EMIF_SDEXT_DEFAULT          /* SDEXT */
    );
}

 

But when I try to read from that interface there is no signal measureable on the J4 connector (EMIF signals).

while (1) {
    values[i] = *(0xB0000000);
    i = (i+1)%128;
  }

I expected at least the ACE3# (chip select) or AARE# (read enable) to toggle while reading. When I write to the same address AAWE# is also not toggling.

 

Do you see the mistake I make? Is there some "global emif enable" I'm missing?

  • Can you look at the signals closer to the DSP? I think they go through buffers that are switched by an EMIF Enable signal on the connector. Does you custom daughtercard pull the enable signal to the right state to enable the drivers on the board (not on the DSP chip)?

    RandyP

  • The Signals closer to the DSP are present.

    When I pull the DC_DET# pin to GND the signals are available on the connector/daughtercard and pass the buffer(s).

     

    Thanks for help!

  • Hi markus,

    I am doing a similar project as you which requires a daughtercard for the C6713 board. Could you help me out with this?

     

    many thanks,

    Jason

  • Yes, it is not clear in the DSK6713 technical reference manual, but the DC_DET# pin (peripheral connector pin 75) *must* be connected to ground in order for the DSK's on-board CPLD to enable the buffers for the daughterboard bus connectors.  (You can confirm this by examining the VHDL source code for the CPLD.)  Commercial daughterboards (including TI's 5-6K interface board) do this, so if you use at least one of them in your "board stack" then you can get away with not doing it on your own board.  However, as a matter or sound design and conformance to TI's daughterboard standard, your daughterboard should do it too.