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SPI EEPROM Bootloader mode Question

Alexey Safonov
Prodigy 150 points

I use C6745 own-make board and try to use bootloader in SPI1 EEPROM mode to load program from external EEPROM.

According to "Using the TMS320C6747/45/43 Bootloader" SPRABB1B.pdf to use SPI0 Slave bootloader mode it is necessary to set the following states on the pins during reset:

Boot mode BOOT[7] BOOT[2] BOOT[1] BOOT[0] BOOT[3]
SPI1 EEPROM 0 1 0 0 1

I use 4.7KOm pull-up and 1KOm pull-down resistors. I see with oscilloscope that pins have correct values at reset.
I don't see any signals on SPI1_CLK and SPI1_SCS[0] outputs after reset.

Please explain me what is wrong.

  • 0
    Intellectual 820 points

    Alexey,

    In an "SPI Slave" boot mode, an external MCU is required to be the SPI bus master, and write data to the C6745 DSP chip.

    If you want the C6745 chip to be the SPI bus master (the master is the device that generates the SPI clock signal), then you want to configure the boot mode to be "SPI Master" rather than "SPI Slave".

    Steve

  • 0 in reply to Steven Tuttle
    Prodigy 150 points

    Steven,

    It was a mistake in the second paragraph of my letter but the problem with the bootloader was not disappeared.]

    In fact, I need implement firmware loading when bootloader in SPI0 slave mode. But when my attempt was unsuccessful, I decided to try other bootloader modes:

    - UART0 slave mode - attempt was unsuccessful - I have not seen any output on the UART0 TX ("bootme" awaited) after reset;
    - SPI1 EEPROM master mode - attempt was unsuccessful - I have not seen clocks and chip select on the SPI1_CLK and SPI1_SCS[0] outputs after reset.

    Please tell me whether exist any speical conditions other than states of bootloader pins during reset to work with bootloader?

  • 0 in reply to Alexey Safonov
    Intellectual 820 points

    Alexey,

    You may know this already, but make sure the 'boot mode' pins are meeting the Hold Time spec, with respect to the rising edge of the RESET pin.  The boot mode signals must remain stable for both the Setup Time and the Hold Time.  You should also look at the Errata sheet for the C6745 chip, to see if there are any notes about the various boot modes - you don't want to waste time fighting a 'known problem' described in the Errata sheet.

    Steve

  • 0 in reply to Steven Tuttle
    TI__Mastermind 27585 points

    Steve, thanks for the input!

    Alexey, in addition, if you have an emulator, connect after reset and use this debug GEL file to see any bootloader error messages and what pins were latched at reset. Continue to boot in SPI boot; you do not need to be in emulation boot mode to do this test.

    Jeff

  • 0 in reply to jc-ti
    Prodigy 150 points

    Jeff,

     

    Thank you for your answer.

     

    I have tried sent Gel-file and obtained the following output:

    ---------------------------------------------

    |               BOOTROM Info                |

    ---------------------------------------------

     

    ROM ID: d800k003

    Silicon Revision 2.0

     

    C6745 BOOTCFG REG: 0x0000F37C

     

    Boot Mode: SPI1 EEPROM

     

    ROM Status Code: 0x00000009

    Description: Invalid AIS keyword

     

    Program Counter (PC) = 0x00712144

     

    I tried some times, JTAG was disconnected from the board, the board was repowered. But I haven’t seen any clocks on SPI1_CLK (pin 16) and impulse on SPI1_SCS (pin 8).

     

    Then I’ve set boot configuration equal to UART0 and obtained the following output:

    ---------------------------------------------

    |               BOOTROM Info                |

    ---------------------------------------------

     

    ROM ID: d800k003

    Silicon Revision 2.0

     

    C6745 BOOTCFG: 0x0000F3F3

     

    Boot Mode: UART0

     

    ROM Status Code: 0x00000000

    Description: No error

     

    Program Counter (PC) = 0x007F5D44

     

    If I’ve tried repowered the board (JTAG was disconnected) than sometimes (not regularly) I’ve seen impulses on UART0_TX which are similar awaited “bootme” request.

    Is TRST-pin value must be in low state during RESET-pin is asserted, i.e. whether warm reset is enough to bootloader or only cold reset is required?

    I use 1kOm pull-up / pull-down resistors on boot mode pins. Are these correct values?

    Could you provide me any suggestions on further actions to resolve the problem?

  • 0 in reply to Alexey Safonov
    TI__Mastermind 27585 points

    Alexey, it looks like in both cases the correct boot mode is latched, but you are not seeing any of the IO toggling. The 1k resistors are ok to use for the boot pins.

    Can you send a plot of your power up sequence relative to when RESET is released? Under what conditions does the BOOTME actually appear on the UART_TX line?

    Also the boot pins are only latched during a POR, but once you have latched them, a warm reset should still work using the previously latched boot pin values. Is there no activity when doing a warm reset as well?

    Thanks

    Jeff

  • 0 in reply to jc-ti
    Prodigy 150 points

    Jeff,

    Thank you for the asnwer and proposals.

    Finally, I found out that TRST must be pulled low during reset at least in my case.

  • 0 in reply to Alexey Safonov
    TI__Mastermind 27585 points

    Great, so your problem was resolved by pulling down TRST?

    Jeff