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C6748 PSC questions

Other Parts Discussed in Thread: TMS320C6748

1.  The C6748 DSP System Reference Guide defines PSC0 10 as not used.  The C6748 Datasheet defines PSC0 10 as SCR0(Br0, Br1, Br2, Br8).  Which is correct?  I think the reference guide, as SCR0 appears to deal with the ARM side of the world, which the C6748 doesn't have.

2.  Is there any advantage to moving a PSC to the Disabled state from the SwRstDisable state?  A lot of the PSC's default to SwRstDisable, and if we aren't using them, I'd just rather leave them alone unless there is a reason(power savings for example) to move them to the Disabled state.

3.  AISGen tool, PSC tab.  Is it OK just to enable the PSC's you want, and leave the Disable / SyncRst fields blank?

4.  We use a custom board with the following peripherals:  EMAC, McBSP1, UART1, SPI1, I2C0, I2C1, LCDC, and GPIO.  In my GEL file and AISGen config file, I want to only enable the following:  PSC0 = 11, 12, 15    PSC1 = 3, 5, 6, 10, 11, 12, 15, 16, 24, 25, 26, 27, 28, 29, 30, 31.  I know a lot of these default to the Enabled state, and I assume there is no harm in trying to Enable an already Enabled PSC.  The rest of the PSC's would be left in the default state.

Thanks, Dean

  • Dean Hofstetter said:

    1.  The C6748 DSP System Reference Guide defines PSC0 10 as not used.  The C6748 Datasheet defines PSC0 10 as SCR0(Br0, Br1, Br2, Br8).  Which is correct?  I think the reference guide, as SCR0 appears to deal with the ARM side of the world, which the C6748 doesn't have.

    I would agree the datasheet would need to be updated.

     

    Dean Hofstetter said:

    2.  Is there any advantage to moving a PSC to the Disabled state from the SwRstDisable state?  A lot of the PSC's default to SwRstDisable, and if we aren't using them, I'd just rather leave them alone unless there is a reason(power savings for example) to move them to the Disabled state.

    I don't see any advantage to moving to the Disabled state from the SwRstDisable state.  As described in Table 5-11 of the TMS320C6748 datasheet the Disabled state has the module's reset deasserted, which means the module is released from reset, but not clocked.  This state would be used for scenarios whereby you have a moduled configured and perhaps operating, then decide to turn off its clock for power savings but intend to operate it from that state in the future.

     

    Dean Hofstetter said:

    3.  AISGen tool, PSC tab.  Is it OK just to enable the PSC's you want, and leave the Disable / SyncRst fields blank?

    I don't have any specific comment on this.

     

    Dean Hofstetter said:

    4.  We use a custom board with the following peripherals:  EMAC, McBSP1, UART1, SPI1, I2C0, I2C1, LCDC, and GPIO.  In my GEL file and AISGen config file, I want to only enable the following:  PSC0 = 11, 12, 15    PSC1 = 3, 5, 6, 10, 11, 12, 15, 16, 24, 25, 26, 27, 28, 29, 30, 31.  I know a lot of these default to the Enabled state, and I assume there is no harm in trying to Enable an already Enabled PSC.  The rest of the PSC's would be left in the default state.

    I don't foresee any issues with enabling an already enabled PSC.  However, there may be module-level implications which would be described in the module user's guide.  For instance, there is a reference to the external memory controller which indicates the SDRAM device should be in self-refresh before the PSC module state transitions occur in order to maintain the memory contents.