Hello,
Just wonder if TI provides the BFM of AM64XX processor, in particular for external asynchronous memory interface using GPIO module.
I am looking for this particular model for VHDL/Verilog simulation of the design to external FPGA and SRAM interfaces.
If the model is not available then is there any guideline for me to develop such a model for digital simulation ? Essentially; it needs to program
few control registers, address and memory space, setup I/O buffer, reset and clock inputs and GPIO bus from the block. In this way I can use
it to simulate my external FPGA and SRAM etc. wehn connecting to this GPIO bus.
Regards;
Huynh
