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AM3352: Power down sequence

Tony Tang
Mastermind 26666 points
Part Number: AM3352
Other Parts Discussed in Thread: TIDA-01588, TIDA-01568

The discrete power solution sequence of AM335x, the power up sequence is fine, but the power down sequence violate the first up, last off sequence, the 1.5V(Orange) is later than 1.8V(Yellow) power down. 

Does it impact AM335x longevity or reliability? 

On this reference design used discrete power solution, power up sequence is ensured by EN, but how can it ensure power sequence? 

https://www.ti.com/tool/TIDA-01568

Is there reference circuit to ensure power down sequence?

  • 0
    TI__Guru*** 143689 points

    Hello Tony, 

    Tony Tang said:

    On this reference design used discrete power solution, power up sequence is ensured by EN, but how can it ensure power sequence? 

    https://www.ti.com/tool/TIDA-01568

    Is there reference circuit to ensure power down sequence?

    Is your query regarding the TIDA-01588. If yes, i need to check the contact and reassign.

    When i download and view the picture the scale is not visible. Can you please share a higher resolution power down diagram.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru*** 143689 points

    Hello Tony, 

    Can you please add the names of the processor supply rail connected.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru*** 143689 points

    Hello Tony, 

    Received the high-resolution scope capture.

    Please help me understand the package. Is there a summary of the supplies connected to different rails including the VDDS.

    Example package used in TIDA-01568.

    AM3358BZCZA100

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru*** 143689 points

    Hello Tony, 

    In the TIDA-01568, the power sequence is controlled by Power Sequencer With Adjustable Timing

    https://www.ti.com/lit/ds/symlink/lm3881.pdf

    I would expect the sequence to be following the processor data sheet recommendation.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Mastermind 26666 points

    Sreenivasa,

    Thanks you.

    As it is a mass production design, hard to change design. Customer would like to know the risk with 1.5V power off delayed to other rails.

    According to datasheet, the customer's power sequence only violates the last recommendation, did not maintain VDDS ≥1.5V while 1.5V VDDR is off. Will it case reliability risks for the device like that of VDDS and VDDSHVx difference <2V violation?

    6.1.2 Power-Down Sequencing

    PWRONRSTn input terminal should be taken low, which stops all internal clocks before power supplies

    are turned off. All other external clocks to the device should be shut off.

    The preferred way to sequence power down is to have all the power supplies ramped down sequentially in

    the exact reverse order of the power-up sequencing. In other words, the power supply that has been

    ramped up first should be the last one that should be ramped down. This ensures there would be no

    spurious current paths during the power-down sequence. The VDDS power supply must ramp down after

    all 3.3-V VDDSHVx [1-6] power supplies.

    If it is desired to ramp down VDDS and VDDSHVx [1-6] simultaneously, it should always be ensured that

    the difference between VDDS and VDDSHVx [1-6] during the entire power-down sequence is <2 V. Any

    violation of this could cause reliability risks for the device. TI recommends maintaining VDDS ≥1.5V as all

    the other supplies fully ramp down to minimize in-rush currents.

  • 0 in reply to Tony Tang
    TI__Guru*** 143689 points

    Hello Tony, 

    I have captured the data sheet recommendation that you posted and reached out to the device experts to hear their thoughts.

    I will update you with the inputs i receive.

    Regards,

    Sreenivasa

  • +1 in reply to Kallikuppa Sreenivasa
    TI__Guru*** 143689 points

    Hello Tony, 

    I collated all the inputs i received as below:

    The 1.5V falling after 1.8V is not a reliability concern for the processor IOs.  However, there could be system related issues that needs to be considered since the IOs associated with the 1.5V rail may do unpredictable things during the time 1.5V is still applied after 1.8V becomes invalid.  For example, an IO may enable its output and drive any logic state. This could be in contention with the attached device.  This is one example of the types of things that could happen. 

    This is what the note 

    TI recommends maintaining VDDS ≥1.5V as all the other supplies fully ramp down to minimize in-rush currents.

    is trying to address.

     

    Although this is not a reliability concern associated with the processor, this is a concern with how the system interacts with an attached device. Customer will need to determine the risk associated with their specific system implementation if the DDR IOs are driven to an unknown state during power down.  

    The device internal reset path from the input to the IO cells propagates via logic powered from VDDS.  This is why we want VDDS on first and off last. Without VDDS there is not IO reset.

    Regards,

    Sreenivasa 

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Mastermind 26666 points

    Sreenivasa,

    Thank you very much, I learned a lot.

  • 0 in reply to Tony Tang
    TI__Guru*** 143689 points

    Hello Tony, 

    Good to hear.

    Regards,

    Sreenivasa