AM6442: Ethercat Slave Simple Demo not Working on custom board.

Christian Eissler

Part Number: AM6442
Other Parts Discussed in Thread: SYSCONFIG

Hello,
I am trying to test the "Ethercat Slave Simple Demo" on one of our custom boards.
I have already tested the example on the AM64x EVM. Here the Ethercat Slave is recognized correctly. For Testing I use EC Engineer. The SDK I use is "ind_comms_sdk_am64x_09_00_00_03"
The setup of our custom board differs as follows:

I use the DP83848IVV/NOPB twice as phy and have configured these according to the Ethercat specifications. Both phys are recognized correctly.
I use the ICSSG0 instead of the ICSSG1 and set the correct pin config in the sysconfig.
MII0_RXLINK has a different polarity for the Phy. The polarity was adjusted as follows:
#define ECAT_PHYPOLINVERT_IN (false)
#define ECAT_PHYPOLINVERT_OUT (false)

I have ensured that the Ethercat data arrives correctly at the MII interface of the AM64:
MII_RXD0:3 -> Data measured
MII_RXCLK -> Clock correct
MII_RXER -> no errors
MII_RXDV -> Data valid
MII_TXCLK -> Clock correct

By initializing the example I get the following output which also looks correct:

Local Implementation
Pruicss  max =3 selected PRU:3
Did Map 0x30000000 len 0x2000 to 0x30000000 (dram0)
Did Map 0x30002000 len 0x2000 to 0x30002000 (dram1)
Did Map 0x30034000 len 0x4000 to 0x30034000 (iram0)
Did Map 0x30038000 len 0x4000 to 0x30038000 (iram1)
Did Map 0x30010000 len 0x10000 to 0x30010000 (shdram)
Did Map 0x30022000 len 0x400 to 0x30022000 (control0)
Did Map 0x30024000 len 0x400 to 0x30024000 (control1)
Did Map 0x30020000 len 0x2000 to 0x30020000 (intc)
Did Map 0x30026000 len 0x2000 to 0x30026000 (cfg)
Did Map 0x30028000 len 0x2000 to 0x30028000 (uart0)
Did Map 0x3002e000 len 0x2000 to 0x3002e000 (iep)
Did Map 0x30030000 len 0x2000 to 0x30030000 (ecap0)
Did Map 0x30032000 len 0x400 to 0x30032000 (mii_rt)
Did Map 0x30032000 len 0x1c00 to 0x30032000 (mdio)
Phy Reset: 9.3
Phy Reset: 9.4
pRegPerm = 0x30002000, dram1=0x30002000, offset = 0x00000000, size = 0x00001400
PRU ESC: Rev 0690 | Bld 050F | INTC base: 0x30020000 , id = 0x4e82a900
INTC.HIDISR addr: 0x30020038
RxPDO created 0x1600: 0x700e0fc0
RxPDO created 0x1601: 0x700e10c8
TxPDO created 0x1A00: 0x700e1160
TxPDO created 0x1A01: 0x700e1268
DTK_EEPROM_emulationPrepare:710: Set CatSyncMan[1]:sa=0x1000, len=0x100, ctrl=0x
DTK_EEPROM_emulationPrepare:719: Set CatSyncMan[2]:sa=0x1100, len=0x100, ctrl=0x
DTK_EEPROM_emulationPrepare:728: Set CatSyncMan[3]:sa=0x1200, len=0xc00, ctrl=0x
DTK_EEPROM_emulationPrepare:745: Set CatSyncMan[4]:sa=0x1e00, len=0xc00, ctrl=0x
EC_SLV_APP_SS_populateDescriptionObjectValues:1370 PDO Out Len: 0x40
Phy Reset: 9.3
Phy Reset: 9.4
Phy UnReset: 9.3
Phy UnReset: 9.4
Configure Phy bits: PhyAddr:16, LinPol:LOW, PhyAddr:17, LinPol:LOW, (0x30000)
DP83869 detected: 536894608
DP83869 detected: 536894608
PRU_PHY_detect:185 Phy 16 alive
PRU_PHY_detect:185 Phy 17 alive
PHY Disable Magnetics
PHY Enable Magnetics

****EC Slave*********************************************************
Numeric Version: 0x00010D00
Friendly Version: <KB EC Slave Stack v00.01.13.00>
Source Id: <580c65b05ff2113ca998c2196c8b880ca78b97d5>
****HWAL*************************************************************
Numeric Version: 0x00010006
Friendly Version: <KB HWAL v00.01.00.06>
Source Id: <d02dbbf5128782bf7b4950829445f4a19367be60>
****OSAL*************************************************************
Numeric Version: 0x00010101
Friendly Version: <KB OSAL v00.01.01.01>
Source Id: <03bbc16a6a8f13bd1eba7bb4f12d17a7df85b3df>
*********************************************************************
State change: 0x0 -> 0x1
SSC_checkTimer:MaxD:9519910 (9)
SSC_checkTimer:MaxET:52
SSC_checkTimer:MaxD:9999100 (9)
SSC_checkTimer:MaxD:9999590 (9)
SSC_checkTimer:MaxD:10000665 (10)
SSC_checkTimer:MaxD:10001115 (10)
SSC_checkTimer:MaxD:-1990770632 (2304)

The problem is that the MCU does not send any response to the Request via MII_TXD0:3 and MII_TXEN is also not active. Can you tell me where my configuration could be faulty and what steps I can take for further diagnosis?

Many thanks in advance.

Best regards
Christian Eissler

over 1 year ago

0 Ashwani Goel over 1 year ago

TI__Mastermind 27270 points

HI Christian Eissler,

Thanks for your query.

I will check o this and get back to you.

Best Regards

Ashwani

0 Christian Eissler over 1 year ago in reply to Ashwani Goel

Prodigy 10 points

I was able to get the MII Interface of the Ethercat example running but only with some manual changes in PRU_ICSSG0_PR1_MII_RT_PR1_MII_RT_CFG

After starting the registers look like this:

I changed the registers as follows and was then able to connect to EC Engineer:

It looks like the Ethercat firmware does not set these registers correctly. Although in debug output "Did Map 0x300b2000 len 0x400 to 0x300b2000 (mii_rt)" the mapping seems to be configured correctly.

Can you give me more information on how to configure this so that the Ethercat firmware does the correct configuration?

Best Regards

Christian Eissler

0 Pekka Varis over 1 year ago in reply to Christian Eissler

TI__Mastermind 27050 points

Looks like you changed two addresses, one ending in rxcfg0 and the other txcfg1? Did you change them in source code somewhere and build of how did you do the change?

I suspect this is about the 2 instances of ICSSG, we test ICSSG1 on the https://www.ti.com/tool/TMDS64EVM with EtherCAT and we also test it on the related https://www.ti.com/tool/LP-AM243 . So looks like some addresses do not setup correctly for ICSSG0 instance.

0 Christian Eissler over 1 year ago in reply to Pekka Varis

Prodigy 10 points

Hello Pekka Varis,

Thank you for your reply.

I have changed exactly these addresses.
As a dirty workaround, I set the registers from the R5 Core after the Ethercat firmware has started.
I also think it is very likely that it is due to the use of ICSSG0. According to the documentation, however, both ICSSG0 and ICSSG1 can be used with Ethercat Firmware.
Does this mean that the ICSSG0 has never been tested and the Ethercat firmware is faulty here?
Is there a workaround for this?

Best regards
Christian Eissler

0 Pekka Varis over 1 year ago in reply to Christian Eissler

TI__Mastermind 27050 points

The majority of the testing for EtherCAT per SW release is on the instance ICSSG1 on the boards https://www.ti.com/tool/TMDS64EVM and https://www.ti.com/tool/LP-AM243. This is where the implementation is also certified.

ICSSG0 instance is identical and verified. But this looks like a SW configuration bug, a bug filed, which I'd expect to be fixed in the SDK 9.2 (the 9.1 is probably too soon).

Configuring the registers as you did is a good workaround.

0 Christian Eissler over 1 year ago in reply to Pekka Varis

Prodigy 10 points

Thank you very much for your answer. Good to know that my workaround fits and the problem will be fixed in SDK version 9.2

0 Pekka Varis over 1 year ago in reply to Christian Eissler

TI__Mastermind 27050 points

Looks like we might be able to include this fix already in 9.1 that will be out Dec 15th,

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AM6442: Ethercat Slave Simple Demo not Working on custom board.