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Question on VPBE clocks

Anonymous
Anonymous

Hi,

 

I would like ask a question on VPBE clock.

             

 

           

First,

from figure 4-1 and Figure 4-2, SPRU978E, TMS320DM643x DMP DSP Subsystem Reference Guide, we see VPBE has four clock sources and the clock frequency are ≤54MHz.

                  

                  

However,

from page 39, SPRU952A, 3.1.1.1, TMS320DM643x DMP Video Processing Back End (VPBE) User's Guide, VPBE’s processing clock can be 153MHz (or higher, lower).

 

It is quite easy to understand that 153MHz is the processing speed, not DAC speed. But on Figure-4 above, only DAC clock’s four sources are shown in the diagram, and there is nothing about the much higher VPBE processing clock. Doesn’t this arrangement in the diagram leads to unnecessary confusions?

    

    

Zheng

  • I don't agree with your conclusion.  In the top figure, you can clearly see the separation between the vpbe clock domain and the dac domain.  The bottom figure is just a more detailed view of the dac domain clock muxing.  The text elaborates on these domains and the options for configuring them.

  • Anonymous
    0 Anonymous in reply to MattLipsey

    MattLipsey said:

    In the top figure, you can clearly see the separation between the vpbe clock domain and the dac domain.


    I agree with you that there is VPBE/DAC separation, but there is no information about the much faster (153MHz) VPBE processing clock in the upper figure, which I think they should include.

    I also wonder if the DACs in the top figure refers exclusively to VPBE.VENC(encoder).DAC(for analog display). Although I haven't tested, the processor (DM6437) should also support analog audio output as well as others, which might also be one of the DAC's. Is it possible that DACs in the upper figure refers to all DAC on the chip, rather than only the DAC within VPBE.VENC?



    Zheng