Hi:
I'm doing some development on mcu only，The type of tda4 I use is HS,
I have some questions,The RM,PM,Security & common board configurate infomation are different between GP and HS，The size of the GP configuration information is less than 0x2000，but HS is over 0x2000,
As shown in the following figure, the sciserver runs at the offset address 0x2000. I used the Tda4 is HS , do I need to change the running address of the sciserver to offser 0x4000 or other ?
Hi Suman:
Thank for your replay!
My bootloader run on MCU R5F。
I have some questions, what kind of data for base board configuration & RM、PM are the correct data.
As the example code,the "bootAppBoardCfg","bootAppBoardCfg_rm","bootAppBoardCfg_sec" are used to be configurated,I can find the memory addresses of these variables from the map table,But I debug use the trace32 to attch the TDA4 mcu domain，All of these variables have a value of 0
Hi Suman:
I can't understand where the data for these variables "bootAppBoardCfg","bootAppBoardCfg_rm","bootAppBoardCfg_sec" come from？
Hi Suman:
The application first run will call the Sciclient_init() , I will test the mcu only，so the MAIN domain will shutdown and MCU domain keep run。the MCU need to reboot the MAIN domain，so I must configurate the common, RM, PM and Security board configuration,It also call Sciclient_init() ?
Hi Karan:
Yes,the example is here pdk_jacinto_08_06_01_03/packages/ti/drv/lpm/examples/lpm_example/src/main_rtos.c,
My problem right now is from MCU Only mode to ACTIVE mode,so I need to pass the botard configuration for MAIN domain，and I do it,As the show picture
But it return fail when I called "Board_init(BOARD_INIT_PLL_MAIN)" ,So I suspect there is something wrong with these configuration parameters
I can't understand where the data for these variables "bootAppBoardCfg","bootAppBoardCfg_rm","bootAppBoardCfg_sec" come from？
Hi
There seems to be an issue with this, these board configs need to be pointing to the ones loaded by SBL.
SBL loads the board configs in an 8KB region at 0x41C80000, see https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/psdk_rtos/docs/user_guide/developer_notes_mcu1_0_sysfw.html#memory-map-considerations
This needs to be reused for MAIN domain board config passing.
Can you please try to update the lpm_pmic.c with the below delta and see?
diff --git a/packages/ti/drv/lpm/src/lpm_pmic.c b/packages/ti/drv/lpm/src/lpm_pmic.c
index aa28376..291744a 100644
--- a/packages/ti/drv/lpm/src/lpm_pmic.c
+++ b/packages/ti/drv/lpm/src/lpm_pmic.c
@@ -1716,9 +1716,9 @@ static void Lpm_boardConfigurationForMainDomain(void)
}
Sciclient_BoardCfgPrms_t bootAppBoardCfgPrms = {
- .boardConfigLow = (uint32_t)&bootAppBoardCfg,
+ .boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLow,
.boardConfigHigh = 0,
- .boardConfigSize = sizeof(bootAppBoardCfg),
+ .boardConfigSize = boardCfgInfo.boardCfgLowSize,
.devGrp = DEVGRP_01
};
Sciclient_BoardCfgPrms_t bootAppBoardCfgPmPrms = {
@@ -1728,15 +1728,15 @@ static void Lpm_boardConfigurationForMainDomain(void)
.devGrp = DEVGRP_01
};
Sciclient_BoardCfgPrms_t bootAppBoardCfgRmPrms = {
- .boardConfigLow = (uint32_t)&bootAppBoardCfg_rm,
+ .boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLowRm,
.boardConfigHigh = 0,
- .boardConfigSize = sizeof(bootAppBoardCfg_rm),
+ .boardConfigSize = boardCfgInfo.boardCfgLowRmSize,
.devGrp = DEVGRP_01
};
Sciclient_BoardCfgPrms_t bootAppBoardCfgSecPrms = {
- .boardConfigLow = (uint32_t)&bootAppBoardCfg_sec,
+ .boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLowSec,
.boardConfigHigh = 0,
- .boardConfigSize = sizeof(bootAppBoardCfg_sec),
+ .boardConfigSize = boardCfgInfo.boardCfgLowSecSize,
.devGrp = DEVGRP_01
};
Regards
Karan
Hi Suman,Karan:
I update the lpm_pmic.c and use the GP board configratue,As the picture show the running log ,it failed to set the main pll clock after I configrated the board
Hi Xibin
The MCU only application is only tested on GP variant of the TDA4VM not on HS.
1. I assume you are using the sbl_mmcsd_img_hs which links the correct board configuration for HS devices. Please confirm.
2. When do you see the above logs? Is this the first time when you are in Active mode or when you are coming from MCU only to Active mode?
3. Can you check in the Sciclient_getDefaultBoardCfgInfo() function, are you actually linking the HS boardconfigs and not the GP ones?
Sciclient_getDefaultBoardCfgInfo(&boardCfgInfo) is defined in ~/sdks/j7es/sdk8_6/ti-processor-sdk-rtos-j721e-evm-08_06_01_03/pdk_jacinto_08_06_01_03/packages/ti/drv/sciclient/src/sciclient/sciclient_boardcfg.c file.
Check the value of pBoardCfgInfo->boardCfgLowSize. This is dictated by a macro SCICLIENT_BOARDCFG_SIZE_IN_BYTES which is defined in either ~/sdks/j7es/sdk8_6/ti-processor-sdk-rtos-j721e-evm-08_06_01_03/pdk_jacinto_08_06_01_03/packages/ti/drv/sciclient/soc/V1/sciclient_defaultBoardcfg_hex.h or ~/sdks/j7es/sdk8_6/ti-processor-sdk-rtos-j721e-evm-08_06_01_03/pdk_jacinto_08_06_01_03/packages/ti/drv/sciclient/soc/V1/sciclient_defaultBoardcfg_hexhs.h based on the GP vs HS device.
Check this value and see if it is 29U (GP) or 1640U (HS).
Regards
Karan
Hi Karan:
1. I assume you are using the sbl_mmcsd_img_hs which links the correct board configuration for HS devices. Please confirm.
I use the sbl_ospi_img_hs,and it links the correct board configuration for HS devices，Because my application can work noraml.
2. When do you see the above logs? Is this the first time when you are in Active mode or when you are coming from MCU only to Active mode?
The logs appear when my application enters the MCU only to active mode.
3. Can you check in the Sciclient_getDefaultBoardCfgInfo() function, are you actually linking the HS boardconfigs and not the GP ones?
I link HS boardconfigs,Here are the variables I watch with the Trace32
I change the length to 0x4000 for "OCMC_RAM_BOARD_CFG" Because of the HS boardconfigs size are over 8k
OCMC_RAM_BOARD_CFG (RWIX) : origin=0x41C80000 length=0x4000
the MCU only mode only tested on GP variant of the TDA4VM,can you test for HS devices？