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AM6442: Routing of EXT_REFCLK1 to MAIN_PLL2

Jean-Sebastien Gagnon
Prodigy 20 points
Part Number: AM6442

Hello,

Looking at the AM6442 Datasheet in 6.3.22.3.1, it is said that the EXT_REFCLK1 Pin could be routed to the MAIN_PLL2

After searching through the whole Technical Reference Manual (SPRUIM2G MAY 2020 – REVISED JULY 2023), I cannot find how to do that.

If the MAIN_PLL2_REF_CLK can effectively be change to EXT_REF_CLK1, I would also like to know what is the current default frequency of this input.

Regards,

JS

  • 0
    TI__Guru 62855 points

    I checked our internal documents and found a comment that says this input could be used to source MAIN_PLL2, but the comment also said it was there for test purposes only.

    The AM64x clock tree tool doesn't show this path. There is a good chance this path is not available for normal device operation.

    I'm waiting to hear back from our clocking expert after asking him to confirm. I 'll let you know as soon as I get an answer.

    Regards,
    Paul

  • 0 in reply to peaves
    TI__Guru 62855 points

    I received confirmation the comment in the EXT_REFCLK1 signal description that says it can be used as a source for MAIN_PLL2 needs to be removed. This clock path is only available in a special test mode.

    Regards,
    Paul