TDA4VM: How to set different frame rate within one graph pipeline

Hi,

Node or OpenVX framework does not control the fps. You can control it in the application by lets say having separate pipeline or lets say by having graph parameter in the application and dequeue/enqueue parameter only when it is required..  This needs to be done in the application. 

Regards,

Brijesh

Hi Brijesh,

Below is our graph pipeline design, do you mean that we can only dequeue/enqueue the lower part nodes(yellow ones) when we want? But I doubt that even we do not dequeue/enqueue ldc and pre proc node, would they not run at all? 

As for your first suggestion to separate the pipeline, I tried to understand and designed such pipeline below, can you help to point out anything wrong:

I separate them into two graphs:

Hi Brijesh,

I tried your second suggestion, in our pipeline, all nodes' buffer are set to 4. First I set all nodes(ldc + preproc) as graph parameters, and enqueue them four times before dequeue,  and only dequeue/enqueue the two yellow nodes(ldc+preproc) at odd loop counter. However whole process seems hangs up after several running loops.

Hi Brian,

From your graph, I see that MSC node in graph 1 is the source for preproc node (Graph1) and LDC node (Graph 2).

if my understanding is correct, then you would have to make the output of MSC as graph parameter and input of preproc node (Graph1) and LDC node (Graph 2) as graph parameters as well.
All would be pointing to the same buffer (i.e. ref_list of graph parameters would be same).

No need of initial pipe up enqueuing in the preproc node (Graph1) and LDC node (Graph 2), you could pipe up the output of MSC node.

In 2 separate tasks, 1-> you could dequeue from preproc and enqueue to MSC and vice versa and 2-> you could dequeue from LDC and enqueue to MSC and vice versa.

So that the second graph could run independently at its own fps without interfering with the first one.
Please note to set enough buffer depth.

Regards,

Nikhil

Hi Nikhil,

Thanks for your reply.

So the solution is to use two separate graphs right?

I don't quite understand this part:

In 2 separate tasks, 1-> you could dequeue from preproc and enqueue to MSC and vice versa and 2-> you could dequeue from LDC and enqueue to MSC and vice versa

Because we have three same graph parameters, do you mean we dequeue preproc's input(graph1) and only enqueue the output of MSC instead of enqueue preproc's input(graph1)?  Also  dequeue LDC's(graph 2) and only enqueue the output of MSC?

Hi,

I meant the below. Please keep the buffer depth big enough. The below would avoid the dependency of first graph to next. 
Could you give this flow a try?

TASK1:
Dequeue MSC

|
v 

Enqueue Preproc

|
v 

Dequeue Preproc

|
v 

Enqueue MSC

TASK2:

Dequeue MSC 

|
v 

Enqueue LDC

|
v 

Dequeue LDC

|
v 

Enqueue MSC

Regards,

Nikhil