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GPMC issues to access the NOR FLASH on DM8148 EVM board

Mahantesh Kumbar71529
Prodigy 50 points
Other Parts Discussed in Thread: SYSCONFIG

Hi,

I am using DM8148 EVM board & wanted to access the NOR FLASH which present on VISION APPLICATION BOARD daughter board.

I have configured the GPMC for NOR type 16-bit device .  

In the GPMC CONFIG registers, Gpmc_Config7, the base address configuration (bits 0 to 5) and chip select size (bits 8 to 11) is to be configured.

But whatever configuration is done and no matter what base address I am using to map to the nor flash it is not working.

I have tried for various base addresses like 0x00000000, 0x01000000, 0x02000000, 0x03000000, 0x04000000 and so on. But could not succeed in mapping the GPMC memory in 8148 to the External Nor-Flash.

It generates the error.

Please help me to solve the issues.

  • 0
    TI__Genius 15310 points

    Hi,

    Could you send us your GPMC registers configuration to look at?    They are:

     

    Register Name
    GPMC_REVISION
    GPMC_SYSCONFIG
    GPMC_SYSSTATUS
    GPMC_IRQSTATUS
    GPMC_IRQENABLE
    GPMC_TIMEOUT_CONTROL
    GPMC_ERR_ADDRESS
    GPMC_ERR_TYPE
    GPMC_CONFIG
    GPMC_STATUS
    GPMC_CONFIG1_i(1) 
    GPMC_CONFIG2_i(1)
    GPMC_CONFIG3_i(1) 
    GPMC_CONFIG4_i(1)
    GPMC_CONFIG5_i(1)
    GPMC_CONFIG6_i(1)

    GPMC_CONFIG7_i(1)

    Regards,

    Viet
  • 0 in reply to Viet Dinh
    Prodigy 50 points

    Hi ,

             These are the configures values for GPMC registers.

     

     

    GPMC_SYSCONFIG = 0x08;

     

    GPMC_IRQSTATUS = RESET VALUE

    GPMC_IRQENABLE =  RESET VALUE 

    GPMC_TIMEOUT_CONTROL  = RESET VALUE

     

    GPMC_CONFIG =  RESET VALUE

     

    Here I =0

     

    GPMC_CONFIG1_i =0x018F1001;

    GPMC_CONFIG2_i =0x001F1F8F;

    GPMC_CONFIG3_i =0x001F1F8F;

    GPMC_CONFIG4_i =0x1F8F1F8F;

    GPMC_CONFIG5_i =0x0F1F1F1F;

    GPMC_CONFIG6_i =0x1F000F8F;

    GPMC_CONFIG7_i =0x00000C42; //here we used base address 0x02000000;

    GPMC_CONFIG7_i =0x00000C40; // here we used base address 0x00000000;

  • 0 in reply to Mahantesh Kumbar71529
    TI__Genius 15310 points

    Mahantesh,

    For looking into the config register, I have some question for you below:

    1. Why CONFIG1_i bits 16:19 are setting to F?  From the DM8148 TRM, GPMC_CONFIG2_i register, that setting is invalid.  Can you change it to 0 or accordingly?
    2. You cannot use the top 16MB address since it is reserved for ROM so this won't work: GPMC_CONFIG7_i =0x00000C40; // here we used base address 0x00000000;

    Beside that, have you enable the GPMC CLK?  From the TRM, section CM_ALWON Registers, the CM_ALWON_MCBSP_CLKCTRL Register need to be enable by writing 2 to it address at 0x4818154C.

    Hope this help,

    Viet

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