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SK-TDA4VM: test custom model using jupyter notebook in edgeai tools

Part Number: SK-TDA4VM

Hi.

before testing custom model, i tested samples of edgeai_tools

in edge ai tools, i tryed setup testing environment with Jupyter notebook.

after modifying  python module versions, notebook runs fine.

 However, a kernel reset occurred during  "Compiled model inference step"

- testing environment : x86, docker(with gpu)

- SOC : am68pa

edgeai_tools : master (commit: 8e1b0e6c16bd3c409e2717ef8c0c8df3430d0885)

- custon-model-onnx_out.log

tidl_tools_path = /home/root/tidl_tools
artifacts_folder = custom-artifacts/onnx/resnet18_opset9.onnx
tidl_tensor_bits = 8
debug_level = 1
num_tidl_subgraphs = 16
tidl_denylist = MaxPool
tidl_denylist_layer_name =
tidl_denylist_layer_type =
tidl_allowlist_layer_name =
model_type =
tidl_calibration_accuracy_level = 7
tidl_calibration_options:num_frames_calibration = 4
tidl_calibration_options:bias_calibration_iterations = 3
mixed_precision_factor = -1.000000
model_group_id = 0
power_of_2_quantization = 2
enable_high_resolution_optimization = 0
pre_batchnorm_fold = 1
add_data_convert_ops = 0
output_feature_16bit_names_list =
m_params_16bit_names_list =
reserved_compile_constraints_flag = 1601
ti_internal_reserved_1 =

****** WARNING : Network not identified as Object Detection network : (1) Ignore if network is not Object Detection network (2) If network is Object Detection network, please specify "model_type":"OD" as part of OSRT compilation options******

Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Op type 'MaxPool' added to unsupported nodes as specified in deny list
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Add --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Add --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Add --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Add --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Add --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Add --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Add --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- Conv --
Supported TIDL layer type --- Add --
Supported TIDL layer type --- Relu --
Supported TIDL layer type --- GlobalAveragePool --
Supported TIDL layer type --- Flatten --
Supported TIDL layer type --- Gemm --

Preliminary subgraphs created = 2
Final number of subgraphs created are : 2, - Offloaded Nodes - 48, Total Nodes - 49
Node in deny list...delegated to ARM --- layer type - MaxPool, Node name -
Running runtimes graphviz - /home/root/tidl_tools/tidl_graphVisualiser_runtimes.out custom-artifacts/onnx/resnet18_opset9.onnx/allowedNode.txt custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/graphvizInfo.txt custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/runtimes_visualization.svg
*** In TIDL_createStateImportFunc ***
Compute on node : TIDLExecutionProvider_TIDL_0_0
0, Conv, 3, 1, input.1, 124
1, Relu, 1, 1, 124, 125

Input tensor name - input.1
Output tensor name - 125
*** In TIDL_createStateImportFunc ***
Compute on node : TIDLExecutionProvider_TIDL_1_1
0, Conv, 3, 1, 126, 128
1, Relu, 1, 1, 128, 129
2, Conv, 3, 1, 129, 131
3, Add, 2, 1, 131, 132
4, Relu, 1, 1, 132, 133
5, Conv, 3, 1, 133, 135
6, Relu, 1, 1, 135, 136
7, Conv, 3, 1, 136, 138
8, Add, 2, 1, 138, 139
9, Relu, 1, 1, 139, 140
10, Conv, 3, 1, 140, 142
11, Relu, 1, 1, 142, 143
12, Conv, 3, 1, 143, 145
13, Conv, 3, 1, 140, 147
14, Add, 2, 1, 145, 148
15, Relu, 1, 1, 148, 149
16, Conv, 3, 1, 149, 151
17, Relu, 1, 1, 151, 152
18, Conv, 3, 1, 152, 154
19, Add, 2, 1, 154, 155
20, Relu, 1, 1, 155, 156
21, Conv, 3, 1, 156, 158
22, Relu, 1, 1, 158, 159
23, Conv, 3, 1, 159, 161
24, Conv, 3, 1, 156, 163
25, Add, 2, 1, 161, 164
26, Relu, 1, 1, 164, 165
27, Conv, 3, 1, 165, 167
28, Relu, 1, 1, 167, 168
29, Conv, 3, 1, 168, 170
30, Add, 2, 1, 170, 171
31, Relu, 1, 1, 171, 172
32, Conv, 3, 1, 172, 174
33, Relu, 1, 1, 174, 175
34, Conv, 3, 1, 175, 177
35, Conv, 3, 1, 172, 179
36, Add, 2, 1, 177, 180
37, Relu, 1, 1, 180, 181
38, Conv, 3, 1, 181, 183
39, Relu, 1, 1, 183, 184
40, Conv, 3, 1, 184, 186
41, Add, 2, 1, 186, 187
42, Relu, 1, 1, 187, 188
43, GlobalAveragePool, 1, 1, 188, 189
44, Flatten, 1, 1, 189, 190
45, Gemm, 3, 1, 190, 191

Input tensor name - 126
Output tensor name - 191
In TIDL_onnxRtImportInit subgraph_name=125
Layer 0, subgraph id 125, name=125
Layer 1, subgraph id 125, name=input.1
In TIDL_runtimesOptimizeNet: LayerIndex = 4, dataIndex = 3

************** Frame index 1 : Running float import *************
In TIDL_runtimesPostProcessNet
In TIDL_runtimesPostProcessNet 1
In TIDL_runtimesPostProcessNet 2
In TIDL_runtimesPostProcessNet 3
****************************************************
** ALL MODEL CHECK PASSED **
****************************************************

In TIDL_runtimesPostProcessNet 4
************ in TIDL_subgraphRtCreate ************
TIDL_RT_OVX: Set default TIDLRT params done
Calling appInit() in TIDL-RT!
The soft limit is 2048
The hard limit is 2048
MEM: Init ... !!!
MEM: Init ... Done !!!
0.0s: VX_ZONE_INIT:Enabled
0.1s: VX_ZONE_ERROR:Enabled
0.2s: VX_ZONE_WARNING:Enabled
0.2008s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!!
TIDL_RT_OVX: Init ...
TIDL_RT_OVX: Mapping config file ...
TIDL_RT_OVX: Mapping config file ... Done. 37272 bytes
TIDL_RT_OVX: Tensors, input = 1, output = 1
Host kernel - 0x7f8a025233b8
TIDL_RT_OVX: Mapping network file
TIDL_RT_OVX: Mapping network file... Done 2991040 bytes
TIDL_RT_OVX: Init done.
TIDL_RT_OVX: Creating graph ...
TIDL_RT_OVX: input_sizes[0] = 908, dim = 224 padL = 3 padR = 0
TIDL_RT_OVX: input_sizes[1] = 209748, dim = 224 padT = 3 padB = 4
TIDL_RT_OVX: input_sizes[2] = 3, dim = 3
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX: input_buffer = 0x7f8a5827b000 157311
TIDL_RT_OVX: Creating graph ... Done.
TIDL_RT_OVX: Verifying TIDL graph ... Done.
************ TIDL_subgraphRtCreate done ************
******* In TIDL_subgraphRtInvoke ********
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Running Graph ...
TIDL_RT_OVX : CP - 52437, 50176
TIDL_RT_OVX: input_sizes[0] = 908, dim = 224 padL = 3 padR = 0
TIDL_RT_OVX: input_sizes[1] = 209748, dim = 224 padT = 3 padB = 4
TIDL_RT_OVX: input_sizes[2] = 3, dim = 3
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX : CP - 52437, 50176
TIDL_RT_OVX : Reformat input Buffer
TIDL_RT_OVX : ElementType - 6, 6 | Scale - 1.000000, 1.000000 | Zp - 0, 0 | Layout - 0, 0 | CP - 52437, 50176
TIDL_RT_OVX: input_buffer = 0x7f8a5827b000 157311
TIDL_RT_OVX: memset_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: vxProcessGraph ... Done.
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,

1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Sum of Layer Cycles 0
TIDL_RT_OVX : Memcpy output Buffer 0x55580e8bd4e0 3211264 125 125
TIDL_RT_OVX: elementSize = 4, OutElementType = 10 scale[0] = 1.000000, rtelemType = 6, rtZp = 0, rtScale = 1.000000
TIDL_RT_OVX: output_sizes[0] = 112, outWidht = 112 padL = 0 padR = 0
TIDL_RT_OVX: output_sizes[1] = 112, outHeight = 112 padT = 0 padB = 0
TIDL_RT_OVX: output_sizes[2] = 65, outNumChannels = 64
TIDL_RT_OVX: output_sizes[3] = 1, outNumBatches = 1
TIDL_RT_OVX: map_cp_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: Ran TIDL graph ... Done.
Sub Graph Stats 54.000000 312423.000000 291.000000
******* TIDL_subgraphRtInvoke done ********

********** Frame Index 1 : Running float inference **********
In TIDL_onnxRtImportInit subgraph_name=191
Layer 0, subgraph id 191, name=191
Layer 1, subgraph id 191, name=126
In TIDL_runtimesOptimizeNet: LayerIndex = 48, dataIndex = 47

************** Frame index 1 : Running float import *************
In TIDL_runtimesPostProcessNet
In TIDL_runtimesPostProcessNet 1
In TIDL_runtimesPostProcessNet 2
In TIDL_runtimesPostProcessNet 3
****************************************************
** ALL MODEL CHECK PASSED **
****************************************************

In TIDL_runtimesPostProcessNet 4
************ in TIDL_subgraphRtCreate ************
TIDL_RT_OVX: Set default TIDLRT params done
Skipping appInit() in TIDL-RT!
TIDL_RT_OVX: Init ...
TIDL_RT_OVX: Mapping config file ...
TIDL_RT_OVX: Mapping config file ... Done. 37272 bytes
TIDL_RT_OVX: Tensors, input = 1, output = 1
Host kernel - 0x7f8a025233b8
TIDL_RT_OVX: Mapping network file
TIDL_RT_OVX: Mapping network file... Done 49704544 bytes
TIDL_RT_OVX: Init done.
TIDL_RT_OVX: Creating graph ...
TIDL_RT_OVX: input_sizes[0] = 228, dim = 56 padL = 1 padR = 0
TIDL_RT_OVX: input_sizes[1] = 13452, dim = 56 padT = 1 padB = 2
TIDL_RT_OVX: input_sizes[2] = 64, dim = 64
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX: input_buffer = 0x7f8a5806d000 215232
TIDL_RT_OVX: Creating graph ... Done.
TIDL_RT_OVX: Verifying TIDL graph ... Done.
************ TIDL_subgraphRtCreate done ************
******* In TIDL_subgraphRtInvoke ********
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Running Graph ...
TIDL_RT_OVX : CP - 3363, 3136
TIDL_RT_OVX: input_sizes[0] = 228, dim = 56 padL = 1 padR = 0
TIDL_RT_OVX: input_sizes[1] = 13452, dim = 56 padT = 1 padB = 2
TIDL_RT_OVX: input_sizes[2] = 64, dim = 64
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX : CP - 3363, 3136
TIDL_RT_OVX : Reformat input Buffer
TIDL_RT_OVX : ElementType - 6, 6 | Scale - 1.000000, 1.000000 | Zp - 0, 0 | Layout - 0, 0 | CP - 3363, 3136
TIDL_RT_OVX: input_buffer = 0x7f8a5806d000 215232
TIDL_RT_OVX: memset_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: vxProcessGraph ... Done.
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,

1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Sum of Layer Cycles 0
TIDL_RT_OVX : Memcpy output Buffer 0x55580e8bd4e0 4000 191 191
TIDL_RT_OVX: elementSize = 4, OutElementType = 10 scale[0] = 1.000000, rtelemType = 6, rtZp = 0, rtScale = 1.000000
TIDL_RT_OVX: output_sizes[0] = 1000, outWidht = 1000 padL = 0 padR = 0
TIDL_RT_OVX: output_sizes[1] = 1, outHeight = 1 padT = 0 padB = 0
TIDL_RT_OVX: output_sizes[2] = 2, outNumChannels = 1
TIDL_RT_OVX: output_sizes[3] = 1, outNumBatches = 1
TIDL_RT_OVX: map_cp_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: Ran TIDL graph ... Done.
Sub Graph Stats 115.000000 4440523.000000 139.000000
******* TIDL_subgraphRtInvoke done ********

********** Frame Index 1 : Running float inference **********
******* In TIDL_subgraphRtInvoke ********
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Running Graph ...
TIDL_RT_OVX : CP - 52437, 50176
TIDL_RT_OVX: input_sizes[0] = 908, dim = 224 padL = 3 padR = 0
TIDL_RT_OVX: input_sizes[1] = 209748, dim = 224 padT = 3 padB = 4
TIDL_RT_OVX: input_sizes[2] = 3, dim = 3
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX : CP - 52437, 50176
TIDL_RT_OVX : Reformat input Buffer
TIDL_RT_OVX : ElementType - 6, 6 | Scale - 1.000000, 1.000000 | Zp - 0, 0 | Layout - 0, 0 | CP - 52437, 50176
TIDL_RT_OVX: input_buffer = 0x7f8a5827b000 157311
TIDL_RT_OVX: memset_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: vxProcessGraph ... Done.
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,

1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Sum of Layer Cycles 0
TIDL_RT_OVX : Memcpy output Buffer 0x55580e8bd4e0 3211264 125 125
TIDL_RT_OVX: elementSize = 4, OutElementType = 10 scale[0] = 1.000000, rtelemType = 6, rtZp = 0, rtScale = 1.000000
TIDL_RT_OVX: output_sizes[0] = 112, outWidht = 112 padL = 0 padR = 0
TIDL_RT_OVX: output_sizes[1] = 112, outHeight = 112 padT = 0 padB = 0
TIDL_RT_OVX: output_sizes[2] = 65, outNumChannels = 64
TIDL_RT_OVX: output_sizes[3] = 1, outNumBatches = 1
TIDL_RT_OVX: map_cp_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: Ran TIDL graph ... Done.
Sub Graph Stats 50.000000 310542.000000 262.000000
******* TIDL_subgraphRtInvoke done ********

********** Frame Index 2 : Running float inference **********
******* In TIDL_subgraphRtInvoke ********
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Running Graph ...
TIDL_RT_OVX : CP - 3363, 3136
TIDL_RT_OVX: input_sizes[0] = 228, dim = 56 padL = 1 padR = 0
TIDL_RT_OVX: input_sizes[1] = 13452, dim = 56 padT = 1 padB = 2
TIDL_RT_OVX: input_sizes[2] = 64, dim = 64
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX : CP - 3363, 3136
TIDL_RT_OVX : Reformat input Buffer
TIDL_RT_OVX : ElementType - 6, 6 | Scale - 1.000000, 1.000000 | Zp - 0, 0 | Layout - 0, 0 | CP - 3363, 3136
TIDL_RT_OVX: input_buffer = 0x7f8a5806d000 215232
TIDL_RT_OVX: memset_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: vxProcessGraph ... Done.
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,

1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Sum of Layer Cycles 0
TIDL_RT_OVX : Memcpy output Buffer 0x555820ffd980 4000 191 191
TIDL_RT_OVX: elementSize = 4, OutElementType = 10 scale[0] = 1.000000, rtelemType = 6, rtZp = 0, rtScale = 1.000000
TIDL_RT_OVX: output_sizes[0] = 1000, outWidht = 1000 padL = 0 padR = 0
TIDL_RT_OVX: output_sizes[1] = 1, outHeight = 1 padT = 0 padB = 0
TIDL_RT_OVX: output_sizes[2] = 2, outNumChannels = 1
TIDL_RT_OVX: output_sizes[3] = 1, outNumBatches = 1
TIDL_RT_OVX: map_cp_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: Ran TIDL graph ... Done.
Sub Graph Stats 107.000000 4437483.000000 136.000000
******* TIDL_subgraphRtInvoke done ********

********** Frame Index 2 : Running float inference **********
******* In TIDL_subgraphRtInvoke ********
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Running Graph ...
TIDL_RT_OVX : CP - 52437, 50176
TIDL_RT_OVX: input_sizes[0] = 908, dim = 224 padL = 3 padR = 0
TIDL_RT_OVX: input_sizes[1] = 209748, dim = 224 padT = 3 padB = 4
TIDL_RT_OVX: input_sizes[2] = 3, dim = 3
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX : CP - 52437, 50176
TIDL_RT_OVX : Reformat input Buffer
TIDL_RT_OVX : ElementType - 6, 6 | Scale - 1.000000, 1.000000 | Zp - 0, 0 | Layout - 0, 0 | CP - 52437, 50176
TIDL_RT_OVX: input_buffer = 0x7f8a5827b000 157311
TIDL_RT_OVX: memset_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: vxProcessGraph ... Done.
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,

1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Sum of Layer Cycles 0
TIDL_RT_OVX : Memcpy output Buffer 0x55580e8bd4e0 3211264 125 125
TIDL_RT_OVX: elementSize = 4, OutElementType = 10 scale[0] = 1.000000, rtelemType = 6, rtZp = 0, rtScale = 1.000000
TIDL_RT_OVX: output_sizes[0] = 112, outWidht = 112 padL = 0 padR = 0
TIDL_RT_OVX: output_sizes[1] = 112, outHeight = 112 padT = 0 padB = 0
TIDL_RT_OVX: output_sizes[2] = 65, outNumChannels = 64
TIDL_RT_OVX: output_sizes[3] = 1, outNumBatches = 1
TIDL_RT_OVX: map_cp_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: Ran TIDL graph ... Done.
Sub Graph Stats 100.000000 314026.000000 262.000000
******* TIDL_subgraphRtInvoke done ********

********** Frame Index 3 : Running float inference **********
******* In TIDL_subgraphRtInvoke ********
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Running Graph ...
TIDL_RT_OVX : CP - 3363, 3136
TIDL_RT_OVX: input_sizes[0] = 228, dim = 56 padL = 1 padR = 0
TIDL_RT_OVX: input_sizes[1] = 13452, dim = 56 padT = 1 padB = 2
TIDL_RT_OVX: input_sizes[2] = 64, dim = 64
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX : CP - 3363, 3136
TIDL_RT_OVX : Reformat input Buffer
TIDL_RT_OVX : ElementType - 6, 6 | Scale - 1.000000, 1.000000 | Zp - 0, 0 | Layout - 0, 0 | CP - 3363, 3136
TIDL_RT_OVX: input_buffer = 0x7f8a5806d000 215232
TIDL_RT_OVX: memset_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: vxProcessGraph ... Done.
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,

1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Sum of Layer Cycles 0
TIDL_RT_OVX : Memcpy output Buffer 0x555820ffd980 4000 191 191
TIDL_RT_OVX: elementSize = 4, OutElementType = 10 scale[0] = 1.000000, rtelemType = 6, rtZp = 0, rtScale = 1.000000
TIDL_RT_OVX: output_sizes[0] = 1000, outWidht = 1000 padL = 0 padR = 0
TIDL_RT_OVX: output_sizes[1] = 1, outHeight = 1 padT = 0 padB = 0
TIDL_RT_OVX: output_sizes[2] = 2, outNumChannels = 1
TIDL_RT_OVX: output_sizes[3] = 1, outNumBatches = 1
TIDL_RT_OVX: map_cp_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: Ran TIDL graph ... Done.
Sub Graph Stats 141.000000 4459298.000000 140.000000
******* TIDL_subgraphRtInvoke done ********

********** Frame Index 3 : Running float inference **********
******* In TIDL_subgraphRtInvoke ********
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Running Graph ...
TIDL_RT_OVX : CP - 52437, 50176
TIDL_RT_OVX: input_sizes[0] = 908, dim = 224 padL = 3 padR = 0
TIDL_RT_OVX: input_sizes[1] = 209748, dim = 224 padT = 3 padB = 4
TIDL_RT_OVX: input_sizes[2] = 3, dim = 3
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX : CP - 52437, 50176
TIDL_RT_OVX : Reformat input Buffer
TIDL_RT_OVX : ElementType - 6, 6 | Scale - 1.000000, 1.000000 | Zp - 0, 0 | Layout - 0, 0 | CP - 52437, 50176
TIDL_RT_OVX: input_buffer = 0x7f8a5827b000 157311
TIDL_RT_OVX: memset_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: vxProcessGraph ... Done.
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCyc
Processing config file #0 : /home/root/examples/jupyter_notebooks/custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/125_tidl_io_.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . .. T 317.37 .... ..... ... .... .....
# 1 . .. T 319.42 .... ..... ... .... .....
# 2 . .. T 314.07 .... ..... ... .... .....
# 3 . .. T 314.15 .... ..... ... .... .....
Processing config file #0 : /home/root/examples/jupyter_notebooks/custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/125_tidl_io_.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . ..
Processing config file #0 : /home/root/examples/jupyter_notebooks/custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/125_tidl_io_.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . ..
Processing config file #0 : /home/root/examples/jupyter_notebooks/custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/125_tidl_io_.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . ..
------------------ Network Compiler Traces -----------------------------
successful Memory allocation
les,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,

1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Sum of Layer Cycles 0
TIDL_RT_OVX : Memcpy output Buffer 0x55580e8bd4e0 3211264 125 125
TIDL_RT_OVX: elementSize = 4, OutElementType = 10 scale[0] = 1.000000, rtelemType = 6, rtZp = 0, rtScale = 1.000000
TIDL_RT_OVX: output_sizes[0] = 112, outWidht = 112 padL = 0 padR = 0
TIDL_RT_OVX: output_sizes[1] = 112, outHeight = 112 padT = 0 padB = 0
TIDL_RT_OVX: output_sizes[2] = 65, outNumChannels = 64
TIDL_RT_OVX: output_sizes[3] = 1, outNumBatches = 1
TIDL_RT_OVX: map_cp_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: Ran TIDL graph ... Done.
Sub Graph Stats 119.000000 314033.000000 305.000000
******* TIDL_subgraphRtInvoke done ********

********** Frame Index 4 : Running fixed point mode for calibration **********
In TIDL_runtimesPostProcessNet
In TIDL_runtimesPostProcessNet 1
In TIDL_runtimesPostProcessNet 2
In TIDL_runtimesPostProcessNet 3
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~



***************** Calibration iteration number 0 started ************************

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~



***************** Calibration iteration number 0 completed ************************



***************** Calibration iteration number 1 started ************************

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~



***************** Calibration iteration number 1 completed ************************



***************** Calibration iteration number 2 started ************************

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~



***************** Calibration iteration number 2 completed ************************



****************************************************
** ALL MODEL CHECK PASSED **
****************************************************

In TIDL_runtimesPostProcessNet 4
******* In TIDL_subgraphRtInvoke ********
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Set default TIDLRT tensor done
TIDL_RT_OVX: Running Graph ...
TIDL_RT_OVX : CP - 3363, 3136
TIDL_RT_OVX: input_sizes[0] = 228, dim = 56 padL = 1 padR = 0
TIDL_RT_OVX: input_sizes[1] = 13452, dim = 56 padT = 1 padB = 2
TIDL_RT_OVX: input_sizes[2] = 64, dim = 64
TIDL_RT_OVX: input_sizes[3] = 1, dim = 1
TIDL_RT_OVX : CP - 3363, 3136
TIDL_RT_OVX : Reformat input Buffer
TIDL_RT_OVX : ElementType - 6, 6 | Scale - 1.000000, 1.000000 | Zp - 0, 0 | Layout - 0, 0 | CP - 3363, 3136
TIDL_RT_OVX: input_buffer = 0x7f8a5806d000 215232
TIDL_RT_OVX: memset_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: vxProcessGraph ... Done.
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,

1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Sum of Layer Cycles 0
TIDL_RT_OVX : Memcpy output Buffer 0x555820ffd980 4000 191 191
TIDL_RT_OVX: elementSize = 4, OutElementType = 10 scale[0] = 1.000000, rtelemType = 6, rtZp = 0, rtScale = 1.000000
TIDL_RT_OVX: output_sizes[0] = 1000, outWidht = 1000 padL = 0 padR = 0
TIDL_RT_OVX: output_sizes[1] = 1, outHeight = 1 padT = 0 padB = 0
TIDL_RT_OVX: output_sizes[2] = 2, outNumChannels = 1
TIDL_RT_OVX: output_sizes[3] = 1, outNumBatches = 1
TIDL_RT_OVX: map_cp_out_tensor_tidlrt_tiovx ... Done.
TIDL_RT_OVX: Ran TIDL graph ... Done.
Sub Graph Stats 87.000000 4439311.000000 149.000000
******* TIDL_subgraphRtInvoke done ********

********** Frame Index 4 : Running fixed point mode for calibration **********
In TIDL_runtimesPostProcessNet
In TIDL_runtimesPostProcessNet 1
In TIDL_runtimesPostProcessNet 2
In TIDL_runtimesPostProcessNet 3
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to colle
Processing config file #0 : /home/root/examples/jupyter_notebooks/custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/191_tidl_io_.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . .. T 4327.88 .... ..... ... .... .....
# 1 . .. T 4325.01 .... ..... ... .... .....
# 2 . .. T 4323.32 .... ..... ... .... .....
# 3 . .. T 4324.00 .... ..... ... .... .....
Processing config file #0 : /home/root/examples/jupyter_notebooks/custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/191_tidl_io_.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . ..
Processing config file #0 : /home/root/examples/jupyter_notebooks/custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/191_tidl_io_.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . ..
Processing config file #0 : /home/root/examples/jupyter_notebooks/custom-artifacts/onnx/resnet18_opset9.onnx/tempDir/191_tidl_io_.qunat_stats_config.txt
Freeing memory for user provided Net
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . ..
------------------ Network Compiler Traces -----------------------------
successful Memory allocation

- custon-model-onnx_err.log 

2023-11-21 01:21:44.712169404 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.1.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712199865 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.0.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712206875 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.0.downsample.1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712212745 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.0.downsample.1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712218575 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.0.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712224286 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.1.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712230286 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.0.downsample.1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712236156 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.1.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712241646 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer1.0.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712247206 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer1.1.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712253176 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712259146 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer1.0.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712264936 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.1.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712270677 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer1.1.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712276177 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.1.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712281667 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.0.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712287177 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.0.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712292907 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.0.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712298417 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.0.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:21:44.712304357 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.1.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
PC_dsp_test_dl_algo.out: src/tidl_conv2d_base.c:1431: int32_t TIDL_refConv2dProcess(const TIDL_CreateParams*, sTIDL_AlgLayer_t*, sTIDL_Layer_t*, sTIDL_ConvParams_t*, tidlConv2dBuffParams_t*, void*, void*): Assertion `0' failed.
Aborted (core dumped)
PC_dsp_test_dl_algo.out: src/tidl_conv2d_base.c:1431: int32_t TIDL_refConv2dProcess(const TIDL_CreateParams*, sTIDL_AlgLayer_t*, sTIDL_Layer_t*, sTIDL_ConvParams_t*, tidlConv2dBuffParams_t*, void*, void*): Assertion `0' failed.
Aborted (core dumped)
PC_dsp_test_dl_algo.out: src/tidl_conv2d_base.c:1431: int32_t TIDL_refConv2dProcess(const TIDL_CreateParams*, sTIDL_AlgLayer_t*, sTIDL_Layer_t*, sTIDL_ConvParams_t*, tidlConv2dBuffParams_t*, void*, void*): Assertion `0' failed.
Aborted (core dumped)
PC_dsp_test_dl_algo.out: src/tidl_conv2d_base.c:1431: int32_t TIDL_refConv2dProcess(const TIDL_CreateParams*, sTIDL_AlgLayer_t*, sTIDL_Layer_t*, sTIDL_ConvParams_t*, tidlConv2dBuffParams_t*, void*, void*): Assertion `0' failed.
Aborted (core dumped)
PC_dsp_test_dl_algo.out: src/tidl_conv2d_base.c:1431: int32_t TIDL_refConv2dProcess(const TIDL_CreateParams*, sTIDL_AlgLayer_t*, sTIDL_Layer_t*, sTIDL_ConvParams_t*, tidlConv2dBuffParams_t*, void*, void*): Assertion `0' failed.
Aborted (core dumped)
PC_dsp_test_dl_algo.out: src/tidl_conv2d_base.c:1431: int32_t TIDL_refConv2dProcess(const TIDL_CreateParams*, sTIDL_AlgLayer_t*, sTIDL_Layer_t*, sTIDL_ConvParams_t*, tidlConv2dBuffParams_t*, void*, void*): Assertion `0' failed.
Aborted (core dumped)
2023-11-21 01:22:49.634685767 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.1.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634716338 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.0.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634723528 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.0.downsample.1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634729438 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.0.downsample.1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634735388 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.0.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634741259 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.1.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634747299 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.0.downsample.1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634752969 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.1.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634758509 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer1.0.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634764169 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer1.1.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634769959 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634775949 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer1.0.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634781759 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.1.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634794250 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer1.1.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634800050 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.1.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634805550 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer4.0.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634811050 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.0.bn1.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634817000 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer3.0.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634822650 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.0.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.
2023-11-21 01:22:49.634828450 [W:onnxruntime:, graph.cc:3106 CleanUnusedInitializers] Removing initializer 'layer2.1.bn2.num_batches_tracked'. It is not used by any node and should be removed from the model.