OMAPL138 OSCIN

paul wirtzberger

Other Parts Discussed in Thread: OMAPL138

Any recommendations on a driver for the CLK input on an OMAPL138, OSCIN pin.

As I understand it, OSCIN is a 1.2V level input, Vih = 0.96V, Vil = 0.24 and I am searching for a buffer to drive this input.

thanks
Paul

0 Brad Griffis over 14 years ago

You may need to ask in the clock forum. What about using a crystal?

0 Milan Zelenka over 12 years ago in reply to Brad Griffis

Paul,
Have you ever received an answer from TI?

Many thanks,
Milan

0 Brad Griffis over 12 years ago in reply to Milan Zelenka

I took a quick look at our OMAPL138 Low Cost Development Kit (LCDK) schematics:

I also had a quick look at the companion guide:

It makes the following comment with regard to that clock (Y3):

"24MHz, 3.3V external oscillator that provides the processor's main input clock. The output on pin 3 is passed through a voltage divider made up of R43 and R264 to convert the clock to 1.3V (same as CVDD) as required in Section 4.1 of the datasheet. "

So one option might be to simply do as they have done and use a voltage divider.

0 Milan Zelenka over 12 years ago in reply to Brad Griffis

Brad,
I do not think it is advisable to drive a system clock by means of a resistor divider due to SI and EMI concerns.

I would like to meet the TI spec with a TI push-pull logic.

Thanks,
Milan

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