Until now i have mostly been using the DSP core on the L138, but now i
hit a problem while trying to get in to this supervisor mode because i
needed to mess with the system registers, but found that the code
crashes at the _call_swi() function. After some debugging i found that
the interrupt jumps to 0x00000008 so the correct software interrupt
vector if the table was located at address 0x0. The documetation tells
me that by default the ISR table is at 0xFFFF0000 that is the beginning
of ARM ram.(I read about the bit that causes this but i need to already
be in supervisor mode to change that bit)
So to make sure its not my code messing it up i tried to run the timer
interrupt example from the rCSL2 library with the same results, and also
booting the chip in JTAG mode to make sure uBoot is not doing this,
even tried to compile and debug run the example on my laptop with the
same result.
I am using the hawkboard to run my code. Can anyone suggest why the ARM
wants to use the ISR table at 0x0 instead the supposedly default
0xFFFF0000 ?