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AM5726: PTP - PPS questions

Geoffrey Ficara
Intellectual 2410 points
Part Number: AM5726

Hi, 

My customer has been doing tests in dual mac mode, related to the PPS signal. Following the guidelines provided in this link (https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/linux/Industrial_Protocols_PTP.html#generating-1-pps) and using am572x-idk-pps.dtso as a reference.

Some questions regarding the idk-pps.dtso file.

  1. Could you clarify the purpose of “latch_timer” Timer 15?
  2. In “mac” node, there is a distinction between pps1_timer16_pwm and pps1_timer16_pwm2. Are they to output the PPS signal through two different pins?
  3. What is the specific use of pps-enable-gpios and ref-enable-gpios signals?
  4. Does “ptp_bc” node  configure the CPSW in boundary clock mode?
  5. Finally,  could you explain the function of pps-sel0-gpios and pps-sel1-gpios?

Thank you

Geoffrey

  • 0
    TI__Mastermind 19864 points

    Hello Geoffrey,

    Please allow us a couple of days to check in internally and will get back to you hopefully by the end of the week.

    -Josue

  • 0 in reply to Josue Zamitiz-Ayala
    TI__Intellectual 2410 points

    Hi,

    Can you confirm is the dts file to switch to CPSW mode is correct ?  

    &davinci_mdio {

                   phy0: ethernet-phy@1 {

                                  reg = <1>;

                   };

                   phy1: ethernet-phy@2 {

                                  reg = <2>;

                   };

    };

    &mac {

                   status = "okay";

    };

    &cpsw_emac0 {

                   phy-handle = <&phy0>;

                   phy-mode = "rgmii";

    };

    &cpsw_emac1 {

                   phy-handle = <&phy1>;

                   phy-mode = "rgmii";

    They are using ptp4l to synchronize two devices, where one device functions as a master, and the other as a slave.

    Master: ptp4l -i eth0 -2 -H -P -m -l 7

    Slave: ptp4l -i eth0 -2 -H -P -s -m -l 7

    However, they have observed the following error:

    In the documentation, they saw the recommendation to configure the parameter tx_timestamp_timeout to the value 400.

    They have incorporated this change into the ptp4l configuration file, but continue with the same error. Where the issue might be?

    Regards

    Geoffrey

  • 0 in reply to Geoffrey Ficara
    TI__Mastermind 19864 points

    Hello Geoffrey,

    The team in charge of Industrial protocols is OoO for a conference this week so I have not heard much back.

    The one disclaimer I should make is that the person that implemented this on 6.x SDK is no longer in TI and as far as I can tell none of the Industrial Protocols (I.P.) were tested and/or validated on the newer 8.x release.

    Hopefully the I.P. team will share some input by next week.

    -Josue

  • 0 in reply to Josue Zamitiz-Ayala
    TI__Mastermind 19864 points

    Geoffrey

    The industrial team has not replied at all. As I mentioned before, the person with this expertise is no longer at TI so I lack the expertise to answer your questions directly. All I have been able to find out is that the choices were done to enable the linuxptp based application. 

    This industrial protocol is no longer supported in the most recent SDK and the documentation will be updated in the next release.

    For the switch mode question I found this older thread that can be of help:

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/860858/processor-sdk-am335x-cpsw-switch-mode

    Best,

    -Josue