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AM6441: BOOTMODE and GPMC(AD) pins

Oba
Genius 17335 points
Part Number: AM6441

Hello,

My customer has a question for BOOTMODEx/ADx pins.

To configure the boot mode, extenral pull-ups/downs are required for BOOTMODEx pins.
On the other hand, they want to use these pins as GPMC ADx pins.
They are asking if they need to add a switch or somthing to disconnect the pull-ups/downs after reset.

I think these pull-ups/downs on ADx pins will not cause any probelm on GPMC operation.
What do you think? Do they need to add something switch?

Regards,
Oba

  • 0
    TI__Guru**** 192199 points

    Hello Oba,

    Thank you for the query.

    Oba said:
    I think these pull-ups/downs on ADx pins will not cause any probelm on GPMC operation.
    What do you think? Do they need to add something switch?

    This should not be a concern provided the pullup used does not influence the device operation.

    Connecting the GPMC signal from the SoC through a 0R is recommended for isolation or debug.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Genius 17335 points

    Hello Sreenivasa,

    Thanks for yor reply.

    >Connecting the GPMC signal from the SoC through a 0R is recommended for isolation or debug.

    What does it mean? What is "SoC" in thiscase? AM64x or any other ?

    Regards,
    Oba

  • 0 in reply to Oba
    TI__Guru**** 192199 points

    Hello Oba, 

    Thank you.

    Oba said:
    What does it mean? What is "SoC" in thiscase? AM64x or any other ?

    The SoC is the AM64x in this case.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Genius 17335 points

    Hello Sreenivasa,

    Thanks for you reply.
    I can't still understand the purpose of 0R and where the 0R should be put.
    Could you tell me more detail?

    Regards,
    Satoshi Obata

  • +1 in reply to Oba
    TI__Guru**** 192199 points

    Hello Oba, 

    Thank you.


    Typically GPMC will be interfaced with an external device - memory or FPGA. 
    The Bootmode/Bootstrap are Special Configuration Pins, latched on rising edge of MCU_PORz. Once latched, the pin reverts to the function selected via the pin specific mux-mode.

    The bootmode configuration is a combination of resistor dividers or pullup/pulldown.

    In case the externally attached devices are influencing the bootmode latching, the 0R helps isolate the issue. 

    if the attached device behavior is known, this provision is optional and when provided can be used during initial design.

    Regards,

    Sreenivasa