• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 2 answers
  • Subscribers 99 subscribers
  • Views 257 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM4378: EMMC Read Hold Time

Aneesh Kumar Srinivasan
Prodigy 40 points
Part Number: AM4378


Hi,

I am designing a board with the TI AM4378 processor and I wanted to know what the eMMC Read hold time requirements are. The eMMC_Data[0:7] is connected to GPMC_AD[8:15]. The CLK and CMD are connected to MMC1_CLK and MMC1_CMD respectively.

Per the datasheet there are two requirements for the MMC1 (3.3V):

but for the GPMC requirements the hold-time is lower at 2.5 ns:

Which spec do we follow? 

Thank you!

  • 0
    TI__Guru 63155 points

    The read data capture buffer for the MMC1 signals are located in the MMC1 host controller, so the timing requirements defined in the MMC1 timing section of the datasheet will apply.

    Many of the AM4378 pins have multiple signal functions that can be selected via pin multiplexing logic that sits between each pin's IO cell and its respective host controller. This multiplexing logic routes the selected signal function to its respective host controller. The MMC1 signal functions selected on the GPMC pins are routed to or from the MMC1 host controller, so the GMPC timing requirements are completely unrelated to MMC1 operation. The GPMC timing requirements will only apply when using the pins for GPMC.

    Regards,
    Paul

  • 0 in reply to peaves
    Prodigy 40 points

    Thank you for your input! I have a follow-up question to this:

    Are there delay time (registers) on the MMC1 controller that can help us delay the clock on MMC Reads?

  • 0 in reply to Aneesh Kumar Srinivasan
    TI__Guru 63155 points

    No, the timing requirements are fixed to values defined in the datasheet. You may need to implement PCB trace delays to meet the timing requirements.

    Regards,
    Paul