I have written a program that, for testing purposes, is supposed to read from McBSP0 receiver and echo the data through McBSP1 transmitter. I have set up two DMA channels for this. One reads from the receiver and the other one writes to the transmitter. When the two of them finish their block transfers, they swap addresses so that one channel overwrites the information that was just sent and the other reads the new information and sends it.
For this program, both channels have AUTOINIT enabled and REPEAT disabled. The main function continuously polls the ENDPROG bits of both channels so that when both have finished programming their registers the new settings are loaded for the next transaction.
My problem is that none of the DMA channels clear the ENDPROG bits, and never start working. Obviously I have enabled both channels. I have read the Silicon Errata document for the C5502 but the two DMA issues listed there do not apply to my case.
What condition can make a DMA channel not to clear its ENDPROG bit?
If anyone needs additional information, just ask.
Thanks in advance.