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AM623: Use PKTDMA for UART in cyclic operation

Other Parts Discussed in Thread: AM623

Hi,

In "udma_probe()" function in "k3-udma.c", there is a comment saying cyclic operation is not supported via PKTDMA.

What is the reason that PKTDMA cannot support cyclic operation?

As our application needs the cyclic operation, what option do we have?

dma_cap_set(DMA_SLAVE, ud->ddev.cap_mask);
/* cyclic operation is not supported via PKTDMA */
if (ud->match_data->type != DMA_TYPE_PKTDMA) {
dma_cap_set(DMA_CYCLIC, ud->ddev.cap_mask);
ud->ddev.device_prep_dma_cyclic = udma_prep_dma_cyclic;
}

https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/dma/ti/k3-udma.c?h=ti-linux-5.10.y

rgds,

kc Wong

  • Hi KC,

    Cyclic mode only works if the source data length is fixed, but the number of bytes in UART FIFO varies. How can you use cyclic mode with UART?

  • Hi Bin Liu,

    Oh, didn't expect that limitation because we have been using cyclic mode for UART on both SPEAr320S and i.MX6ULL.

    Anything we can do to achieve the similar behavior because our application needs that?

    rgds,

    kc Wong

  • Hi KC,

    I am curious to know how SPEAr320S and i.MX6ULL use cyclic mode for UART. Can you please point me to their UART drivers and kernel device tree?

  • SPEAr320S

    (i) drivers/tty/serial/amba-pl011.c

    (ii) drivers/dma/amba-pl08x.c



    i.MX6ULL

    (i) drivers/tty/serial/imx.c

    (ii) drivers/dma/imx-sdma.c

    So, are you the implementer for AM623 PKTDMA driver in Linux?

  • Hi KC,

    Thanks for the pointers.

    amba-pl011.c doesn't seem to use DMA cyclic mode. imx.c does use cyclic mode for UART RX. I only spent a few minutes on the driver, not sure what is the benefit of managing a RX ring buffer in the UART driver while the TTY driver already manages a separate RX ring buffer.

    Do you have any issue in using AM62x UART driver? Why do you want to use DMA cyclic mode on AM62x UART?

    I am not the developer of the AM62x PKTDMA driver, but I can read/modify most kernel code which relevant to TI processors.

  • Hi Bin Liu,

    Our project is basically migrating a 10-year old WinCE application which is originally running on SPEAr320S.

    The SPEAr320S has PrimeCell UART (PL011) and PrimeCell DMA Controller (PL080).

    PL080 has a destination address register for application to know where the DMA will write next. That destination address register basically acts like a DMA write pointer.

    Then, a circular buffer is setup to be accessible by both the application and the DMA for UART receiving.

    So, the application just has to poll that register at 10ms interval. Application will know there is new data in the buffer if the DMA write pointer is not the same as the application read pointer.

    I am trying to duplicate the same scheme using AM62x UART + DMA in Linux.

    The application is expecting the DMA to go to the start of the buffer after it reaches the end of the buffer. The buffer is setup once, then it just goes continuously in cyclic mode.

    To do that, I wrote my own custom serial DMA kernel driver (with the DMA engine APIs) with a list of IOCTL commands for UART receiving instead of using the standard Linux file APIs. Thus, it won't be going through the TTY layer.

    I have created a version of this driver for both the SPEAr320S and i.MX6ULL. Now I am creating a new version for AM62x.

    Both of them are using the dmaengine_prep_dma_cyclic() function which I believe is not available for PKTDMA.

    rgds,

    kc Wong

  • Hi KC,

    Linux kernel already provided a UART driver with DMA support for AM62x, drivers/tty/serial/8250/8250_omap.c. You don't need to create a new UART driver for AM62x.