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Original question:

TDA4VH-Q1: TDA4VH Clock Monitoring Concept

TDA4VH-Q1: TDA4VH Clock Monitoring Concept

Tobias Kärcher
Prodigy 151 points
Part Number: TDA4VH-Q1

Hello,

I am coming back on the point 1 (How many clocks can each DCC instance compare ? Can the source clocks and the reference clocks be dynamically switched during runtime ? Is this recommended given that changing the configuration in SW would increase the Diagnostic time interval) from the related ticket. Your reference here is the document "Continuous Monitor of the PLL Frequency With the DCC".

We have observed that not all DCC instances are capable to monitor the safety relevant clocks and a few of them are connected with minimum of 2 safety relevant clocks.

e.g. MAIN_PLL_8.HSDIVOUT0_CLK and MAIN_PLL_9.HSDIVOUT0_CLK are connected only to MAIN_DCC 3

 

 

Is the reconfiguration of the DCC instances during cyclic operation (normal operation) a valid usecase from TI side or a static configuration for the DCC instances is expected for the whole driving cycle as it is listed in the reference document for autonomous, real-time clock monitoring?

 

If a reconfiguration during cyclic operation is allowed, what is the maximum duration after the DCC instances are in a steady-state again, so that the DCC instances are providing valid results? The side-effect here is that the diagnostic time interval is increasing for the clock monitoring, which needs to be evaluated from the system integrator, if it is allowed.

 

Best regards,

Tobias

  • 0
    TI__Guru** 120271 points

    Hi Tobias,

    I'll check with team on the re-use of DCC.   There is likely not a technical issue with this approach, as indicated in the question it would be more from the safety angle, and if continuous monitoring is required or not.

    Regards,

    kb

  • 0 in reply to KB
    Prodigy 151 points

    Thank for checking it internally. One aspect is from safety perspective, but also the technical aspects is relevant, see:

    Tobias Kärcher said:
    If a reconfiguration during cyclic operation is allowed, what is the maximum duration after the DCC instances are in a steady-state again, so that the DCC instances are providing valid results?

    This implicitly contains also the technical aspect, because if it is a valid use case, then it should be also technical feasible and we need the details about the reconfiguration phase incl. timings, because there is then a certain time without clock monitoring which increases the diagnostic time interval.

    Best regards,

    Tobias

  • 0 in reply to Tobias Kärcher
    TI__Guru** 120271 points

    Hi Tobias,

    The TI resource required is out of office until the new year.   A response will be posted upon their return.

    Regards,

    kb

  • 0 in reply to KB
    TI__Mastermind 19960 points

    Tobias,

    DCC is a series of connected counters. In continuous mode, the timing relationship is either true or false; at the end of the "valid" time, all three counters are re-loaded.

    Not sure what "steady-state" means in this configuration.

    Kevin

  • 0 in reply to Kevin Lavery
    Prodigy 151 points

    Hi Kevin,

    so continuous mode in your feedback means, that we have a fixed configuration during the initialization of each DCC instances only once during startup and no cylic reconfiguration of the DCC instances is expected during runtime.

    Is my understanding correct?

    Tobias

  • 0 in reply to Tobias Kärcher
    TI__Mastermind 19960 points

    Tobias,

    The DCC will continuously monitor that two clock frequencies are in a fixed relation to each other. This monitor of the relative frequencies of the two clocks will continue continuously until stopped.

    It is possible to reconfigure the DCC so that it monitors different clocks continuously. 

    My response is that the DCC is purely digital logic so I am not sure what you meant by steady-state. As the person setting up the DCC, you know exactly how many cycles you expect to take per comparison.  And then you can decide how many DCC cycles you want to run...

    Kevin