TDA4VH-Q1: The locksteps of mcu domian and main domain are configured in association？

zhisong zheng

Intellectual 431 points

Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: J784S4XEVM, TDA4VH

Hi experts，

we test the lockstep mode of mcu domain of TDA4VH on J784S4XEVM.

I am using SDK8.6，Below are my test steps：

1. Compile SBL. Enter ti-processor-sdk-rtos-j784s4-evm-08_06_01_03\pdk_j784s4_08_06_01_03\packages\ti\build directory.

make -j BOARD=j784s4_evm CORE=mcu1_0 BUILD_PROFILE=release sbl_mmcsd_img

2. Compile boot_app. Enter ti-processor-sdk-rtos-j784s4-evm-08_06_01_03\pdk_j784s4_08_06_01_03\packages\ti\build directory.

make BOARD=j784s4_evm CORE=mcu1_0 boot_app_mmcsd_linux -sj

3. Generating lockstep APP

multicoreImageGen LE 55 app 27 sbl_boot_app_mmcsd_linux_j784s4_evm_mcu1_0_freertos_TestApp_release.rprc

4. Starting with SBL using SD card

5. If the R core of the main domain is also set to lock step mode, it can start normally.

6. If the R core of the main domain is not configured in lockstep mode, the startup will jam.

Log as follows：

SBL Revision: 01.00.10.01 (Nov 24 2023 - 09:43:53)
TIFS ver: 8.6.3--1-g2249f (Chill Capybara
SCISERVER Board Configuration header population... PASSED
Sciclient_setBoardConfigHeader... PASSED
Initlialzing PLLs ...done.
InitlialzingClocks ...done.
Initlialzing DDR ...done.
Initializing GTC ...Begin parsing user application
Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
Calling Sciclient_procBootRequestProcessor, ProcId 0x22...
Calling Sciclient_procBootRequestProcessor, ProcId 0x23...
Calling Sciclient_procBootRequestProcessor, ProcId 0x24...
Calling Sciclient_procBootRequestProcessor, ProcId 0x25...
Calling Sciclient_procBootRequestProcessor, ProcId 0x26...
Calling Sciclient_procBootRequestProcessor, ProcId 0x27...
Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
Calling Sciclient_procBootRequestProcessor, ProcId 0xa...
Calling Sciclient_procBootRequestProcessor, ProcId 0xb...
Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
Calling Sciclient_procBootRequestProcessor, ProcId 0x31...
Calling Sciclient_procBootRequestProcessor, ProcId 0x32...
Calling Sciclient_procBootRequestProcessor, ProcId 0x33...
Calling Sciclient_procBootRequestProcessor, ProcId 0x80...
Searching for X509 certificate ...not found
Switching core id 8, proc_id 0x1 to split mode...
Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
Enabling MCU TCMs after reset for core 8
Disabling HW-based memory init of MCU TCMs for core 8
Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
Copying 0x40 bytes to 0x0
Copying 0x25dc0 bytes to 0x41c82000
Copying 0xc500 bytes to 0x41cb8980
Copying 0x4f88 bytes to 0x41ccce80
Copying 0x1604 bytes to 0x41cd1e80
Copying 0x460 bytes to 0x41cd3488
Copying 0x448 bytes to 0x41cd38e8
Copying 0x318 bytes to 0x41cd3d30
Copying 0x100 bytes to 0x41cd4048
Copying 0x27b8 bytes to 0x41cd4148
Setting entry point for core 8 @0x0
Sciclient_procBootReleaseProcessor, ProcId 0x20...
Sciclient_procBootReleaseProcessor, ProcId 0x21...
Sciclient_procBootReleaseProcessor, ProcId 0x22...
Sciclient_procBootReleaseProcessor, ProcId 0x23...
Sciclient_procBootReleaseProcessor, ProcId 0x24...
Sciclient_procBootReleaseProcessor, ProcId 0x25...
Sciclient_procBootReleaseProcessor, ProcId 0x26...
Sciclient_procBootReleaseProcessor, ProcId 0x27...
Sciclient_procBootReleaseProcessor, ProcId 0x1...
Sciclient_procBootReleaseProcessor, ProcId 0x2...
Sciclient_procBootReleaseProcessor, ProcId 0x6...
Sciclient_procBootReleaseProcessor, ProcId 0x7...
Sciclient_procBootReleaseProcessor, ProcId 0x8...
Sciclient_procBootReleaseProcessor, ProcId 0x9...
Sciclient_procBootReleaseProcessor, ProcId 0xa...
Sciclient_procBootReleaseProcessor, ProcId 0xb...
Sciclient_procBootReleaseProcessor, ProcId 0x30...
Sciclient_procBootReleaseProcessor, ProcId 0x31...
Sciclient_procBootReleaseProcessor, ProcId 0x32...
Sciclient_procBootReleaseProcessor, ProcId 0x33...
Sciclient_procBootReleaseProcessor, ProcId 0x80...
Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
Sciclient_procBootSetProcessorCfg, ProcId 0x1, EntryPoint 0x0...
Sciclient_pmSetModuleClkFreq, DevId 0x15a @ 1000000000Hz...
Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
Skipping Sciclient_procBootSetProcessorCfg for ProcId 0x2, EntryPoint 0xfffffffe...
Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
Starting Sciserver..... PASSED

MCU R5F App started at 0 usecs
Loading BootImage

BootApp_MMCBootImageLate: fp 0x 0x41c12300, fileName is 0:/lateapp1
Searching for X509 certificate ...not found
Switching core id 10, proc_id 0x6 to split mode...
Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
Sciclient_pmSetModuleState Off, DevId 0x153...
Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
Enabling MCU TCMs after reset for core 10
Disabling HW-based memory init of MCU TCMs for core 10
Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
Setting HALT for ProcId 0x6...
Sciclient_pmSetModuleState On, DevId 0x153...
Clearing core_id 10 (lock-step) ATCM @ 0x5c00000

over 1 year ago

0 Brijesh Jadav over 1 year ago

TI__Guru**** 478015 points

Hi,

But non-lock step mode for the main domain r5f is default application load, isn't it? it should work as it is in the SDK. Can you try with the default SDK ?

Regards,

Brijesh

0 zhisong zheng over 1 year ago in reply to Brijesh Jadav

Intellectual 431 points

Hi,

The non-lock step mode for the main domain r5f is obtained from the ti-processor-sdk-rtos-j784s4-evm-08_06_01_03-prebuilt\rootfs\lib\firmware\vision_apps_evm directory directory.

0 Brijesh Jadav over 1 year ago in reply to zhisong zheng

TI__Guru**** 478015 points

Hi zheng,

ok, sorry, what's the question here? Is non-lockstep/split mode not working for you? Have you tried with default binaries from the SDK?

Regards,

Brijesh

0 zhisong zheng over 1 year ago in reply to Brijesh Jadav

Intellectual 431 points

Hi,

My question is that after the mcu domain is configured in lockstep mode, the R core of the main domain must also be configured in lockstep mode to start normally.

I used the default binaries from the SDK for testing.

0 Brijesh Jadav over 1 year ago in reply to zhisong zheng

TI__Guru**** 478015 points

Hi zheng,

zhisong zheng said:
My question is that after the mcu domain is configured in lockstep mode, the R core of the main domain must also be configured in lockstep mode to start normally.

No, this is not must requirement. MCU domain can be in lockstep mode and main domain R cores can be in split mode.. This is our default configuration and it is working fine in vision apps.

Regards,

Brijesh

0 zhisong zheng over 1 year ago in reply to Brijesh Jadav

Intellectual 431 points

Hi,

However, the result of our test based on the default SDK is that the R core of main domain is not configured in lockstep mode, and the mcu domain cannot be started normally after being configured in lockstep mode. I have attached the startup log before.

Can you tell us how you test it?

0 zhisong zheng over 1 year ago in reply to Brijesh Jadav

Intellectual 431 points

Do you have anything new to tell us?

0 Brijesh Jadav over 1 year ago in reply to zhisong zheng

TI__Guru**** 478015 points

Hi Zheng,

Sorry for the late reply. I was out of office last few days. Let me check it out and reply you in this week.

Regards,

Brijesh

0 Kangjia Dong over 1 year ago in reply to Brijesh Jadav

TI__Intellectual 2245 points

Hi Brijesh,

Any update for this issue?

0 Brijesh Jadav over 1 year ago in reply to Kangjia Dong

TI__Guru**** 478015 points

Hi Kangjia,

Not yet still checking it out.

Regards,

Brijesh

0 zhisong zheng over 1 year ago in reply to Brijesh Jadav

Intellectual 431 points

Hi Brijesh,

Any update for this issue?

0 Nikhil Dasan over 1 year ago in reply to zhisong zheng

TI__Guru* 85266 points

Hi,

Could you please confirm if the below is the step that you are following?

This is the step followed for boot app in the SDK

5.3. Boot App — Platform Development Kit (PDK) - J784S4 User Guide (ti.com)

Booting Linux via MMCSD

Generate lateapps by using the following commands

goto <PDK>/packages/ti/boot/sbl/example/boot_app/scripts
Run ./make_multicore_appimages.sh <board_name>
Multicore images(lateapps) will be generated in <PDK>/packages/ti/boot/sbl/example/boot_app/multicore_images/$BOARD/.
Stage1 image corresponds to lateapp1, stage2 image corresponds to lateapp2 and stage3 image corresponds to lateapp3.

Copy sbl_mmcsd_img_mcu1_0_release.tiimage as tiboot3.bin to the boot partition of SD card

Copy tifs.bin to the boot partition of SD card

Build boot_app_mmcsd_linux by using the following command
make BOARD=<board_name> CORE=mcu1_0 boot_app_mmcsd_linux -sj

Copy sbl_boot_app_mmcsd_linux_<board_name>_mcu1_0_freertos_TestApp_release.appimage image as app to the boot partition of SD card

Copy stage1 image as lateapp1, stage2 image as lateapp2 to the boot partition of SD card

Copy atf_optee.appimage, tidtb_linux.appimage, tikernelimage_linux.appimage to the boot partition of SD card.

Booting lateapps via MMCSD

Generate lateapps by using the following commands

goto <PDK>/packages/ti/boot/sbl/example/boot_app/scripts
Run ./make_multicore_appimages.sh <board_name>
Multicore images(lateapps) will be generated in <PDK>/packages/ti/boot/sbl/example/boot_app/multicore_images/$BOARD/.
Stage1 image corresponds to lateapp1, stage2 image corresponds to lateapp2 and stage3 image corresponds to lateapp3.

Copy sbl_mmcsd_img_mcu1_0_release.tiimage as tiboot3.bin to the boot partition of SD card

Copy tifs.bin to the boot partition of SD card

Build boot_app_mmcsd by using the following command
make BOARD=<board_name> CORE=mcu1_0 boot_app_mmcsd -sj

Copy sbl_boot_app_mmcsd_<board_name>_mcu1_0_freertos_TestApp_release.appimage image as app to the boot partition of SD card

Copy stage1 image as lateapp1, stage2 image as lateapp2 and stage3 image as lateapp3 to the boot partition of SD card

May I know which of the above are you trying?

This is for lockstep MCU1_0 and split-mode MCU2_0

Regards,

Nikhil

0 zhisong zheng over 1 year ago in reply to Nikhil Dasan

Intellectual 431 points

I followed the Booting Linux via MMCSD process.

+1 Nikhil Dasan over 1 year ago in reply to zhisong zheng

TI__Guru* 85266 points

We were able to reproduce and identify the cause of this issue.

I have raised the jira for the same,

[PDK-13747] [J784s4] Boot App MCU1_0 Lock step mode crashes when loading MCU2_0 (lateapp) in split mode - Texas Instruments JIRA (ti.com)

but the current workaround would be to hardcode the below in the function SBL_SetupCoreMem() in the file pdk_j784s4_08_06_00_31/packages/ti/boot/sbl/soc/k3/sbl_slave_core_boot.c

- uint32_t atcm_size = sblAtcmSize();

- uint32_t btcm_size = sblBtcmSize();

+ uint32_t atcm_size = 0x8000;

+ uint32_t btcm_size = 0x8000;

Explaination:

When MCU1_0 is in lockstep mode, the ATCM and BTCM sizes are 64KB, whereas they are 32KB when in split mode.

The issue with the api sblAtcmSize(); and sblBtcmSize(); is that, since they read registers to get the size and SBL is running on MCU1_0, hence the register read is of MCU1_0 and the size for the same is assumed for other cores.

This is valid if MCU1_0 is in split mode and size is 32KB, other cores would also be in split mode and size as 32KB.

So if we do memset(), it will only access 32KB.

But if MCU1_0 is in lock_step mode and size is 64KB, where as other cores in split mode are still in 32KB, resulting in accessing of region outside their reach causing core to crash.

If MCU1_0 is in lock_step mode and size is 64KB and other cores are also in lock-step mode, then their sizes are also 64KB, so you won’t see the issue here.

Could you please try this at your end and let me know if this resolves the issue.

Regards,

Nikhil

0 zhisong zheng over 1 year ago in reply to Nikhil Dasan

Intellectual 431 points

Yeah，This solution is the same as the one we currently use and can be started normally.

+1 Nikhil Dasan over 1 year ago in reply to zhisong zheng

TI__Guru* 85266 points

Thank you for the confirmation. I shall check the JIRA internally and let you know when a fix for the same would be available.

Meanwhile, I believe you are currently unblocked on this issue.

Regards,

Nikhil

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TDA4VH-Q1: The locksteps of mcu domian and main domain are configured in association？