Regarding the Core-Pac's Perfetch from MSMC buffer, and please point me to a more appropriate forum if there is, but
in SPRUGW0B (CorePac User Guide) (Section 7.5.3), we are warned of possible prefetch-buffer-coherency issues when said memory is accessed by multiple cores.
Notably, the entire section mentions prefetching only in the context of Cache (both L1 and L2) accesses
The questions then are,
1. is it true that MSMC prefetching is performed only upon cache read requests from MSMC?
2. if so, then this would presumably means that marking a block of memory as non-cacheable also marks it, if you will, non-pre-fetchable?
At the risk of restating the obvious,
3. Does marking a memory region as non-cacheable also render it, if you will, "non-prefetchable"?
