Hi all,
We are using SPI in Linux user space via spidev in C at the moment to realize our implementation reading several ADC converters (ADS12xx). One thing we realized is that only certain SPI speeds work. When we enter the non-working SPI speeds nothing shows up on our scope at all, guessing that the driver in Linux or something else fails silently.
Speeds where everything works flawlessly are e.g.: 19.2 MHz, 8 MHz, 6.4 MHz, 4 MHz, 3.2 MHz, 1.6 MHz, 800 kHz
Non working speeds (nothing happens at all on scope): 5 MHz, 3200001 Hz, 3199999 Hz, 2 MHz, 1 MHz, 400 kHz, ... many others
We are using the device tree k3-am642-sk.dts with the added SPI entries shown below.
&main_spi0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_spi0_pins_default>; ti,pindir-d0-out-d1-in; cs-gpios = <0>, <0>; spidev_0_0: spidev@0{ compatible = "rohm,dh2228fv"; reg = <0>; spi-max-frequency = <4000000>; spi-cpha = <1>; //spi-cpol = <1>; }; spidev_0_1: spidev@1{ compatible = "rohm,dh2228fv"; reg = <1>; spi-max-frequency = <4000000>; spi-cpha = <1>; //spi-cpol = <1>; }; }; &main_spi1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_spi1_pins_default>; ti,pindir-d0-out-d1-in; cs-gpios = <0>, <0>; spidev_1_0: spidev@0{ compatible = "rohm,dh2228fv"; reg = <0>; spi-max-frequency = <4000000>; spi-cpha = <1>; //spi-cpol = <1>; }; spidev_1_1: spidev@1{ compatible = "rohm,dh2228fv"; reg = <1>; spi-max-frequency = <4000000>; spi-cpha = <1>; //spi-cpol = <1>; }; };
We are aware that SPI uses a clock divider and the final clock is dependent on that configuration, which is why odd numbers like 3200001 are probably not achievable (source: datasheet/ref man and https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf page 14). We have also looked into the kernel driver in the spi-omap2-mcspi.c file at the "omap2_mcspi_calc_divisor" and "omap2_mcspi_setup_transfer" functions, but haven't seen the point where it should fail. As far as I understand the functionality should be: if the exact frequency/speed is not available it will find the next lower possible one supported and use that.
Now we have two concerns:
1. Everything works as expected for us with the working frequencies of e.g. 3.2 MHz and we can just move on with our application. It would be helpful from your side if you can confirm that the behavior described above (SPI fails silently for non supported speeds) is how it is intended to be by TI. We only have to be aware that things might fail if we change something in the clock tree. If that behavior is not how it should be (instead it should gracefully choose a lower frequency and still work), we will have to investigate further.
2. How do we find out the available frequencies or examples of it? Do you have documentation on that specific topic somewhere? Do we have to figure out the working frequencies ourselves depending on the clock tree?
A little background to our concerns: On our roadmap in the future we would like to reduce clock speeds on the AM64 to reduce power consumption at some point. We are concerned how the SPI will behave then and how we need to calculate the SPI clock speeds without things failing silently.
Best regards,
Ergin