c6747 External Memory Touch Program

I have tested memory touch program for external memory with cache enabled. I have following results.

Questions:

1) When do we use touch function? How can we optimize on the access times?

2) Is direct access of external memory (with Cache enabled) is better than touch before access?

3) The results here show that sum of Touch+Access is greater than without touch? Any reason behind it?

4) Also Read and Write access times are different? Why is this so?

5) Can I take these no.of cycles (Optimization in the build option is 0)? If I relate them to access then 26667/8K bytes = approximately 3 cycles per byte? And similarly read less than 3 cycles per byte? How do we interpret these results?

Reference L1D access for the same function:

#define SIZE_OF_ARR (1024*8)

#pragma DATA_ALIGN(Externbuf,256)

#pragma DATA_SECTION(Externbuf, ".DDRData:Externbuf")

char Externbuf[SIZE_OF_ARR];

#pragma CODE_SECTION(testWrite, ".L1Code:testWrite")

void testWrite(char *pBuf, int len)

{

register int i, len2 = len/4;

register int *ptr = (int *) pBuf;

register int val = 0x12345678;

for (i=0;i<len2;i++)

{

ptr[i]=val;

}

}

#pragma CODE_SECTION(testRead, ".L1Code:testRead")

int testRead(char *pBuf, int len)

{

register int i, sum, len2 = len/4;

register int *ptr = (int *) pBuf;

for (i=0;i<len2;i++)

{

sum = ptr[i];

}

return(sum);

}

test()

{

BCACHE_wbInvAll(); // 8011 cycles

BCACHE_inv(Externbuf, SIZE_OF_ARR, TRUE); // 2811 cycles for 8K

if(touchenable) touch(Externbuf,SIZE_OF_ARR);

testRead(Externbuf,SIZE_OF_ARR);

testRead(Externbuf,SIZE_OF_ARR);

testRead(Externbuf,SIZE_OF_ARR);

testRead(Externbuf,SIZE_OF_ARR);

if(touchenable) touch(Externbuf,SIZE_OF_ARR);

BCACHE_wbInvAll(); // 8011 cycles

BCACHE_inv(Externbuf, SIZE_OF_ARR, TRUE); // 2811 cycles for 8K

if(touchenable) touch(Externbuf,SIZE_OF_ARR);

testWrite(Externbuf,SIZE_OF_ARR);

testWrite(Externbuf,SIZE_OF_ARR);

testWrite(Externbuf,SIZE_OF_ARR);

testWrite(Externbuf,SIZE_OF_ARR);

if(touchenable) touch(Externbuf,SIZE_OF_ARR);

}