Hi all
1, I want to make sure my understanding about the IBL is correct.
The IBL resides in I2C rom. Based on the I2C boot description, there should be 3 parameter tables in the I2C rom, each parameter table points to a boot table which boots DSP from NAND NOR or ETH separately. And the boot table performs the following things:
1). PLL bug fix
2). Initialize core, PLL and corresponding peripheral
3). Moving app data/program to ram form corresponding storage location.
4). Jump to the app entry point.
2, Forgive me if it's a silly question. I used to boot C6455 from EMIF using NOR flash. In that project, I use a secondary bootloader to load program into ram. A section ".bootloader" which contains the secondary bootloader is used, and this section resides at the beginning of the NOR flash memory map. After POR C6455 bootroom code will copy 1K bytes (which contains the bootloader) to 0x00000000, then execute from that address and those addresses are reserved according to datasheet. The question is: If my understanding about IBL above is right, where the boot table will be moved to in the C6678 memory map? I suppose it is 0x804000 according to "ibl_common.inc". Is it right that my app code can not use those addresses since the boot table already occupied?
3, Why the IBL build process differs from the secondaryBoot_PLLfix? I mean I can't find the hex6x or romparse in the IBL build process.
Any help / suggestion would be greatly appreciated!
Han
