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Synchronization between McASP0 and McASP1

Lihong
Prodigy 100 points
Other Parts Discussed in Thread: OMAP-L137

I am using C6747 on Spectrum Digital's OMAP-L137 evm board. I want to use a single I2S clock signal (bit clock and frame sync clock)  to control both McASP0 and McASP1 for up to 28 channels, and to serve them using EDMA. However the AIC3106 codec is only connected to mcasp1. So i connect to the expansion board to use McASP0. How can i get the synchronized McASP0 and McASP1?

  • 0
    TI__Mastermind 29141 points

    You could tie the frame-sync and clock signals for both McASPs together.  If both McASPs are slaves (i.e. clock and frame are driven by AIC) set McASP clock and frame pins to input.  If one of the McASPs is master (i.e. one McASP drives clock and frame), you can one McASP to output and one to input.  The frame and clock direction are set thorugh the Pin Direction Register (PDIR) of the McASP. 

    You should also set the transmitter and receiver in each McASP to opeate in sync mode (ACLKXCTL register, ASYNC bit = 0).  In sync mode, you only need to drive the clock and frame to the transmitter pins (AFSX and ACLKX) and leave the receiver pins (ACLKR and AFSR) disconnected.

  • 0 in reply to Gus Martinez
    Expert 1080 points

    I am using both McASP0 and McASP1 on the C6747 successfully.  I prefer to generate external bit and word clocks (say from one of the A/D converters) and use that as a master clock feeding both McASPs.  You only need to feed bit and word clocks to the McASP in this mode. i.e. no AHCLKRCTL.  Both McASPs are then in slave i2s mode.