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AM620-Q1: CPSW3G Reset Sources

jeremy borgman
Prodigy 130 points
Part Number: AM620-Q1

Hello,

I am having a hard time figuring out under what circumstances the CPSW3G in the AM620-Q1 is reset. I can see that its part of the PD_CPSW power domain and clear that it will be reset during a POR reset.I can also see there are ways to isolate the reset from the MCU and MAIN domains. But my question is:

1.) If the MCU goes through a software reset, can I isolate the CPSW3G from the reset

2.) If the MAIN domain goes through a software reset can I isolate the CPSW3G from the reset.

The reason I would want to do this is I have external devices on the external Ethernet ports and I would not want to interrupt thier communication when the CPU goes through a software update or reset.

Thanks

  • +1
    TI__Mastermind 40090 points

    Hi,

    To answer Q1, a MCU reset will cause the entire device to reset. This is based on what I find with 6.3.1.2 MAIN Domain Supported Resets. This would mean the CPSW will be reset no matter which domain is controlling it.

    Q2, this depends on the SW used. While the device supports CPSW reset isolation the Linux driver does not. I am assuming Linux is in use and the CPSW is operating out of the Main domain.

    To add further commentary to your reason for the question is that I have seen solutions that have an external HW isolation of the Ethernet to handle the use cases that you describe. I am assuming that your case would have the CPSW configured for switch/bridge mode.

    Best Regards,

    Schuyler