hi there
my application can be simplified as using an omap3530 board to access(asynchronous, none-muxed, single) two peripheral SRAMs thru the GPMC module.
i think register GPMC_CONFIG1-7 are all the ones i have to configure in this application, right? secondly, every timing parameter is scaled by GPMC_FCLK, its source is CORE_L3_ICLK, who's source is CORE_CLK, who's source is CLKOUT, which is generated by DPLL3. Well, I still have no idea about the exact frequency of GPMC_FCLK , how can i get it?
T_T...
could anyone help me?
