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TDA4VH-Q1: reducemax layer get a wrong output on tda4vh board

Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH

hello,

   when I run a test model only have reducemax layer like below, it can get a right result on pc import but wrong on tda4vh.

the output on tda4  only channel (0, 2,  4 ...)  is right,  channel (1, 3,  5 ...) is filled with zero.

I guess code should be ok, memory or hardware led to this?