AM69A: AM69A, J784S4, SERDES -> XFI/USXGMII CLOCK

Hi,

d_zero said:

if we use XFI/USXGMII interface on SERDES2  AM69A do we need to supply 156.25MHz clock to the SERDES2_REFCLK_x pins? 

No need to provide 156.25MHz clock in SERDES_REFCLK_x Pins.

d_zero said:

Or is there internal clock of 156.25MHz from PLL3 that can be used?

Yes, Internal clock from PLL3_HSDIV4 is available for generation of 156.25MHz for XFI/USXGMII.

d_zero said:

if there is an internal PLL that outputs 156.25MHz clock, can we output this clock on the SERDES2_REFCLK_x pins and rout them to our device?

I think you can get 156.25MHz signal on REFCLK Pins, Let me confirm with our H/W expert.

d_zero said:

what is the default setting of SERDES2_REFCLK_x pins (input or output) , and how to set them to output?

These are output Pins when SerDes configuration is not PCIe, If PCIe is selected then pins will be Input Mode. Let me reconfirm the same with our H/W expert.

d_zero said:

when the clock is outputted on SERDES2_REFCLK_x pins where can we find the electrical specification of this clock?

The Lines are 1.8V, Please refer to TD for more details.


Best Regards,
Sudheer

Yes, 156.25MHz internal ref clk is coming out from the PLL3_HSDIV4 and yes it can be output onto the ref clk pins for external routings.

HI Rao,

thank you for the feedback.

Can you tell following when the pins SERDES2_REFCLK_x (AV22 AV21) are configured as LVDS output to provide 156.25MHz clk to phy

-> i assume the those pins are referenced to VDDA_1P8_SERDES2 (AH21 AJ23) ?

-> what is the Vcm common voltage of the LVDS signal?

-> what is the Vod swing voltage of the LVDS signal?

/| also what is the jitter (Reference clock jitter tolerance (12 kHz – 20 MHz) and the stability in ppm of this output clock?

Best Regards,

d.

We have not measured the clock jitter performance when this is set to output mode.

In my opinion, since this clock is common to the SoC and the PHY, the jitter / electrical specs seen will be common to both and will cancel out.

Yes, the clock output swing is 1.8V.

Hi Rao,

can you please specify Vcm ( output common-mode voltage) and Vod ( differential output voltage)?

Is the Vcm = 1.8V /2 = 0.9V ? and how much is Vod?

Best Regards,

d.

d, I will confirm this soon after consulting with the team.

Hi Rao,

please can you elaborate or draw on the picture? If Vcm= 0.3V and Vod= 1.1V then this can go into negative voltage?

Br,

d.

From what I see from the char data which also matches the sim data, the Vcrossing for the default is 0.3V (Vcommon mode (Vp+Vn)/2) and the differential swing voltage is ~1V (Vp-Vn). and yes, the Vol will go negative.