Part Number: J721S2XSOMXEVM
Other Parts Discussed in Thread: TCA6408
Hi TI support,
I am trying to route output from the single camera application to the CSITX output port on the J721S2XSOMXEVM board (connector J9). I am using the J721S2XSOMXEVM module in conjunction with a common processor board and fusion application card, and am running vision app code based off of the 08_05_00_36 RTOS PSDK The single camera application works fine when directing its output to the eDP port, but when I modify the code by applying the patch found here:
I don't see any MIPI output at the J9 connector, even though the OpenVx graph verifies and executes properly, and shows that the CSITX object is present and being executed once per frame.
I did notice from the J721S2XSOMXEVM module's schematic that the CSITX output being routed to connector J9 is the output from TX D-PHY 01, which in turn outputs data from the J721S2's second CSITX block. As such, I modified the function appCsi2TxInit() in vision_apps/utils/hwa/src to power on the TX1 D-PHY, and configure it to receive its input from the CSI_TX1 block rather than the DSI1 block. I also modified the single camera application to set the csitx node target as TIVX_TARGET_CSITX2 rather than TIVX_TARGET_CSITX. I also tried installing the CSITX driver patch CSITX_SUPPORT_FOR_MULTIPLE instance, thinking that perhaps even though I am not using CSI_TX0, this patch is necessary when using the CSI_TX1 port. None of these changes, however, resulted in MIPI output at the CSITX output connector.
Are there any additional configuration steps needed in the J721S2 to enable CSI_TX1 output from the chip's TX1 D-PHY output? It seems like I've still missing some setting or other that is needed to enable output over this channel.
I am attaching copies of my app_hwa.c and app_single_cam_main.c files, as well as console output from a run of the single camera application using this code. Please let me know if you have any suggestions on how to resolve this problem.
Thanks.
-Pete Tucker
/*
*
* Copyright (c) 2018 Texas Instruments Incorporated
*
* All rights reserved not granted herein.
*
* Limited License.
*
* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
* license under copyrights and patents it now or hereafter owns or controls to make,
* have made, use, import, offer to sell and sell ("Utilize") this software subject to the
* terms herein. With respect to the foregoing patent license, such license is granted
* solely to the extent that any such patent is necessary to Utilize the software alone.
* The patent license shall not apply to any combinations which include this software,
* other than combinations with devices manufactured by or for TI ("TI Devices").
* No hardware patent is licensed hereunder.
*
* Redistributions must preserve existing copyright notices and reproduce this license
* (including the above copyright notice and the disclaimer and (if applicable) source
* code license limitations below) in the documentation and/or other materials provided
* with the distribution
*
* Redistribution and use in binary form, without modification, are permitted provided
* that the following conditions are met:
*
* * No reverse engineering, decompilation, or disassembly of this software is
* permitted with respect to any software provided in binary form.
*
* * any redistribution and use are licensed by TI for use only with TI Devices.
*
* * Nothing shall obligate TI to provide you with source code for the software
* licensed and provided to you in object code.
*
* If software source code is provided to you, modification and redistribution of the
* source code are permitted provided that the following conditions are met:
*
* * any redistribution and use of the source code, including any resulting derivative
* works, are licensed by TI for use only with TI Devices.
*
* * any redistribution and use of any object code compiled from the source code
* and any resulting derivative works, are licensed by TI for use only with TI Devices.
*
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
*
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* DISCLAIMER.
*
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <utils/mem/include/app_mem.h>
#include <utils/udma/include/app_udma.h>
#include <utils/hwa/include/app_hwa.h>
#include <utils/console_io/include/app_log.h>
#include <utils/sciclient/include/app_sciclient_wrapper_api.h>
#include <utils/remote_service/include/app_remote_service.h>
#include <utils/ipc/include/app_ipc.h>
#include <ti/drv/vhwa/include/vhwa_m2mLdc.h>
#include <ti/drv/vhwa/include/vhwa_m2mMsc.h>
#include <ti/drv/vhwa/include/vhwa_m2mViss.h>
#include <TI/j7_viss_srvr_remote.h>
#if !defined(SOC_AM62A)
#include <ti/drv/vhwa/include/vhwa_m2mNf.h>
#include <ti/drv/vhwa/include/vhwa_m2mSde.h>
#include <ti/drv/vhwa/include/vhwa_m2mDof.h>
#include <ti/drv/csirx/csirx.h>
#include <ti/drv/csitx/csitx.h>
#endif
#define APP_DEBUG_VHWA
#if defined(VPAC3L)
#undef ENABLE_DOF
#undef ENABLE_SDE
#undef ENABLE_NF
#else
#define ENABLE_DOF
#define ENABLE_SDE
#define ENABLE_NF
#endif
#define ENABLE_MSC
#define ENABLE_VISS
#define ENABLE_LDC
/* below define's set max limits for line width in order to
* reserved space in SL2 for VHWA modules during init
*/
#if defined (VPAC3L)
#define APP_UTILS_VHWA_MAX_IN_IMG_WIDTH (2592U)
#else
#define APP_UTILS_VHWA_MAX_IN_IMG_WIDTH (1920U)
#endif
#define APP_UTILS_VHWA_IN_IMG_CCSF (FVID2_CCSF_BITS12_UNPACKED16)
#define APP_UTILS_VHWA_MAX_IN_IMG_BUFF_DEPTH (6)
#if defined (VPAC3L)
#define APP_UTILS_VHWA_MAX_OUT_IMG_WIDTH (2592U)
#else
#define APP_UTILS_VHWA_MAX_OUT_IMG_WIDTH (1920U)
#endif
#define APP_UTILS_VHWA_OUT_IMG_CCSF (FVID2_CCSF_BITS12_UNPACKED16)
#define APP_UTILS_VHWA_MAX_OUT_IMG_BUFF_DEPTH (2)
#if defined(VPAC3)
#define APP_UTILS_VHWA_LDC_MAX_BLOCK_WIDTH (128)
#define APP_UTILS_VHWA_LDC_MAX_BLOCK_HEIGHT (64)
#elif defined(VPAC3L)
#define APP_UTILS_VHWA_LDC_MAX_BLOCK_WIDTH (64)
#define APP_UTILS_VHWA_LDC_MAX_BLOCK_HEIGHT (64)
#elif defined(VPAC1)
#define APP_UTILS_VHWA_LDC_MAX_BLOCK_WIDTH (192)
#define APP_UTILS_VHWA_LDC_MAX_BLOCK_HEIGHT (80)
#endif
static void appVhwaVpacMscInit(Vhwa_M2mMscSl2AllocPrms *sl2Prms)
{
uint32_t cnt;
uint32_t idx;
for(cnt = 0; cnt < VHWA_M2M_MSC_MAX_INST; cnt++)
{
for(idx = 0; idx < VHWA_M2M_MSC_MAX_IN_CHANNEL; idx++)
{
sl2Prms->maxInWidth[cnt][idx] = APP_UTILS_VHWA_MAX_IN_IMG_WIDTH;
sl2Prms->inCcsf[cnt][idx] = APP_UTILS_VHWA_IN_IMG_CCSF;
sl2Prms->inBuffDepth[cnt][idx] = APP_UTILS_VHWA_MAX_IN_IMG_BUFF_DEPTH;
}
}
for(cnt = 0; cnt < MSC_MAX_OUTPUT; cnt++)
{
sl2Prms->maxOutWidth[cnt] = APP_UTILS_VHWA_MAX_OUT_IMG_WIDTH;
sl2Prms->outCcsf[cnt] = APP_UTILS_VHWA_OUT_IMG_CCSF;
sl2Prms->outBuffDepth[cnt] = APP_UTILS_VHWA_MAX_OUT_IMG_BUFF_DEPTH;
}
}
int32_t appFvid2Init(void)
{
int32_t retVal = FVID2_SOK;
Fvid2_InitPrms initPrmsFvid2;
appLogPrintf("FVID2: Init ... !!!\n");
Fvid2InitPrms_init(&initPrmsFvid2);
initPrmsFvid2.printFxn = appLogPrintf;
retVal = Fvid2_init(&initPrmsFvid2);
if(retVal!=FVID2_SOK)
{
appLogPrintf("FVID2: ERROR: Fvid2_init failed !!!\n");
}
appLogPrintf("FVID2: Init ... Done !!!\n");
return (retVal);
}
int32_t appFvid2DeInit(void)
{
int32_t retVal = FVID2_SOK;
retVal = Fvid2_deInit(NULL);
if(retVal!=FVID2_SOK)
{
appLogPrintf("FVID2: ERROR: Fvid2_deInit failed !!!\n");
}
return (retVal);
}
#if !defined(SOC_AM62A)
int32_t appCsi2RxInit(void)
{
int32_t status = FVID2_SOK;
Csirx_InitParams initPrmsCsirx;
appLogPrintf("CSI2RX: Init ... !!!\n");
SET_DEVICE_STATE_ON(TISCI_DEV_CSI_PSILSS0);
SET_DEVICE_STATE_ON(TISCI_DEV_CSI_RX_IF0);
SET_DEVICE_STATE_ON(TISCI_DEV_CSI_RX_IF1);
#if defined(SOC_J784S4)
SET_DEVICE_STATE_ON(TISCI_DEV_CSI_RX_IF2);
#endif
SET_DEVICE_STATE_ON(TISCI_DEV_DPHY_RX0);
SET_DEVICE_STATE_ON(TISCI_DEV_DPHY_RX1);
#if defined(SOC_J784S4)
SET_DEVICE_STATE_ON(TISCI_DEV_DPHY_RX2);
#endif
Csirx_initParamsInit(&initPrmsCsirx);
initPrmsCsirx.drvHandle = appUdmaCsirxCsitxGetObj();
status = Csirx_init(&initPrmsCsirx);
if(status!=FVID2_SOK)
{
appLogPrintf("CSI2RX: ERROR: Csirx_init failed !!!\n");
}
appLogPrintf("CSI2RX: Init ... Done !!!\n");
return (status);
}
int32_t appCsi2TxInit(void)
{
int32_t status = FVID2_SOK;
uint32_t regVal = 0U, unlocked = 0U;
Csitx_InitParams initPrmsCsitx;
appLogPrintf("CSI2TX: Init ... !!!\n");
SET_DEVICE_STATE_ON(TISCI_DEV_CSI_PSILSS0);
#if defined(SOC_J721S2) || defined(SOC_J784S4)
SET_DEVICE_STATE_ON(TISCI_DEV_CSI_TX_IF_V2_0);
SET_DEVICE_STATE_ON(TISCI_DEV_CSI_TX_IF_V2_1);
SET_DEVICE_STATE_ON(TISCI_DEV_DPHY_TX1);
#else
SET_DEVICE_STATE_ON(TISCI_DEV_CSI_TX_IF0);
#endif
SET_DEVICE_STATE_ON(TISCI_DEV_DPHY_TX0);
regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
CSL_MAIN_CTRL_MMR_CFG0_LOCK1_KICK0);
if ((regVal & 0x1) == 0U)
{
/* Unlock MMR */
unlocked = 1U;
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
CSL_MAIN_CTRL_MMR_CFG0_LOCK1_KICK0,
0x68EF3490U);
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
CSL_MAIN_CTRL_MMR_CFG0_LOCK1_KICK1,
0xD172BC5AU);
appLogPrintf("Unlocked MMR to program CSITX DPHY register ... !!!\n");
}
/* Select CSITX0 as the source for DPHYTX0 */
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
CSL_MAIN_CTRL_MMR_CFG0_DPHY_TX0_CTRL,
0x1);
#if defined(SOC_J721S2) || defined(SOC_J784S4)
/* Select CSITX1 as the source for DPHYTX1 */
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
CSL_MAIN_CTRL_MMR_CFG0_DPHY_TX1_CTRL,
0x1);
#endif
/* Lock MMR back if unlocked here */
if (unlocked == 1U)
{
CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
CSL_MAIN_CTRL_MMR_CFG0_LOCK1_KICK0,
0U);
appLogPrintf("Locked MMR after programming CSITX DPHY register ... !!!\n");
}
Csitx_initParamsInit(&initPrmsCsitx);
initPrmsCsitx.drvHandle = appUdmaCsirxCsitxGetObj();
status = Csitx_init(&initPrmsCsitx);
if(status!=FVID2_SOK)
{
appLogPrintf("CSI2TX: ERROR: Csitx_init failed !!!\n");
}
appLogPrintf("CSI2TX: Init ... Done !!!\n");
return (status);
}
int32_t appCsi2RxDeInit(void)
{
int32_t retVal = FVID2_SOK;
retVal = Csirx_deInit();
if(retVal!=FVID2_SOK)
{
appLogPrintf("CSI2RX: ERROR: Csirx_deInit failed !!!\n");
}
return (retVal);
}
int32_t appCsi2TxDeInit(void)
{
int32_t retVal = FVID2_SOK;
retVal = Csitx_deInit();
if(retVal!=FVID2_SOK)
{
appLogPrintf("CSI2TX: ERROR: Csitx_deInit failed !!!\n");
}
return (retVal);
}
int32_t appVhwaDmpacInit()
{
int32_t status = FVID2_SOK;
appLogPrintf("VHWA: DMPAC: Init ... !!!\n");
#if defined(ENABLE_DOF) || defined(ENABLE_SDE)
SET_DEVICE_STATE_ON(TISCI_DEV_DMPAC0);
#endif
#if defined(ENABLE_SDE)
SET_DEVICE_STATE_ON(TISCI_DEV_DMPAC0_SDE_0);
#endif
#if defined(ENABLE_DOF)
Vhwa_M2mDofSl2AllocPrms sl2AllocPrms;
Vhwa_M2mDofInitParams initPrms;
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: DOF Init ... !!!\n");
#endif
/* Initialize DOF Init parameters */
Vhwa_m2mDofInitParamsInit(&initPrms);
/* Set UDMA driver handle */
initPrms.udmaDrvHndl = appUdmaGetObj();
status = Vhwa_m2mDofInit(&initPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: DOF Init Failed !!!\n");
}
else
{
/* Initilize SL2 parameters */
Vhwa_M2mDofSl2AllocPrmsInit(&sl2AllocPrms);
status = Vhwa_m2mDofAllocSl2(&sl2AllocPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: DOF SL2 Alloc Failed !!!\n");
}
else
{
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: DOF Init ... Done !!!\n");
#endif
}
}
#endif
#if defined(ENABLE_SDE)
/* SDE */
if (0 == status)
{
Vhwa_M2mSdeSl2AllocPrms sl2AllocPrms;
Vhwa_M2mSdeInitParams initPrms;
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: SDE Init ... !!!\n");
#endif
/* Initialize SDE Init parameters */
Vhwa_M2mSdeInitParamsInit(&initPrms);
/* Set UDMA driver handle */
initPrms.udmaDrvHndl = appUdmaGetObj();
status = Vhwa_m2mSdeInit(&initPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: SDE Init Failed !!!\n");
}
else
{
/* Initilize SL2 parameters */
Vhwa_M2mSdeSl2AllocPrmsInit(&sl2AllocPrms);
status = Vhwa_m2mSdeAllocSl2(&sl2AllocPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: SDE SL2 Alloc Failed !!!\n");
}
else
{
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: SDE Init ... Done !!!\n");
#endif
}
}
}
#endif
appLogPrintf("VHWA: DMPAC: Init ... Done !!!\n");
return (status);
}
int32_t appVhwaDmpacDeInit()
{
#if defined(ENABLE_DOF)
Vhwa_m2mDofDeInit();
#endif
#if defined(ENABLE_SDE)
Vhwa_m2mSdeDeInit();
#endif
return (0);
}
#endif /* !defined(SOC_AM62A) */
int32_t appVhwaVpacInit(uint32_t vpacInst)
{
int32_t status = FVID2_SOK;
appLogPrintf("VHWA: VPAC Init ... !!!\n");
#if defined(ENABLE_LDC) || defined(ENABLE_MSC) || defined(ENABLE_NF) || defined(ENABLE_VISS)
if (0u==vpacInst)
{
SET_DEVICE_STATE_ON(TISCI_DEV_VPAC0);
}
#if defined(SOC_J784S4)
else if (1u==vpacInst)
{
SET_DEVICE_STATE_ON(TISCI_DEV_VPAC1);
}
#endif
else
{
appLogPrintf("VHWA: ERROR: Unsupported VPAC instance!!!\n");
status = FVID2_EFAIL;
}
#endif
#if defined(ENABLE_LDC)
/* LDC */
if (0 == status)
{
Vhwa_M2mLdcSl2AllocPrms sl2AllocPrms;
Vhwa_M2mLdcInitParams initPrms;
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: LDC Init ... !!!\n");
#endif
/* Initialize LDC Init parameters */
Vhwa_m2mLdcInitParamsInit(&initPrms);
/* Set UDMA driver handle */
#if defined(SOC_AM62A)
initPrms.udmaDrvHndl = NULL;
#else
initPrms.udmaDrvHndl = appUdmaGetObj();
#endif
status = Vhwa_m2mLdcInit(&initPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: LDC Init Failed !!!\n");
}
else
{
Vhwa_M2mLdcSl2AllocPrmsInit(&sl2AllocPrms);
sl2AllocPrms.maxBlockWidth = APP_UTILS_VHWA_LDC_MAX_BLOCK_WIDTH;
sl2AllocPrms.maxBlockHeight = APP_UTILS_VHWA_LDC_MAX_BLOCK_HEIGHT;
status = Vhwa_m2mLdcAllocSl2(&sl2AllocPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: LDC SL2 Alloc Failed !!!\n");
}
else
{
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: LDC Init ... Done !!!\n");
#endif
}
}
}
#endif
#if defined(ENABLE_MSC)
/* MSC */
if (0 == status)
{
Vhwa_M2mMscInitParams initPrms;
Vhwa_M2mMscSl2AllocPrms sl2Prms;
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: MSC Init ... !!!\n");
#endif
Vhwa_m2mMscInitParamsInit(&initPrms);
#if defined(SOC_AM62A)
initPrms.drvHandle = NULL;
#else
initPrms.drvHandle = appUdmaGetObj();
#endif
status = Vhwa_m2mMscInit(&initPrms);
if (0 == status)
{
appVhwaVpacMscInit(&sl2Prms);
status = Vhwa_m2mMscAllocSl2(&sl2Prms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: MSC SL2 Alloc Failed !!!\n");
}
else
{
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: MSC Init ... Done !!!\n");
#endif
}
}
else
{
appLogPrintf("VHWA: ERROR: MSC Init Failed !!!\n");
}
}
#endif
#if defined(ENABLE_NF)
/* NF */
if (0 == status)
{
Vhwa_M2mNfSl2AllocPrms sl2AllocPrms;
Vhwa_M2mNfInitPrms initPrms;
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: NF Init ... !!!\n");
#endif
/* Initialize NF Init parameters */
Vhwa_m2mNfInitPrmsInit(&initPrms);
/* Set UDMA driver handle */
initPrms.udmaDrvHndl = appUdmaGetObj();
status = Vhwa_m2mNfInit(&initPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: NF Init Failed !!!\n");
}
else
{
/* Initilize SL2 parameters */
sl2AllocPrms.maxImgWidth = APP_UTILS_VHWA_MAX_IN_IMG_WIDTH;
sl2AllocPrms.inCcsf = APP_UTILS_VHWA_IN_IMG_CCSF;
sl2AllocPrms.inBuffDepth = APP_UTILS_VHWA_MAX_IN_IMG_BUFF_DEPTH;
sl2AllocPrms.outBuffDepth = APP_UTILS_VHWA_MAX_OUT_IMG_BUFF_DEPTH;
sl2AllocPrms.outCcsf = APP_UTILS_VHWA_OUT_IMG_CCSF;
status = Vhwa_m2mNfAllocSl2(&sl2AllocPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: NF SL2 Alloc Failed !!!\n");
}
else
{
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: NF Init ... Done !!!\n");
#endif
}
}
}
#endif
#if defined(ENABLE_VISS)
/* VISS */
if (0 == status)
{
Vhwa_M2mVissSl2Params sl2AllocPrms;
Vhwa_M2mVissInitParams initPrms;
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: VISS Init ... !!!\n");
#endif
/* Initialize VISS Init parameters */
Vhwa_m2mVissInitParamsInit(&initPrms);
/* Set UDMA driver handle */
#if defined(VPAC3L)
initPrms.udmaDrvHndl = NULL;
#else
initPrms.udmaDrvHndl = appUdmaGetObj();
#endif
/* Set configThroughUDMA to true to support multi handle */
initPrms.configThroughUdmaFlag = true;
status = Vhwa_m2mVissInit(&initPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: VISS Init Failed !!!\n");
}
else
{
int32_t cnt;
Vhwa_m2mVissSl2ParamsInit(&sl2AllocPrms);
for (cnt = 0U; cnt < VHWA_M2M_VISS_MAX_INPUTS; cnt ++)
{
sl2AllocPrms.maxInWidth[cnt] = APP_UTILS_VHWA_MAX_IN_IMG_WIDTH;
}
for (cnt = 0U; cnt < VHWA_M2M_VISS_MAX_OUTPUTS; cnt ++)
{
if (VHWA_M2M_VISS_OUT_H3A_IDX == cnt)
{
/* This is the default size for H3A output */
sl2AllocPrms.maxOutWidth[cnt] = 1024U;
}
else
{
sl2AllocPrms.maxOutWidth[cnt] = APP_UTILS_VHWA_MAX_OUT_IMG_WIDTH;
}
}
sl2AllocPrms.inDepth = 3U; /* Minimum 3 */
for (cnt = 0U; cnt < VHWA_M2M_VISS_MAX_OUTPUTS; cnt ++)
{
sl2AllocPrms.outDepth[cnt] = 2U; /* Minimum 2 */
}
status = Vhwa_m2mVissAllocSl2(&sl2AllocPrms);
if (0 != status)
{
appLogPrintf("VHWA: ERROR: VISS SL2 Alloc Failed !!!\n");
}
else
{
#if defined(APP_DEBUG_VHWA)
appLogPrintf("VHWA: VISS Init ... Done !!!\n");
#endif
}
}
}
#endif
appLogPrintf("VHWA: VPAC Init ... Done !!!\n");
return (status);
}
int32_t appVhwaVpacDeInit()
{
#if defined(ENABLE_LDC)
Vhwa_m2mLdcDeInit();
#endif
#if defined(ENABLE_MSC)
Vhwa_m2mMscDeInit();
#endif
#if defined(ENABLE_NF)
Vhwa_m2mNfDeInit();
#endif
#if defined(ENABLE_VISS)
Vhwa_m2mVissDeInit();
#endif
return (0);
}
int32_t appVhwaHandler(char *service_name, uint32_t cmd, void *prm, uint32_t prm_size, uint32_t flags)
{
int32_t status = -1;
if (NULL != prm)
{
appLogPrintf(
" VHWA Remote Service: Received command %08x to configure VHWA !!!\n",
cmd);
switch(cmd)
{
#if defined(ENABLE_SDE)
case APP_DMPAC_SDE_SL2_FREE:
/* free SDE SL2 memory */
status = Vhwa_m2mSdeFreeSl2();
break;
case APP_DMPAC_SDE_SL2_REALLOC:
/* realloc SDE SL2 for 2MP */
if (sizeof(Vhwa_M2mSdeSl2AllocPrms) == prm_size)
{
Vhwa_M2mSdeSl2AllocPrms *cmdPrms = (Vhwa_M2mSdeSl2AllocPrms *)prm;
status = Vhwa_m2mSdeAllocSl2(cmdPrms);
} else
{
appLogPrintf(" VHWA Remote Service: ERROR: Invalid SDE SL2 parameters passed !!!\n");
}
break;
#endif
#if defined(ENABLE_DOF)
case APP_DMPAC_DOF_SL2_FREE:
/* free DOF SL2 memory */
status = Vhwa_m2mDofFreeSl2();
break;
case APP_DMPAC_DOF_SL2_REALLOC:
/* realloc DOF SL2 for 2MP */
if (sizeof(Vhwa_M2mDofSl2AllocPrms) == prm_size)
{
Vhwa_M2mDofSl2AllocPrms *cmdPrms = (Vhwa_M2mDofSl2AllocPrms *)prm;
status = Vhwa_m2mDofAllocSl2(cmdPrms);
} else
{
appLogPrintf(" VHWA Remote Service: ERROR: Invalid DOF SL2 parameters passed !!!\n");
}
break;
#endif
#if defined(SOC_J721E) || defined(SOC_J721S2)
case APP_VPAC_720_DMPAC_480:
SET_CLOCK_FREQ (TISCI_DEV_DMPAC0, TISCI_DEV_DMPAC0_CLK, 480000000);
#if defined(SOC_J721S2)
SET_CLOCK_FREQ (TISCI_DEV_VPAC0, TISCI_DEV_VPAC0_MAIN_CLK, 720000000);
#else
SET_CLOCK_FREQ (TISCI_DEV_VPAC0, TISCI_DEV_VPAC0_CLK, 720000000);
#endif
status = 0;
break;
case APP_VPAC_650_DMPAC_520:
SET_CLOCK_FREQ (TISCI_DEV_DMPAC0, TISCI_DEV_DMPAC0_CLK, 520000000);
#if defined(SOC_J721S2)
SET_CLOCK_FREQ (TISCI_DEV_VPAC0, TISCI_DEV_VPAC0_MAIN_CLK, 650000000);
#else
SET_CLOCK_FREQ (TISCI_DEV_VPAC0, TISCI_DEV_VPAC0_CLK, 650000000);
#endif
status = 0;
break;
#endif
}
if (0 == status)
{
appLogPrintf(" VHWA Remote Service: VHWA configuration done !!!\n");
}
else
{
appLogPrintf(" VHWA Remote Service: ERROR: VHWA configuration failed !!!\n");
}
}
else
{
appLogPrintf(" VHWA Remote Service: ERROR: Invalid parameters passed !!!\n");
}
return status;
}
int32_t appVhwaRemoteServiceInit()
{
int32_t status;
status = appRemoteServiceRegister(APP_VHWA_SERVICE_NAME, appVhwaHandler);
if(status!=0)
{
appLogPrintf("VHWA Remote Service: ERROR: Unable to register service \n");
}
return status;
}
int32_t appVhwaRemoteServiceDeInit()
{
int32_t status;
status = appRemoteServiceUnRegister(APP_VHWA_SERVICE_NAME);
if(status!=0)
{
appLogPrintf("VHWA Remote Service: ERROR: Unable to unregister service \n");
}
return status;
}
int32_t appVissRemoteServiceDeInit()
{
int32_t viss_status;
viss_status = VissRemoteServer_DeInit();
if(viss_status!=0)
{
appLogPrintf(" appVissRemoteServiceDeInit: ERROR: Failed to deinitialize VISS remote server \n");
}
return (viss_status);
}
int32_t appVissRemoteServiceInit()
{
int32_t viss_status;
appLogPrintf("VISS REMOTE SERVICE: Init ... !!!\n");
viss_status = VissRemoteServer_Init();
if(viss_status!=0)
{
appLogPrintf("ISS: Error: Failed to create remote VISS remote server failed. Live tuning will not work !!!\n");
return -1;
}
else
{
appLogPrintf("VISS REMOTE SERVICE: Init ... Done !!!\n");
}
return viss_status;
}
/*
*
* Copyright (c) 2018 Texas Instruments Incorporated
*
* All rights reserved not granted herein.
*
* Limited License.
*
* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
* license under copyrights and patents it now or hereafter owns or controls to make,
* have made, use, import, offer to sell and sell ("Utilize") this software subject to the
* terms herein. With respect to the foregoing patent license, such license is granted
* solely to the extent that any such patent is necessary to Utilize the software alone.
* The patent license shall not apply to any combinations which include this software,
* other than combinations with devices manufactured by or for TI ("TI Devices").
* No hardware patent is licensed hereunder.
*
* Redistributions must preserve existing copyright notices and reproduce this license
* (including the above copyright notice and the disclaimer and (if applicable) source
* code license limitations below) in the documentation and/or other materials provided
* with the distribution
*
* Redistribution and use in binary form, without modification, are permitted provided
* that the following conditions are met:
*
* * No reverse engineering, decompilation, or disassembly of this software is
* permitted with respect to any software provided in binary form.
*
* * any redistribution and use are licensed by TI for use only with TI Devices.
*
* * Nothing shall obligate TI to provide you with source code for the software
* licensed and provided to you in object code.
*
* If software source code is provided to you, modification and redistribution of the
* source code are permitted provided that the following conditions are met:
*
* * any redistribution and use of the source code, including any resulting derivative
* works, are licensed by TI for use only with TI Devices.
*
* * any redistribution and use of any object code compiled from the source code
* and any resulting derivative works, are licensed by TI for use only with TI Devices.
*
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
*
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* DISCLAIMER.
*
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "app_single_cam_main.h"
#include <utils/iss/include/app_iss.h>
#ifndef USE_CSITX
#include "app_test.h"
#endif
#ifdef A72
#if defined(LINUX)
/*ITT server is supported only in target mode and only on Linux*/
#include <itt_server.h>
#endif
#endif
static char availableSensorNames[ISS_SENSORS_MAX_SUPPORTED_SENSOR][ISS_SENSORS_MAX_NAME];
static vx_uint8 num_sensors_found;
static IssSensor_CreateParams sensorParams;
#define NUM_CAPT_CHANNELS (4u)
#ifdef _APP_DEBUG_
static char *app_get_test_file_path()
{
char *tivxPlatformGetEnv(char *env_var);
#if defined(SYSBIOS)
return tivxPlatformGetEnv("VX_TEST_DATA_PATH");
#else
return getenv("VX_TEST_DATA_PATH");
#endif
}
#endif //_APP_DEBUG_
/*
* Utility API used to add a graph parameter from a node, node parameter index
*/
void add_graph_parameter_by_node_index(vx_graph graph, vx_node node, vx_uint32 node_parameter_index)
{
vx_parameter parameter = vxGetParameterByIndex(node, node_parameter_index);
vxAddParameterToGraph(graph, parameter);
vxReleaseParameter(¶meter);
}
vx_status app_init(AppObj *obj)
{
vx_status status = VX_SUCCESS;
char* sensor_list[ISS_SENSORS_MAX_SUPPORTED_SENSOR];
vx_uint8 count = 0;
char ch = 0xFF;
vx_uint8 selectedSensor = 0xFF;
vx_uint8 detectedSensors[ISS_SENSORS_MAX_CHANNEL];
#ifdef A72
#if defined(LINUX)
/*ITT server is supported only in target mode and only on Linux*/
status = itt_server_init((void*)obj, (void*)save_debug_images, (void*)appSingleCamUpdateVpacDcc);
if(status != 0)
{
printf("Warning : Failed to initialize ITT server. Live tuning will not work \n");
}
#endif
#endif
for(count=0;count<ISS_SENSORS_MAX_CHANNEL;count++)
{
detectedSensors[count] = 0xFF;
}
for(count=0;count<ISS_SENSORS_MAX_SUPPORTED_SENSOR;count++)
{
sensor_list[count] = NULL;
}
obj->stop_task = 0;
obj->stop_task_done = 0;
obj->selectedCam = 0xFF;
if(status == VX_SUCCESS)
{
obj->context = vxCreateContext();
status = vxGetStatus((vx_reference) obj->context);
}
if(status == VX_SUCCESS)
{
tivxHwaLoadKernels(obj->context);
tivxImagingLoadKernels(obj->context);
APP_PRINTF("tivxImagingLoadKernels done\n");
}
/*memset(availableSensorNames, 0, ISS_SENSORS_MAX_SUPPORTED_SENSOR*ISS_SENSORS_MAX_NAME);*/
for(count=0;count<ISS_SENSORS_MAX_SUPPORTED_SENSOR;count++)
{
availableSensorNames[count][0] = '\0';
sensor_list[count] = availableSensorNames[count];
}
if(status == VX_SUCCESS)
{
status = appEnumerateImageSensor(sensor_list, &num_sensors_found);
}
if(obj->is_interactive)
{
selectedSensor = 0xFF;
obj->selectedCam = 0xFF;
while(obj->selectedCam == 0xFF)
{
printf("Select camera port index 0-%d : ", ISS_SENSORS_MAX_CHANNEL-1);
ch = getchar();
obj->selectedCam = ch - '0';
if(obj->selectedCam >= ISS_SENSORS_MAX_CHANNEL)
{
printf("Invalid entry %c. Please choose between 0 and %d \n", ch, ISS_SENSORS_MAX_CHANNEL-1);
obj->selectedCam = 0xFF;
}
while ((obj->selectedCam != 0xFF) && (selectedSensor > (num_sensors_found-1)))
{
printf("%d registered sensor drivers\n", num_sensors_found);
for(count=0;count<num_sensors_found;count++)
{
printf("%c : %s \n", count+'a', sensor_list[count]);
}
printf("Select a sensor above or press '0' to autodetect the sensor : ");
ch = getchar();
if(ch == '0')
{
uint8_t num_sensors_detected = 0;
uint8_t channel_mask = (1<<obj->selectedCam);
status = appDetectImageSensor(detectedSensors, &num_sensors_detected, channel_mask);
if(0 == status)
{
selectedSensor = detectedSensors[obj->selectedCam];
if(selectedSensor > ISS_SENSORS_MAX_SUPPORTED_SENSOR)
{
printf("No sensor detected at port %d. Please select another port \n", obj->selectedCam);
obj->selectedCam = 0xFF;
selectedSensor = 0xFF;
}
}
else
{
printf("sensor detection at port %d returned error . Please try again \n", obj->selectedCam);
obj->selectedCam = 0xFF;
selectedSensor = 0xFF;
}
}
else
{
selectedSensor = ch - 'a';
if(selectedSensor > (num_sensors_found-1))
{
printf("Invalid selection %c. Try again \n", ch);
}
}
}
}
obj->sensor_name = sensor_list[selectedSensor];
printf("Sensor selected : %s\n", obj->sensor_name);
ch = 0xFF;
fflush (stdin);
while ((ch != '0') && (ch != '1'))
{
fflush (stdin);
printf ("LDC Selection Yes(1)/No(0) : ");
ch = getchar();
}
obj->ldc_enable = ch - '0';
}
else
{
selectedSensor = obj->sensor_sel;
if(selectedSensor > (num_sensors_found-1))
{
printf("Invalid sensor selection %d \n", selectedSensor);
return VX_FAILURE;
}
}
obj->sensor_wdr_mode = 0;
obj->table_width = LDC_TABLE_WIDTH;
obj->table_height = LDC_TABLE_HEIGHT;
obj->ds_factor = LDC_DS_FACTOR;
#ifndef USE_CSITX
/* Display initialization */
memset(&obj->display_params, 0, sizeof(tivx_display_params_t));
obj->display_params.opMode = TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE;
obj->display_params.pipeId = 2;
obj->display_params.outHeight = 1080;
obj->display_params.outWidth = 1920;
obj->display_params.posX = 0;
obj->display_params.posY = 0;
#else
/* CSI-TX initialization */
tivx_csitx_params_t local_csitx_config;
uint32_t loopCnt;
/* CSITX Config initialization */
tivx_csitx_params_init(&local_csitx_config);
local_csitx_config.numInst = 1U;
local_csitx_config.numCh = 1;
local_csitx_config.instId[0U] = 0;
local_csitx_config.instCfg[0U].rxCompEnable = (uint32_t)vx_true_e;
local_csitx_config.instCfg[0U].rxv1p3MapEnable = (uint32_t)vx_true_e;
local_csitx_config.instCfg[0U].laneBandSpeed = TIVX_CSITX_LANE_BAND_SPEED_770_TO_870_MBPS;
local_csitx_config.instCfg[0U].laneSpeedMbps = TIVX_CSITX_LANE_SPEED_MBPS_RESERVED;
local_csitx_config.instCfg[0U].numDataLanes = 4U;
for (loopCnt = 0U ;
loopCnt < local_csitx_config.instCfg[0U].numDataLanes ;
loopCnt++)
{
local_csitx_config.instCfg[0U].lanePolarityCtrl[loopCnt] = 0u;
}
for (loopCnt = 0U; loopCnt < 1; loopCnt++)
{
local_csitx_config.chVcNum[loopCnt] = loopCnt;
local_csitx_config.chInstMap[loopCnt] = 0;
}
obj->csitx_config = vxCreateUserDataObject(obj->context, "tivx_csitx_params_t", sizeof(tivx_csitx_params_t), &local_csitx_config);
/* DSS M2M initialization */
tivx_display_m2m_params_init(&obj->display_m2m_params);
obj->display_m2m_params.instId = 0;
obj->display_m2m_params.numPipe = 1;
obj->display_m2m_params.pipeId[0U] = 3;
obj->display_m2m_params.overlayId = 3;
#endif
obj->scaler_enable = vx_false_e;
appPerfPointSetName(&obj->total_perf , "TOTAL");
return status;
}
vx_status app_deinit(AppObj *obj)
{
vx_status status = VX_FAILURE;
tivxHwaUnLoadKernels(obj->context);
APP_PRINTF("tivxHwaUnLoadKernels done\n");
tivxImagingUnLoadKernels(obj->context);
APP_PRINTF("tivxImagingUnLoadKernels done\n");
status = vxReleaseContext(&obj->context);
if(VX_SUCCESS == status)
{
APP_PRINTF("vxReleaseContext done\n");
}
else
{
printf("Error: vxReleaseContext returned 0x%x \n", status);
}
return status;
}
/*
* Graph,
* viss_config
* |
* v
* input_img -> VISS -----> LDC -----> output_img
*
*/
vx_status app_create_graph(AppObj *obj)
{
vx_status status = VX_SUCCESS;
int32_t sensor_init_status = -1;
obj->configuration = NULL;
obj->raw = NULL;
obj->y12 = NULL;
obj->uv12_c1 = NULL;
obj->y8_r8_c2 = NULL;
obj->uv8_g8_c3 = NULL;
obj->s8_b8_c4 = NULL;
obj->histogram = NULL;
obj->h3a_aew_af = NULL;
obj->display_image = NULL;
unsigned int image_width = obj->width_in;
unsigned int image_height = obj->height_in;
tivx_raw_image raw_image = 0;
vx_user_data_object capture_config;
vx_uint8 num_capture_frames = 1;
tivx_capture_params_t local_capture_config;
uint32_t buf_id;
const vx_char capture_user_data_object_name[] = "tivx_capture_params_t";
uint32_t sensor_features_enabled = 0;
uint32_t sensor_features_supported = 0;
uint32_t sensor_wdr_enabled = 0;
uint32_t sensor_exp_control_enabled = 0;
uint32_t sensor_gain_control_enabled = 0;
vx_bool yuv_cam_input = vx_false_e;
vx_image viss_out_image = NULL;
vx_image ldc_in_image = NULL;
vx_image capt_yuv_image = NULL;
uint8_t channel_mask = (1<<obj->selectedCam);
vx_uint32 params_list_depth = 1;
if(obj->test_mode == 1)
{
params_list_depth = 2;
}
vx_graph_parameter_queue_params_t graph_parameters_queue_params_list[params_list_depth];
printf("Querying %s \n", obj->sensor_name);
memset(&sensorParams, 0, sizeof(sensorParams));
status = appQueryImageSensor(obj->sensor_name, &sensorParams);
if(VX_SUCCESS != status)
{
printf("appQueryImageSensor returned %d\n", status);
return status;
}
if(sensorParams.sensorInfo.raw_params.format[0].pixel_container == VX_DF_IMAGE_UYVY)
{
yuv_cam_input = vx_true_e;
printf("YUV Input selected. VISS and AEWB nodes will be bypassed. \n");
}
/*
Check for supported sensor features.
It is upto the application to decide which features should be enabled.
This demo app enables WDR, DCC and 2A if the sensor supports it.
*/
sensor_features_supported = sensorParams.sensorInfo.features;
if(vx_false_e == yuv_cam_input)
{
if(ISS_SENSOR_FEATURE_COMB_COMP_WDR_MODE == (sensor_features_supported & ISS_SENSOR_FEATURE_COMB_COMP_WDR_MODE))
{
APP_PRINTF("WDR mode is supported \n");
sensor_features_enabled |= ISS_SENSOR_FEATURE_COMB_COMP_WDR_MODE;
sensor_wdr_enabled = 1;
obj->sensor_wdr_mode = 1;
}else
{
APP_PRINTF("WDR mode is not supported. Defaulting to linear \n");
sensor_features_enabled |= ISS_SENSOR_FEATURE_LINEAR_MODE;
sensor_wdr_enabled = 0;
obj->sensor_wdr_mode = 0;
}
if(ISS_SENSOR_FEATURE_MANUAL_EXPOSURE == (sensor_features_supported & ISS_SENSOR_FEATURE_MANUAL_EXPOSURE))
{
APP_PRINTF("Expsoure control is supported \n");
sensor_features_enabled |= ISS_SENSOR_FEATURE_MANUAL_EXPOSURE;
sensor_exp_control_enabled = 1;
}
if(ISS_SENSOR_FEATURE_MANUAL_GAIN == (sensor_features_supported & ISS_SENSOR_FEATURE_MANUAL_GAIN))
{
APP_PRINTF("Gain control is supported \n");
sensor_features_enabled |= ISS_SENSOR_FEATURE_MANUAL_GAIN;
sensor_gain_control_enabled = 1;
}
if(ISS_SENSOR_FEATURE_CFG_UC1 == (sensor_features_supported & ISS_SENSOR_FEATURE_CFG_UC1))
{
APP_PRINTF("CMS Usecase is supported \n");
sensor_features_enabled |= ISS_SENSOR_FEATURE_CFG_UC1;
}
switch(sensorParams.sensorInfo.aewbMode)
{
case ALGORITHMS_ISS_AEWB_MODE_NONE:
obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_DISABLED;
obj->aewb_cfg.awb_mode = ALGORITHMS_ISS_AWB_DISABLED;
break;
case ALGORITHMS_ISS_AEWB_MODE_AWB:
obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_DISABLED;
obj->aewb_cfg.awb_mode = ALGORITHMS_ISS_AWB_AUTO;
break;
case ALGORITHMS_ISS_AEWB_MODE_AE:
obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_AUTO;
obj->aewb_cfg.awb_mode = ALGORITHMS_ISS_AWB_DISABLED;
break;
case ALGORITHMS_ISS_AEWB_MODE_AEWB:
obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_AUTO;
obj->aewb_cfg.awb_mode = ALGORITHMS_ISS_AWB_AUTO;
break;
}
if(obj->aewb_cfg.ae_mode == ALGORITHMS_ISS_AE_DISABLED)
{
if(sensor_exp_control_enabled || sensor_gain_control_enabled )
{
obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_MANUAL;
}
}
APP_PRINTF("obj->aewb_cfg.ae_mode = %d\n", obj->aewb_cfg.ae_mode);
APP_PRINTF("obj->aewb_cfg.awb_mode = %d\n", obj->aewb_cfg.awb_mode);
}
if(ISS_SENSOR_FEATURE_DCC_SUPPORTED == (sensor_features_supported & ISS_SENSOR_FEATURE_DCC_SUPPORTED))
{
sensor_features_enabled |= ISS_SENSOR_FEATURE_DCC_SUPPORTED;
APP_PRINTF("Sensor DCC is enabled \n");
}else
{
APP_PRINTF("Sensor DCC is NOT enabled \n");
}
APP_PRINTF("Sensor width = %d\n", sensorParams.sensorInfo.raw_params.width);
APP_PRINTF("Sensor height = %d\n", sensorParams.sensorInfo.raw_params.height);
APP_PRINTF("Sensor DCC ID = %d\n", sensorParams.dccId);
APP_PRINTF("Sensor Supported Features = 0x%x\n", sensor_features_supported);
APP_PRINTF("Sensor Enabled Features = 0x%x\n", sensor_features_enabled);
sensor_init_status = appInitImageSensor(obj->sensor_name, sensor_features_enabled, channel_mask);/*Mask = 1 for camera # 0*/
if(0 != sensor_init_status)
{
/* Not returning failure because application may be waiting for
error/test frame */
printf("Error initializing sensor %s \n", obj->sensor_name);
}
image_width = sensorParams.sensorInfo.raw_params.width;
image_height = sensorParams.sensorInfo.raw_params.height;
obj->cam_dcc_id = sensorParams.dccId;
obj->width_in = image_width;
obj->height_in = image_height;
/*
Assuming same dataformat for all exposures.
This may not be true for staggered HDR. WIll be handled later
for(count = 0;count<raw_params.num_exposures;count++)
{
memcpy(&(raw_params.format[count]), &(sensorProperties.sensorInfo.dataFormat), sizeof(tivx_raw_image_format_t));
}
*/
/*
Sensor driver does not support metadata yet.
*/
APP_PRINTF("Creating graph \n");
obj->graph = vxCreateGraph(obj->context);
if(status == VX_SUCCESS)
{
status = vxGetStatus((vx_reference) obj->graph);
}
APP_ASSERT(vx_true_e == tivxIsTargetEnabled(TIVX_TARGET_VPAC_VISS1));
APP_PRINTF("Initializing params for capture node \n");
/* Setting to num buf of capture node */
obj->num_cap_buf = NUM_BUFS;
if(vx_false_e == yuv_cam_input)
{
raw_image = tivxCreateRawImage(obj->context, &sensorParams.sensorInfo.raw_params);
/* allocate Input and Output refs, multiple refs created to allow pipelining of graph */
for(buf_id=0; buf_id<obj->num_cap_buf; buf_id++)
{
if(status == VX_SUCCESS)
{
obj->cap_frames[buf_id] = vxCreateObjectArray(obj->context, (vx_reference)raw_image, num_capture_frames);
status = vxGetStatus((vx_reference) obj->cap_frames[buf_id]);
}
}
}
else
{
capt_yuv_image = vxCreateImage(
obj->context,
sensorParams.sensorInfo.raw_params.width,
sensorParams.sensorInfo.raw_params.height,
VX_DF_IMAGE_UYVY
);
/* allocate Input and Output refs, multiple refs created to allow pipelining of graph */
for(buf_id=0; buf_id<obj->num_cap_buf; buf_id++)
{
if(status == VX_SUCCESS)
{
obj->cap_frames[buf_id] = vxCreateObjectArray(obj->context, (vx_reference)capt_yuv_image, num_capture_frames);
status = vxGetStatus((vx_reference) obj->cap_frames[buf_id]);
}
}
}
/* Config initialization */
tivx_capture_params_init(&local_capture_config);
local_capture_config.timeout = 33;
local_capture_config.timeoutInitial = 500;
local_capture_config.numInst = 2U;/* Configure both instances */
local_capture_config.numCh = 1U;/* Single cam. Only 1 channel enabled */
{
vx_uint8 ch, id, lane, q;
for(id = 0; id < local_capture_config.numInst; id++)
{
local_capture_config.instId[id] = id;
local_capture_config.instCfg[id].enableCsiv2p0Support = (uint32_t)vx_true_e;
local_capture_config.instCfg[id].numDataLanes = sensorParams.sensorInfo.numDataLanes;
local_capture_config.instCfg[id].laneBandSpeed = sensorParams.sensorInfo.csi_laneBandSpeed;
for (lane = 0; lane < local_capture_config.instCfg[id].numDataLanes; lane++)
{
local_capture_config.instCfg[id].dataLanesMap[lane] = lane + 1;
}
for (q = 0; q < NUM_CAPT_CHANNELS; q++)
{
ch = (NUM_CAPT_CHANNELS-1)* id + q;
local_capture_config.chVcNum[ch] = q;
local_capture_config.chInstMap[ch] = id;
}
}
}
local_capture_config.chInstMap[0] = obj->selectedCam/NUM_CAPT_CHANNELS;
local_capture_config.chVcNum[0] = obj->selectedCam%NUM_CAPT_CHANNELS;
capture_config = vxCreateUserDataObject(obj->context, capture_user_data_object_name, sizeof(tivx_capture_params_t), &local_capture_config);
APP_PRINTF("capture_config = 0x%p \n", capture_config);
APP_PRINTF("Creating capture node \n");
obj->capture_node = tivxCaptureNode(obj->graph, capture_config, obj->cap_frames[0]);
APP_PRINTF("obj->capture_node = 0x%p \n", obj->capture_node);
if(status == VX_SUCCESS)
{
status = vxReleaseUserDataObject(&capture_config);
}
if(status == VX_SUCCESS)
{
status = vxSetNodeTarget(obj->capture_node, VX_TARGET_STRING, TIVX_TARGET_CAPTURE2);
}
if(vx_false_e == yuv_cam_input)
{
obj->raw = (tivx_raw_image)vxGetObjectArrayItem(obj->cap_frames[0], 0);
if(status == VX_SUCCESS)
{
status = tivxReleaseRawImage(&raw_image);
}
#ifdef _APP_DEBUG_
obj->fs_test_raw_image = tivxCreateRawImage(obj->context, &(sensorParams.sensorInfo.raw_params));
if (NULL != obj->fs_test_raw_image)
{
if(status == VX_SUCCESS)
{
status = read_test_image_raw(NULL, obj->fs_test_raw_image, obj->test_mode);
}
else
{
status = tivxReleaseRawImage(&obj->fs_test_raw_image);
obj->fs_test_raw_image = NULL;
}
}
#endif //_APP_DEBUG_
status = app_create_viss(obj, sensor_wdr_enabled);
if(VX_SUCCESS == status)
{
vxSetNodeTarget(obj->node_viss, VX_TARGET_STRING, TIVX_TARGET_VPAC_VISS1);
tivxSetNodeParameterNumBufByIndex(obj->node_viss, 6u, obj->num_cap_buf);
}
else
{
printf("app_create_viss failed \n");
return -1;
}
status = app_create_aewb(obj, sensor_wdr_enabled);
if(VX_SUCCESS != status)
{
printf("app_create_aewb failed \n");
return -1;
}
viss_out_image = obj->y8_r8_c2;
ldc_in_image = viss_out_image;
}
else
{
obj->capt_yuv_image = (vx_image)vxGetObjectArrayItem(obj->cap_frames[0], 0);
ldc_in_image = obj->capt_yuv_image;
vxReleaseImage(&capt_yuv_image);
}
#ifndef USE_CSITX
if (obj->ldc_enable)
{
printf ("Enabling LDC \n");
status = app_create_ldc(obj, ldc_in_image);
if(status == VX_SUCCESS)
{
status = vxSetNodeTarget(obj->node_ldc, VX_TARGET_STRING, TIVX_TARGET_VPAC_LDC1);
}
else
{
printf("app_create_ldc returned error \n");
return status;
}
if(status == VX_SUCCESS)
{
status = tivxSetNodeParameterNumBufByIndex(obj->node_ldc, 7u, obj->num_cap_buf);
}
/*Check if resizing is needed for display*/
if((obj->table_width >= obj->display_params.outWidth) && (obj->table_height >= obj->display_params.outHeight))
{
vx_uint16 scaler_out_w, scaler_out_h;
obj->scaler_enable = vx_true_e;
appIssGetResizeParams(obj->table_width, obj->table_height, obj->display_params.outWidth, obj->display_params.outHeight, &scaler_out_w, &scaler_out_h);
obj->scaler_out_img = vxCreateImage(obj->context, scaler_out_w, scaler_out_h, VX_DF_IMAGE_NV12);
obj->scalerNode = tivxVpacMscScaleNode(obj->graph, obj->ldc_out, obj->scaler_out_img, NULL, NULL, NULL, NULL);
if(status == VX_SUCCESS)
{
status = tivxSetNodeParameterNumBufByIndex(obj->scalerNode, 1u, obj->num_cap_buf);
}
obj->display_params.outHeight = scaler_out_h;
obj->display_params.outWidth = scaler_out_w;
obj->display_image = obj->scaler_out_img;
}else /*No resize needed*/
{
obj->scaler_enable = vx_false_e;
obj->display_image = obj->ldc_out;
/* MSC can only downsize. If ldc resolution is lower,
display resolution must be set accordingly
*/
obj->display_params.outWidth = obj->table_width;
obj->display_params.outHeight = obj->table_height;
}
}
else /*ldc_enable*/
{
if(NULL != obj->capt_yuv_image)
{
/*MSC does not support YUV422 input*/
obj->scaler_enable = vx_false_e;
}
else
{
if ((image_width >= obj->display_params.outWidth) && (image_height >= obj->display_params.outHeight))
{
obj->scaler_enable = vx_true_e;
}
else
{
obj->scaler_enable = vx_false_e;
/* MSC can only downsize. If viss resolution is lower,
display resolution must be set accordingly
*/
obj->display_params.outWidth = image_width;
obj->display_params.outHeight = image_height;
}
}
if(vx_true_e == obj->scaler_enable)
{
vx_uint16 scaler_out_w, scaler_out_h;
appIssGetResizeParams(image_width, image_height, obj->display_params.outWidth, obj->display_params.outHeight, &scaler_out_w, &scaler_out_h);
obj->scaler_out_img = vxCreateImage(obj->context, scaler_out_w, scaler_out_h, VX_DF_IMAGE_NV12);
obj->scalerNode = tivxVpacMscScaleNode(obj->graph, ldc_in_image, obj->scaler_out_img, NULL, NULL, NULL, NULL);
if(status == VX_SUCCESS)
{
status = tivxSetNodeParameterNumBufByIndex(obj->scalerNode, 1u, obj->num_cap_buf);
}
if(status == VX_SUCCESS)
{
status = vxSetNodeTarget(obj->scalerNode, VX_TARGET_STRING, TIVX_TARGET_VPAC_MSC1);
}
obj->display_params.outHeight = scaler_out_h;
obj->display_params.outWidth = scaler_out_w;
obj->display_image = obj->scaler_out_img;
}
else
{
obj->display_image = ldc_in_image;
}
}
if(NULL == obj->display_image)
{
printf("Error : Display input is uninitialized \n");
return VX_FAILURE;
}
else
{
obj->display_params.posX = (1920U - obj->display_params.outWidth)/2;
obj->display_params.posY = (1080U - obj->display_params.outHeight)/2;
obj->display_param_obj = vxCreateUserDataObject(obj->context, "tivx_display_params_t", sizeof(tivx_display_params_t), &obj->display_params);
obj->displayNode = tivxDisplayNode(obj->graph, obj->display_param_obj, obj->display_image);
}
if(status == VX_SUCCESS)
{
status = vxSetNodeTarget(obj->displayNode, VX_TARGET_STRING, TIVX_TARGET_DISPLAY1);
APP_PRINTF("Display Set Target done\n");
}
#else
if (obj->ldc_enable)
{
printf ("Enabling LDC \n");
status = app_create_ldc(obj, ldc_in_image);
if(status == VX_SUCCESS)
{
status = vxSetNodeTarget(obj->node_ldc, VX_TARGET_STRING, TIVX_TARGET_VPAC_LDC1);
}
else
{
printf("app_create_ldc returned error \n");
return status;
}
if(status == VX_SUCCESS)
{
status = tivxSetNodeParameterNumBufByIndex(obj->node_ldc, 7u, obj->num_cap_buf);
}
printf ("Enabling DSS_M2M \n");
obj->display_m2m_output_image = vxCreateImage(obj->context, obj->width_in, obj->height_in, VX_DF_IMAGE_UYVY);
obj->display_m2m_param_obj = vxCreateUserDataObject(obj->context, "tivx_display_m2m_params_t", sizeof(tivx_display_m2m_params_t), &obj->display_m2m_params);
obj->displaym2mNode = tivxDisplayM2MNode(obj->graph, obj->display_m2m_param_obj, obj->ldc_out, obj->display_m2m_output_image);
if(status == VX_SUCCESS)
{
status = vxSetNodeTarget(obj->displaym2mNode, VX_TARGET_STRING, TIVX_TARGET_DISPLAY_M2M1);
}
if(status == VX_SUCCESS)
{
status = tivxSetNodeParameterNumBufByIndex(obj->displaym2mNode, 2u, obj->num_cap_buf);
}
// CSI-TX
{
obj->csitx_image_arr = vxCreateObjectArray(obj->context, (vx_reference)obj->display_m2m_output_image, num_capture_frames);
obj->csitx_node = tivxCsitxNode(obj->graph, obj->csitx_config, obj->csitx_image_arr);
vxSetNodeTarget(obj->csitx_node, VX_TARGET_STRING, TIVX_TARGET_CSITX2);
}
}
else /*ldc_enable*/
{
printf ("Enabling DSS_M2M \n");
obj->display_m2m_output_image = vxCreateImage(obj->context, obj->width_in, obj->height_in, VX_DF_IMAGE_UYVY);
obj->display_m2m_param_obj = vxCreateUserDataObject(obj->context, "tivx_display_m2m_params_t", sizeof(tivx_display_m2m_params_t), &obj->display_m2m_params);
obj->displaym2mNode = tivxDisplayM2MNode(obj->graph, obj->display_m2m_param_obj, ldc_in_image, obj->display_m2m_output_image);
if(status == VX_SUCCESS)
{
status = vxSetNodeTarget(obj->displaym2mNode, VX_TARGET_STRING, TIVX_TARGET_DISPLAY_M2M1);
}
if(status == VX_SUCCESS)
{
status = tivxSetNodeParameterNumBufByIndex(obj->displaym2mNode, 2u, obj->num_cap_buf);
}
obj->csitx_image_arr = vxCreateObjectArray(obj->context, (vx_reference)obj->display_m2m_output_image, num_capture_frames);
obj->csitx_node = tivxCsitxNode(obj->graph, obj->csitx_config, obj->csitx_image_arr);
vxSetNodeTarget(obj->csitx_node, VX_TARGET_STRING, TIVX_TARGET_CSITX);
}
#endif
int graph_parameter_num = 0;
/* input @ node index 1, becomes graph parameter 0 */
add_graph_parameter_by_node_index(obj->graph, obj->capture_node, 1);
/* set graph schedule config such that graph parameter @ index 0 is enqueuable */
graph_parameters_queue_params_list[graph_parameter_num].graph_parameter_index = graph_parameter_num;
graph_parameters_queue_params_list[graph_parameter_num].refs_list_size = obj->num_cap_buf;
graph_parameters_queue_params_list[graph_parameter_num].refs_list = (vx_reference*)&(obj->cap_frames[0]);
graph_parameter_num++;
#ifndef USE_CSITX
if(obj->test_mode == 1)
{
add_graph_parameter_by_node_index(obj->graph, obj->displayNode, 1);
/* set graph schedule config such that graph parameter @ index 0 is enqueuable */
graph_parameters_queue_params_list[graph_parameter_num].graph_parameter_index = graph_parameter_num;
graph_parameters_queue_params_list[graph_parameter_num].refs_list_size = 1;
graph_parameters_queue_params_list[graph_parameter_num].refs_list = (vx_reference*)&(obj->display_image);
graph_parameter_num++;
}
#endif
if(status == VX_SUCCESS)
{
status = tivxSetGraphPipelineDepth(obj->graph, obj->num_cap_buf);
}
/* Schedule mode auto is used, here we dont need to call vxScheduleGraph
* Graph gets scheduled automatically as refs are enqueued to it
*/
if(status == VX_SUCCESS)
{
status = vxSetGraphScheduleConfig(obj->graph,
VX_GRAPH_SCHEDULE_MODE_QUEUE_AUTO,
params_list_depth,
graph_parameters_queue_params_list
);
}
APP_PRINTF("vxSetGraphScheduleConfig done\n");
if(status == VX_SUCCESS)
{
status = vxVerifyGraph(obj->graph);
}
#ifndef USE_CSITX
if(vx_true_e == obj->scaler_enable)
{
tivx_vpac_msc_coefficients_t sc_coeffs;
vx_reference refs[1];
printf("Scaler is enabled\n");
tivx_vpac_msc_coefficients_params_init(&sc_coeffs, VX_INTERPOLATION_BILINEAR);
obj->sc_coeff_obj = vxCreateUserDataObject(obj->context, "tivx_vpac_msc_coefficients_t", sizeof(tivx_vpac_msc_coefficients_t), NULL);
if(status == VX_SUCCESS)
{
status = vxCopyUserDataObject(obj->sc_coeff_obj, 0, sizeof(tivx_vpac_msc_coefficients_t), &sc_coeffs, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST);
}
refs[0] = (vx_reference)obj->sc_coeff_obj;
if(status == VX_SUCCESS)
{
status = tivxNodeSendCommand(obj->scalerNode, 0u, TIVX_VPAC_MSC_CMD_SET_COEFF, refs, 1u);
}
}
else
{
printf("Scaler is disabled\n");
}
#endif
if(status == VX_SUCCESS)
{
status = tivxExportGraphToDot(obj->graph, ".", "single_cam_graph");
}
#ifdef _APP_DEBUG_
if(vx_false_e == yuv_cam_input)
{
if( (NULL != obj->fs_test_raw_image) && (NULL != obj->capture_node) && (status == VX_SUCCESS))
{
status = app_send_test_frame(obj->capture_node, obj->fs_test_raw_image);
}
}
#endif //_APP_DEBUG_
APP_PRINTF("app_create_graph exiting\n");
return status;
}
vx_status app_delete_graph(AppObj *obj)
{
uint32_t buf_id;
vx_status status = VX_SUCCESS;
if(NULL != obj->capture_node)
{
APP_PRINTF("releasing capture node\n");
status |= vxReleaseNode(&obj->capture_node);
}
if(NULL != obj->node_viss)
{
APP_PRINTF("releasing node_viss\n");
status |= vxReleaseNode(&obj->node_viss);
}
if(NULL != obj->node_aewb)
{
APP_PRINTF("releasing node_aewb\n");
status |= vxReleaseNode(&obj->node_aewb);
}
#ifndef USE_CSITX
if(NULL != obj->displayNode)
{
APP_PRINTF("releasing displayNode\n");
status |= vxReleaseNode(&obj->displayNode);
}
#else
if(NULL != obj->csitx_node)
{
APP_PRINTF("releasing csitx_node\n");
status |= vxReleaseNode(&obj->csitx_node);
}
if(NULL != obj->displaym2mNode)
{
APP_PRINTF("releasing displaym2mNode\n");
status |= vxReleaseNode(&obj->displaym2mNode);
}
#endif
status |= tivxReleaseRawImage(&obj->raw);
APP_PRINTF("releasing raw image done\n");
for(buf_id=0; buf_id<obj->num_cap_buf; buf_id++)
{
if(NULL != obj->cap_frames[buf_id])
{
APP_PRINTF("releasing cap_frame # %d\n", buf_id);
status |= vxReleaseObjectArray(&(obj->cap_frames[buf_id]));
}
}
for(buf_id=0; buf_id<obj->num_viss_out_buf; buf_id++)
{
if(NULL != obj->viss_out_luma[buf_id])
{
APP_PRINTF("releasing y8 buffer # %d\n", buf_id);
status |= vxReleaseImage(&(obj->viss_out_luma[buf_id]));
}
}
if(NULL != obj->capt_yuv_image)
{
APP_PRINTF("releasing capt_yuv_image\n");
status |= vxReleaseImage(&obj->capt_yuv_image);
}
if(NULL != obj->y12)
{
APP_PRINTF("releasing y12\n");
status |= vxReleaseImage(&obj->y12);
}
if(NULL != obj->uv12_c1)
{
APP_PRINTF("releasing uv12_c1\n");
status |= vxReleaseImage(&obj->uv12_c1);
}
if(NULL != obj->s8_b8_c4)
{
APP_PRINTF("releasing s8_b8_c4\n");
status |= vxReleaseImage(&obj->s8_b8_c4);
}
if(NULL != obj->y8_r8_c2)
{
APP_PRINTF("releasing y8_r8_c2\n");
status |= vxReleaseImage(&obj->y8_r8_c2);
}
if(NULL != obj->uv8_g8_c3)
{
APP_PRINTF("releasing uv8_g8_c3\n");
status |= vxReleaseImage(&obj->uv8_g8_c3);
}
if(NULL != obj->histogram)
{
APP_PRINTF("releasing histogram\n");
status |= vxReleaseDistribution(&obj->histogram);
}
if(NULL != obj->configuration)
{
APP_PRINTF("releasing configuration\n");
status |= vxReleaseUserDataObject(&obj->configuration);
}
if (NULL != obj->ae_awb_result)
{
status |= vxReleaseUserDataObject(&obj->ae_awb_result);
APP_PRINTF("releasing ae_awb_result done\n");
}
if(NULL != obj->h3a_aew_af)
{
APP_PRINTF("releasing h3a_aew_af\n");
status |= vxReleaseUserDataObject(&obj->h3a_aew_af);
}
if(NULL != obj->aewb_config)
{
APP_PRINTF("releasing aewb_config\n");
status |= vxReleaseUserDataObject(&obj->aewb_config);
}
if(NULL != obj->dcc_param_viss)
{
APP_PRINTF("releasing VISS DCC Data Object\n");
status |= vxReleaseUserDataObject(&obj->dcc_param_viss);
}
#ifndef USE_CSITX
if(NULL != obj->display_param_obj)
{
APP_PRINTF("releasing Display Param Data Object\n");
status |= vxReleaseUserDataObject(&obj->display_param_obj);
}
#else
if(NULL != obj->csitx_config)
{
APP_PRINTF("releasing csi-tx Data Object\n");
status |= vxReleaseUserDataObject(&obj->csitx_config);
}
if(NULL != obj->csitx_image_arr)
{
APP_PRINTF("releasing csitx Image \n");
status |= vxReleaseObjectArray(&obj->csitx_image_arr);
}
if(NULL != obj->display_m2m_param_obj)
{
APP_PRINTF("releasing Display Param Data Object\n");
status |= vxReleaseUserDataObject(&obj->display_m2m_param_obj);
}
if(NULL != obj->display_m2m_output_image)
{
APP_PRINTF("releasing Display Param Data Object\n");
status |= vxReleaseImage(&obj->display_m2m_output_image);
}
#endif
if(NULL != obj->dcc_param_2a)
{
APP_PRINTF("releasing 2A DCC Data Object\n");
status |= vxReleaseUserDataObject(&obj->dcc_param_2a);
}
if(NULL != obj->dcc_param_ldc)
{
APP_PRINTF("releasing LDC DCC Data Object\n");
status |= vxReleaseUserDataObject(&obj->dcc_param_ldc);
}
if (obj->ldc_enable)
{
if (NULL != obj->mesh_img)
{
APP_PRINTF("releasing LDC Mesh Image \n");
status |= vxReleaseImage(&obj->mesh_img);
}
if (NULL != obj->ldc_out)
{
APP_PRINTF("releasing LDC Output Image \n");
status |= vxReleaseImage(&obj->ldc_out);
}
if (NULL != obj->mesh_params_obj)
{
APP_PRINTF("releasing LDC Mesh Parameters Object\n");
status |= vxReleaseUserDataObject(&obj->mesh_params_obj);
}
if (NULL != obj->ldc_param_obj)
{
APP_PRINTF("releasing LDC Parameters Object\n");
status |= vxReleaseUserDataObject(&obj->ldc_param_obj);
}
if (NULL != obj->region_params_obj)
{
APP_PRINTF("releasing LDC Region Parameters Object\n");
status |= vxReleaseUserDataObject(&obj->region_params_obj);
}
if(NULL != obj->node_ldc)
{
APP_PRINTF("releasing LDC Node \n");
status |= vxReleaseNode(&obj->node_ldc);
}
}
#ifndef USE_CSITX
if(vx_true_e == obj->scaler_enable)
{
if (NULL != obj->scaler_out_img)
{
APP_PRINTF("releasing Scaler Output Image \n");
status |= vxReleaseImage(&obj->scaler_out_img);
}
if(NULL != obj->scalerNode)
{
APP_PRINTF("releasing Scaler Node \n");
status |= vxReleaseNode(&obj->scalerNode);
}
if (NULL != obj->sc_coeff_obj)
{
APP_PRINTF("release Scalar coefficient data object \n");
status |= vxReleaseUserDataObject(&obj->sc_coeff_obj);
}
}
#endif
#ifdef _APP_DEBUG_
if(NULL != obj->fs_test_raw_image)
{
APP_PRINTF("releasing test raw image buffer # %d\n", buf_id);
status |= tivxReleaseRawImage(&obj->fs_test_raw_image);
}
#endif
APP_PRINTF("releasing graph\n");
status |= vxReleaseGraph(&obj->graph);
APP_PRINTF("releasing graph done\n");
return status;
}
vx_status app_run_graph(AppObj *obj)
{
vx_status status = VX_SUCCESS;
vx_uint32 i;
vx_uint32 frm_loop_cnt;
uint32_t buf_id;
uint32_t num_refs_capture;
vx_object_array out_capture_frames;
int graph_parameter_num = 0;
uint8_t channel_mask = (1<<obj->selectedCam);
if(NULL == obj->sensor_name)
{
printf("sensor name is NULL \n");
return VX_FAILURE;
}
status = appStartImageSensor(obj->sensor_name, channel_mask);
if(status < 0)
{
printf("Failed to start sensor %s \n", obj->sensor_name);
if (NULL != obj->fs_test_raw_image)
{
printf("Defaulting to file test mode \n");
status = 0;
}
}
graph_parameter_num = 0;
for(buf_id=0; buf_id<obj->num_cap_buf; buf_id++)
{
if(status == VX_SUCCESS)
{
status = vxGraphParameterEnqueueReadyRef(obj->graph, 0, (vx_reference*)&(obj->cap_frames[buf_id]), 1);
}
#ifndef USE_CSITX
/* in order for the graph to finish execution, the
display still needs to be enqueued 4 times for testing */
if((status == VX_SUCCESS) && (obj->test_mode == 1))
{
status = vxGraphParameterEnqueueReadyRef(obj->graph, 1, (vx_reference*)&(obj->display_image), 1);
}
#endif
}
/*
The application reads and processes the same image "frm_loop_cnt" times
The output may change because on VISS, parameters are updated every frame based on AEWB results
AEWB result is avaialble after 1 frame and is applied after 2 frames
Therefore, first 2 output images will have wrong colors
*/
frm_loop_cnt = obj->num_frames_to_run;
frm_loop_cnt += obj->num_cap_buf;
if(obj->is_interactive)
{
/* in interactive mode loop for ever */
frm_loop_cnt = 0xFFFFFFFF;
}
#ifdef A72
#if defined(LINUX)
appDccUpdatefromFS(obj->sensor_name, obj->sensor_wdr_mode,
obj->node_aewb, 0,
obj->node_viss, 0,
obj->node_ldc, 0,
obj->context);
#endif
#endif
for(i=0; i<frm_loop_cnt; i++)
{
#ifndef USE_CSITX
vx_image test_image;
#endif
appPerfPointBegin(&obj->total_perf);
graph_parameter_num = 0;
if(status == VX_SUCCESS)
{
status = vxGraphParameterDequeueDoneRef(obj->graph, graph_parameter_num, (vx_reference*)&out_capture_frames, 1, &num_refs_capture);
}
#ifndef USE_CSITX
graph_parameter_num++;
if((status == VX_SUCCESS) && (obj->test_mode == 1))
{
status = vxGraphParameterDequeueDoneRef(obj->graph, 1, (vx_reference*)&test_image, 1, &num_refs_capture);
}
if((obj->test_mode == 1) && (i > TEST_BUFFER) && (status == VX_SUCCESS))
{
vx_uint32 actual_checksum = 0;
if(app_test_check_image(test_image, checksums_expected[obj->sensor_sel][0], &actual_checksum) == vx_false_e)
{
test_result = vx_false_e;
}
populate_gatherer(obj->sensor_sel, 0, actual_checksum);
}
APP_PRINTF(" i %d...\n", i);
graph_parameter_num = 0;
if((status == VX_SUCCESS) && (obj->test_mode == 1))
{
status = vxGraphParameterEnqueueReadyRef(obj->graph, 1, (vx_reference*)&test_image, 1);
}
#endif
if(status == VX_SUCCESS)
{
status = vxGraphParameterEnqueueReadyRef(obj->graph, graph_parameter_num, (vx_reference*)&out_capture_frames, 1);
}
graph_parameter_num++;
appPerfPointEnd(&obj->total_perf);
if((obj->stop_task) || (status != VX_SUCCESS))
{
break;
}
}
if(status == VX_SUCCESS)
{
status = vxWaitGraph(obj->graph);
}
/* Dequeue buf for pipe down */
#if 0
for(buf_id=0; buf_id<obj->num_cap_buf-2; buf_id++)
{
APP_PRINTF(" Dequeuing capture # %d...\n", buf_id);
graph_parameter_num = 0;
vxGraphParameterDequeueDoneRef(obj->graph, graph_parameter_num, (vx_reference*)&out_capture_frames, 1, &num_refs_capture);
graph_parameter_num++;
}
#endif
if(status == VX_SUCCESS)
{
status = appStopImageSensor(obj->sensor_name, channel_mask);
}
return status;
}
static void app_run_task(void *app_var)
{
AppObj *obj = (AppObj *)app_var;
appPerfStatsCpuLoadResetAll();
app_run_graph(obj);
obj->stop_task_done = 1;
}
static int32_t app_run_task_create(AppObj *obj)
{
tivx_task_create_params_t params;
int32_t status;
tivxTaskSetDefaultCreateParams(¶ms);
params.task_main = app_run_task;
params.app_var = obj;
obj->stop_task_done = 0;
obj->stop_task = 0;
status = tivxTaskCreate(&obj->task, ¶ms);
return status;
}
static void app_run_task_delete(AppObj *obj)
{
while(obj->stop_task_done==0)
{
tivxTaskWaitMsecs(100);
}
tivxTaskDelete(&obj->task);
}
static char menu[] = {
"\n"
"\n =========================="
"\n Demo : Single Camera w/ 2A"
"\n =========================="
"\n"
"\n p: Print performance statistics"
"\n"
#ifdef _APP_DEBUG_
"\n s: Save Sensor RAW, VISS Output and H3A output images to File System"
"\n"
#endif
"\n e: Export performance statistics"
#ifdef A72
#if defined(LINUX)
"\n"
"\n u: Update DCC from File System"
"\n"
"\n"
#endif
#endif
"\n x: Exit"
"\n"
"\n Enter Choice: "
};
static vx_status app_run_graph_interactive(AppObj *obj)
{
vx_status status;
uint32_t done = 0;
char ch;
FILE *fp;
app_perf_point_t *perf_arr[1];
uint8_t channel_mask = (1<<obj->selectedCam);
status = app_run_task_create(obj);
if(status!=0)
{
printf("ERROR: Unable to create task\n");
}
else
{
appPerfStatsResetAll();
while(!done && (status == VX_SUCCESS))
{
printf(menu);
ch = getchar();
printf("\n");
switch(ch)
{
case 'p':
appPerfStatsPrintAll();
status = tivx_utils_graph_perf_print(obj->graph);
appPerfPointPrint(&obj->total_perf);
printf("\n");
appPerfPointPrintFPS(&obj->total_perf);
appPerfPointReset(&obj->total_perf);
printf("\n");
break;
#ifdef _APP_DEBUG_
case 's':
save_debug_images(obj);
break;
#endif
case 'e':
perf_arr[0] = &obj->total_perf;
fp = appPerfStatsExportOpenFile(".", "basic_demos_app_single_cam");
if (NULL != fp)
{
appPerfStatsExportAll(fp, perf_arr, 1);
status = tivx_utils_graph_perf_export(fp, obj->graph);
appPerfStatsExportCloseFile(fp);
appPerfStatsResetAll();
}
else
{
printf("fp is null\n");
}
break;
#ifdef A72
#if defined(LINUX)
case 'u':
appDccUpdatefromFS(obj->sensor_name, obj->sensor_wdr_mode,
obj->node_aewb, 0,
obj->node_viss, 0,
obj->node_ldc, 0,
obj->context);
break;
#endif
#endif
case 'x':
obj->stop_task = 1;
done = 1;
break;
default:
printf("Unsupported command %c\n", ch);
break;
}
}
app_run_task_delete(obj);
}
if(status == VX_SUCCESS)
{
status = appStopImageSensor(obj->sensor_name, channel_mask);
}
return status;
}
static void app_show_usage(int argc, char* argv[])
{
printf("\n");
printf(" Single Camera Demo - (c) Texas Instruments 2019\n");
printf(" ========================================================\n");
printf("\n");
printf(" Usage,\n");
printf(" %s --cfg <config file>\n", argv[0]);
printf("\n");
}
#ifdef A72
#if defined(LINUX)
int appSingleCamUpdateVpacDcc(AppObj *obj, uint8_t* dcc_buf, uint32_t dcc_buf_size)
{
int32_t status = 0;
status = appUpdateVpacDcc(dcc_buf, dcc_buf_size, obj->context,
obj->node_viss, 0,
obj->node_aewb, 0,
obj->node_ldc, 0
);
return status;
}
#endif
#endif
#ifdef _APP_DEBUG_
int save_debug_images(AppObj *obj)
{
int num_bytes_io = 0;
static int file_index = 0;
char raw_image_fname[MAX_FNAME];
char yuv_image_fname[MAX_FNAME];
char h3a_image_fname[MAX_FNAME];
char failsafe_test_data_path[3] = "./";
char * test_data_path = app_get_test_file_path();
struct stat s;
if(NULL == test_data_path)
{
printf("Test data path is NULL. Defaulting to current folder \n");
test_data_path = failsafe_test_data_path;
}
if (stat(test_data_path, &s))
{
printf("Test data path %s does not exist. Defaulting to current folder \n", test_data_path);
test_data_path = failsafe_test_data_path;
}
if(NULL == obj->capt_yuv_image)
{
snprintf(raw_image_fname, MAX_FNAME, "%s/%s_%04d.raw", test_data_path, "img", file_index);
printf("RAW file name %s \n", raw_image_fname);
num_bytes_io = write_output_image_raw(raw_image_fname, obj->raw);
if(num_bytes_io < 0)
{
printf("Error writing to RAW file \n");
return VX_FAILURE;
}
snprintf(yuv_image_fname, MAX_FNAME, "%s/%s_%04d.yuv", test_data_path, "img_viss", file_index);
printf("YUV file name %s \n", yuv_image_fname);
num_bytes_io = write_output_image_nv12_8bit(yuv_image_fname, obj->y8_r8_c2);
if(num_bytes_io < 0)
{
printf("Error writing to VISS NV12 file \n");
return VX_FAILURE;
}
snprintf(h3a_image_fname, MAX_FNAME, "%s/%s_%04d.bin", test_data_path, "h3a", file_index);
printf("H3A file name %s \n", h3a_image_fname);
num_bytes_io = write_h3a_image(h3a_image_fname, obj->h3a_aew_af);
if(num_bytes_io < 0)
{
printf("Error writing to H3A file \n");
return VX_FAILURE;
}
}
else
{
vx_image cap_yuv;
snprintf(raw_image_fname, MAX_FNAME, "%s/%s_%04d.yuv", test_data_path, "cap", file_index);
printf("YUV file name %s \n", raw_image_fname);
cap_yuv = (vx_image)vxGetObjectArrayItem(obj->cap_frames[0], 0);
num_bytes_io = write_output_image_yuv422_8bit(raw_image_fname, cap_yuv);
if(num_bytes_io < 0)
{
printf("Error writing to YUV file \n");
return VX_FAILURE;
}
}
if(obj->scaler_enable)
{
snprintf(yuv_image_fname, MAX_FNAME, "%s/%s_%04d.yuv", test_data_path, "img_msc", file_index);
printf("YUV file name %s \n", yuv_image_fname);
num_bytes_io = write_output_image_nv12_8bit(yuv_image_fname, obj->scaler_out_img);
if(num_bytes_io < 0)
{
printf("Error writing to MSC NV12 file \n");
return VX_FAILURE;
}
}
if(obj->ldc_enable)
{
snprintf(yuv_image_fname, MAX_FNAME, "%s/%s_%04d.yuv", test_data_path, "img_ldc", file_index);
printf("YUV file name %s \n", yuv_image_fname);
num_bytes_io = write_output_image_nv12_8bit(yuv_image_fname, obj->ldc_out);
if(num_bytes_io < 0)
{
printf("Error writing to LDC NV12 file \n");
return VX_FAILURE;
}
}
file_index++;
return (file_index-1);
}
#endif //_APP_DEBUG_
static void app_parse_cfg_file(AppObj *obj, char *cfg_file_name)
{
FILE *fp = fopen(cfg_file_name, "r");
char line_str[1024];
char *token;
if(fp==NULL)
{
printf("# ERROR: Unable to open config file [%s]. Switching to interactive mode\n", cfg_file_name);
obj->is_interactive = 1;
}
else
{
while(fgets(line_str, sizeof(line_str), fp)!=NULL)
{
char s[]=" \t";
if (strchr(line_str, '#'))
{
continue;
}
/* get the first token */
token = strtok(line_str, s);
if (NULL != token)
{
if(strcmp(token, "sensor_index")==0)
{
token = strtok(NULL, s);
if (NULL != token)
{
obj->sensor_sel = atoi(token);
printf("sensor_selection = [%d]\n", obj->sensor_sel);
}
}
else
if(strcmp(token, "ldc_enable")==0)
{
token = strtok(NULL, s);
if (NULL != token)
{
obj->ldc_enable = atoi(token);
printf("ldc_enable = [%d]\n", obj->ldc_enable);
}
}
else
if(strcmp(token, "num_frames_to_run")==0)
{
token = strtok(NULL, s);
if (NULL != token)
{
obj->num_frames_to_run = atoi(token);
printf("num_frames_to_run = [%d]\n", obj->num_frames_to_run);
}
}
else
if(strcmp(token, "is_interactive")==0)
{
token = strtok(NULL, s);
if (NULL != token)
{
obj->is_interactive = atoi(token);
printf("is_interactive = [%d]\n", obj->is_interactive);
}
}
else
{
APP_PRINTF("Invalid token [%s]\n", token);
}
}
}
fclose(fp);
}
if(obj->width_in<128)
obj->width_in = 128;
if(obj->height_in<128)
obj->height_in = 128;
if(obj->width_out<128)
obj->width_out = 128;
if(obj->height_out<128)
obj->height_out = 128;
}
vx_status app_parse_cmd_line_args(AppObj *obj, int argc, char *argv[])
{
#ifndef USE_CSITX
vx_bool set_test_mode = vx_false_e;
vx_int8 sensor_override = 0xFF;
#endif
app_set_cfg_default(obj);
int i;
if(argc==1)
{
app_show_usage(argc, argv);
printf("Defaulting to interactive mode \n");
obj->is_interactive = 1;
return VX_SUCCESS;
}
for(i=0; i<argc; i++)
{
if(strcmp(argv[i], "--cfg")==0)
{
i++;
if(i>=argc)
{
app_show_usage(argc, argv);
}
app_parse_cfg_file(obj, argv[i]);
}
else
if(strcmp(argv[i], "--help")==0)
{
app_show_usage(argc, argv);
return VX_FAILURE;
}
#ifndef USE_CSITX
else
if(strcmp(argv[i], "--test")==0)
{
set_test_mode = vx_true_e;
}
else
if(strcmp(argv[i], "--sensor")==0)
{
// check to see if there is another argument following --sensor
if (argc > i+1)
{
sensor_override = atoi(argv[i+1]);
// increment i again to avoid this arg
i++;
}
}
#endif
}
#ifndef USE_CSITX
if(set_test_mode == vx_true_e)
{
obj->test_mode = 1;
obj->is_interactive = 0;
obj->num_frames_to_run = NUM_FRAMES;
if (sensor_override != 0xFF)
{
obj->sensor_sel = sensor_override;
}
}
#endif
return VX_SUCCESS;
}
#ifdef _APP_DEBUG_
vx_int32 write_output_image_nv12(char * file_name, vx_image out_nv12)
{
FILE * fp = fopen(file_name, "wb");
if(!fp)
{
APP_PRINTF("Unable to open file %s\n", file_name);
return -1;
}
vx_uint32 len1 = write_output_image_fp(fp, out_nv12);
fclose(fp);
APP_PRINTF("%d bytes written to %s\n", len1, file_name);
return len1;
}
#endif
AppObj gAppObj;
int app_single_cam_main(int argc, char* argv[])
{
AppObj *obj = &gAppObj;
vx_status status = VX_FAILURE;
status = app_parse_cmd_line_args(obj, argc, argv);
if(VX_SUCCESS == status)
{
status = app_init(obj);
if(VX_SUCCESS == status)
{
APP_PRINTF("app_init done\n");
/* Not checking status because application may be waiting for
error/test frame */
app_create_graph(obj);
if(VX_SUCCESS == status)
{
APP_PRINTF("app_create_graph done\n");
if(obj->is_interactive)
{
status = app_run_graph_interactive(obj);
}
else
{
status = app_run_graph(obj);
}
if(VX_SUCCESS == status)
{
APP_PRINTF("app_run_graph done\n");
status = app_delete_graph(obj);
if(VX_SUCCESS == status)
{
APP_PRINTF("app_delete_graph done\n");
}
else
{
printf("Error : app_delete_graph returned 0x%x \n", status);
}
}
else
{
printf("Error : app_run_graph_xx returned 0x%x \n", status);
}
}
else
{
printf("Error : app_create_graph returned 0x%x is_interactive =%d \n", status, obj->is_interactive);
}
}
else
{
printf("Error : app_init returned 0x%x \n", status);
}
status = app_deinit(obj);
if(VX_SUCCESS == status)
{
APP_PRINTF("app_deinit done\n");
}
else
{
printf("Error : app_deinit returned 0x%x \n", status);
}
appDeInitImageSensor(obj->sensor_name);
}
else
{
printf("Error: app_parse_cmd_line_args returned 0x%x \n", status);
}
#ifndef USE_CSITX
if(obj->test_mode == 1)
{
if((test_result == vx_false_e) || (status == VX_FAILURE))
{
printf("\n\nTEST FAILED\n\n");
print_new_checksum_structs();
status = (status == VX_SUCCESS) ? VX_FAILURE : status;
}
else
{
printf("\n\nTEST PASSED\n\n");
}
}
#endif
return status;
}
vx_status app_send_test_frame(vx_node cap_node, tivx_raw_image raw_img)
{
vx_status status = VX_SUCCESS;
status = tivxCaptureRegisterErrorFrame(cap_node, (vx_reference)raw_img);
return status;
}
And console output from running the single camera application using this code:
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2024.01.12 14:18:31 =~=~=~=~=~=~=~=~=~=~=~=
U-Boot SPL 2021.01-g7996ed51f1 (Dec 16 2022 - 07:49:37 +0000)
ti_sci system-controller@44083000: Message not acknowledgedSYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
SPL initial stack usage: 13472 bytes
Trying to boot from MMC2
Starting ATF on ARM64 core...
NOTICE: BL31: v2.7(release):v2.7.0-359-g1309c6c805-dirty
NOTICE: BL31: Built : 07:48:35, Dec 16 2022
I/TC:
I/TC: OP-TEE version: 3.19.0 (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #1 Fri Dec 16 07:48:40 UTC 2022 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check optee.readthedocs.io/.../porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot
U-Boot SPL 2021.01-g7996ed51f1 (Dec 16 2022 - 07:48:53 +0000)
ti_sci system-controller@44083000: Message not acknowledgedSYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
Trying to boot from MMC2
U-Boot 2021.01-g7996ed51f1 (Dec 16 2022 - 07:48:53 +0000)
SoC: J721S2 SR1.0 GP
Model: Texas Instruments J721S2 EVM
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
ti_i2c_eeprom_am6_get: Ignoring record id 255
Board: rev
DRAM: 16 GiB
Flash: 0 Bytes
MMC: mmc@4f80000: 0, mmc@4fb0000: 1
Loading Environment from MMC... OK
In: serial@2880000
Out: serial@2880000
Err: serial@2880000
am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA02102 cpsw_ver: 0x6BA82102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000
Unidentified board claims in eeprom header
Net: eth0: ethernet@46000000port@1
Hit any key to stop autoboot: 2 1 0
switch to partitions #0, OK
mmc1 is current device
SD/MMC found on device 1
Failed to load 'boot.scr'
484 bytes read in 5 ms (93.8 KiB/s)
Loaded env from uEnv.txt
Importing environment from mmc1 ...
Running uenvcmd ...
1 bytes read in 7 ms (0 Bytes/s)
Already setup.
k3_r5f_rproc r5f@41000000: Core 1 is already in use. No rproc commands work
k3_r5f_rproc r5f@41400000: Core 2 is already in use. No rproc commands work
949416 bytes read in 28 ms (32.3 MiB/s)
Load Remote Processor 2 with data@addr=0x82000000 949416 bytes: Success!
306092 bytes read in 16 ms (18.2 MiB/s)
Load Remote Processor 3 with data@addr=0x82000000 306092 bytes: Success!
Failed to load '/lib/firmware/j721s2-main-r5f1_0-fw'
Failed to load '/lib/firmware/j721s2-main-r5f1_1-fw'
14749760 bytes read in 149 ms (94.4 MiB/s)
Load Remote Processor 6 with data@addr=0x82000000 14749760 bytes: Success!
9768888 bytes read in 48 ms (194.1 MiB/s)
Load Remote Processor 7 with data@addr=0x82000000 9768888 bytes: Success!
18608640 bytes read in 402 ms (44.1 MiB/s)
80006 bytes read in 9 ms (8.5 MiB/s)
9772 bytes read in 7 ms (1.3 MiB/s)
## Flattened Device Tree blob at 88000000
Booting using the fdt blob at 0x88000000
Loading Device Tree to 000000008fee9000, end 000000008fffffff ... OK
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd080]
[ 0.000000] Linux version 5.10.153-gdc0b7a4cacff (zbgprh@ubuntu) (aarch64-none-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025, GNU ld (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 2.33.1.20191209) #1 SMP PREEMPT Wed Jan 3 12:55:50 PST 2024
[ 0.000000] Machine model: Texas Instruments J721S2 EVM
[ 0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002880000 (options '')
[ 0.000000] printk: bootconsole [ns16550a0] enabled
[ 0.000000] efi: UEFI not found.
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a0000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a0100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a1000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a1100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a2000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 31 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a2100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a4000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 31 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a4100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a6000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a6000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a6100000, size 15 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a6100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a7000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a7000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a7100000, size 15 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a7100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a8000000, size 32 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-rtos-ipc-memory-region@a8000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000aa000000, size 96 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-dma-memory@aa000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000b0000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-c71-dma-memory@b0000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000b0100000, size 95 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-c71_0-memory@b0100000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000b6000000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-c71_1-dma-memory@b6000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000b6100000, size 31 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-c71_1-memory@b6100000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: initialized node vision_apps_shared-memories, compatible id dma-heap-carveout
[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000d8000000, size 64 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-lo@d8000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000880000000, size 704 MiB
[ 0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-hi@880000000, compatible id shared-dma-pool
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000080000000-0x00000000ffffffff]
[ 0.000000] DMA32 empty
[ 0.000000] Normal [mem 0x0000000100000000-0x0000000bffffefff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000080000000-0x000000009e7fffff]
[ 0.000000] node 0: [mem 0x000000009e800000-0x00000000b7ffffff]
[ 0.000000] node 0: [mem 0x00000000b8000000-0x00000000d7ffffff]
[ 0.000000] node 0: [mem 0x00000000d8000000-0x00000000dbffffff]
[ 0.000000] node 0: [mem 0x00000000dc000000-0x00000000ffffefff]
[ 0.000000] node 0: [mem 0x0000000880000000-0x00000008abffffff]
[ 0.000000] node 0: [mem 0x00000008ac000000-0x0000000bffffefff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x0000000bffffefff]
[ 0.000000] On node 0, zone Normal: 1 pages in unavailable ranges
[ 0.000000] On node 0, zone Normal: 1 pages in unavailable ranges
[ 0.000000] cma: Reserved 512 MiB at 0x00000000dfc00000
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: Trusted OS migration not required
[ 0.000000] psci: SMC Calling Convention v1.2
[ 0.000000] percpu: Embedded 22 pages/cpu 0.000002] sched_clock: 56 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[ 0.008414] Console: colour dummy device 80x25
[ 0.012981] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
[ 0.023653] pid_max: default: 32768 minimum: 301
[ 0.028420] LSM: Security Framework initializing
[ 0.033238] Mount-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)
[ 0.041058] Mountpoint-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)
[ 0.050139] rcu: Hierarchical SRCU implementation.
[ 0.055210] Platform MSI: msi-controller@1820000 domain created
[ 0.061431] PCI/MSI: /bus@100000/interrupt-controller@1800000/msi-controller@1820000 domain created
[ 0.070740] EFI services will not be available.
[ 0.075486] smp: Bringing up secondary CPUs ...
I/TC: Secondary CPU 1 initializing
I/TC: Secondary CPU 1 switching to normal world boot
[ 0.088576] Detected PIPT I-cache on CPU1
[ 0.088602] GICv3: CPU1: found redistributor 1 region 0:0x0000000001920000
[ 0.088614] GICv3: CPU1: using allocated LPI pending table @0x00000008ac050000
[ 0.088656] CPU1: Booted secondary processor 0x0000000001 [0x411fd080]
[ 0.088717] smp: Brought up 1 node, 2 CPUs
[ 0.118063] SMP: Total of 2 processors activated.
[ 0.122869] CPU features: detected: 32-bit EL0 Support
[ 0.128124] CPU features: detected: CRC32 instructions
[ 0.142700] CPU: All CPU(s) started at EL2
[ 0.146903] alternatives: patching kernel code
[ 0.151994] devtmpfs: initialized
[ 0.159676] KASLR disabled due to lack of seed
[ 0.164327] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.174294] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[ 0.187136] pinctrl core: initialized pinctrl subsystem
[ 0.192818] DMI not present or invalid.
[ 0.197091] NET: Registered protocol family 16
[ 0.202465] DMA: preallocated 2048 KiB GFP_KERNEL pool for atomic allocations
[ 0.210152] DMA: preallocated 2048 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[ 0.218709] DMA: preallocated 2048 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[ 0.227133] thermal_sys: Registered thermal governor 'step_wise'
[ 0.227135] thermal_sys: Registered thermal governor 'power_allocator'
[ 0.233749] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.247398] ASID allocator initialised with 65536 entries
[ 0.267231] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[ 0.274089] HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
[ 0.280935] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[ 0.287780] HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
[ 0.295304] cryptd: max_cpu_qlen set to 1000
[ 0.301421] k3-chipinfo 43000014.chipid: Family:J721S2 rev:SR1.0 JTAGID[0x0bb7502f] Detected
[ 0.310489] vsys_3v3: supplied by evm_12v0
[ 0.314884] vsys_5v0: supplied by evm_12v0
[ 0.319586] iommu: Default domain type: Translated
[ 0.324786] SCSI subsystem initialized
[ 0.328883] mc: Linux media interface: v0.10
[ 0.333265] videodev: Linux video capture interface: v2.00
[ 0.338903] pps_core: LinuxPPS API ver. 1 registered
[ 0.343974] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.353314] PTP clock support registered
[ 0.357335] EDAC MC: Ver: 3.0.0
[ 0.361141] FPGA manager framework
[ 0.364647] Advanced Linux Sound Architecture Driver Initialized.
[ 0.371344] clocksource: Switched to clocksource arch_sys_counter
[ 0.377679] VFS: Disk quotas dquot_6.6.0
[ 0.381718] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 0.391489] Carveout Heap: Exported 512 MiB at 0x00000000b8000000
[ 0.397785] NET: Registered protocol family 2
[ 0.403069] IP idents hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[ 0.414168] tcp_listen_portaddr_hash hash table entries: 8192 (order: 5, 131072 bytes, linear)
[ 0.423084] TCP established hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[ 0.431776] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear)
[ 0.439827] TCP: Hash tables configured (established 131072 bind 65536)
[ 0.446772] UDP hash table entries: 8192 (order: 6, 262144 bytes, linear)
[ 0.453874] UDP-Lite hash table entries: 8192 (order: 6, 262144 bytes, linear)
[ 0.461520] NET: Registered protocol family 1
[ 0.466316] RPC: Registered named UNIX socket transport module.
[ 0.472380] RPC: Registered udp transport module.
[ 0.477201] RPC: Registered tcp transport module.
[ 0.482006] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.488591] PCI: CLS 0 bytes, default 64
[ 0.493003] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
[ 0.503619] Initialise system trusted keyrings
[ 0.508263] workingset: timestamp_bits=46 max_order=22 bucket_order=0
[ 0.516535] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.522780] NFS: Registering the id_resolver key type
[ 0.527957] Key type id_resolver registered
[ 0.532229] Key type id_legacy registered
[ 0.536354] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 0.543202] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
[ 0.550852] 9p: Installing v9fs 9p2000 file system support
[ 0.576212] Key type asymmetric registered
[ 0.580399] Asymmetric key parser 'x509' registered
[ 0.585400] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
[ 0.592959] io scheduler mq-deadline registered
[ 0.597585] io scheduler kyber registered
[ 0.603000] pinctrl-single 4301c000.pinctrl: 94 pins, size 376
[ 0.609118] pinctrl-single 11c000.pinctrl: 72 pins, size 288
[ 0.617405] k3-ringacc 2b800000.ringacc: Failed to get MSI domain
[ 0.623701] k3-ringacc 3c000000.ringacc: Failed to get MSI domain
[ 0.631720] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled
[ 0.644373] brd: module loaded
[ 0.651047] loop: module loaded
[ 0.654954] megasas: 07.714.04.00-rc1
[ 0.660690] tun: Universal TUN/TAP device driver, 1.6
[ 0.666172] igbvf: Intel(R) Gigabit Virtual Function Network Driver
[ 0.672578] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
[ 0.678652] sky2: driver version 1.30
[ 0.682973] VFIO - User Level meta-driver version: 0.3
[ 0.688762] i2c /dev entries driver
[ 0.693147] sdhci: Secure Digital Host Controller Interface driver
[ 0.699466] sdhci: Copyright(c) Pierre Ossman
[ 0.704202] sdhci-pltfm: SDHCI platform and OF driver helper
[ 0.710551] ledtrig-cpu: registered to indicate activity on CPUs
[ 0.716887] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[ 0.724254] optee: probing for conduit method.
[ 0.728822] optee: revision 3.19 (afacf356)
[ 0.728979] optee: dynamic shared memory is enabled
[ 0.738455] optee: initialized driver
[ 0.743475] NET: Registered protocol family 17
[ 0.748096] 9pnet: Installing 9P2000 support
[ 0.752500] Key type dns_resolver registered
[ 0.756979] Loading compiled-in X.509 certificates
[ 0.766112] k3-ringacc 2b800000.ringacc: Failed to get MSI domain
[ 0.772484] k3-ringacc 3c000000.ringacc: Failed to get MSI domain
[ 0.781499] ti-sci 44083000.system-controller: ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
[ 0.815011] i2c-dev: adapter [OMAP I2C adapter] registered as minor 0
[ 0.821913] omap_i2c 42120000.i2c: bus 0 rev0.12 at 100 kHz
[ 0.828019] i2c-dev: adapter [OMAP I2C adapter] registered as minor 1
[ 0.834686] omap_i2c 40b00000.i2c: bus 1 rev0.12 at 100 kHz
[ 0.840702] i2c-dev: adapter [OMAP I2C adapter] registered as minor 2
[ 0.847367] omap_i2c 40b10000.i2c: bus 2 rev0.12 at 100 kHz
[ 0.853410] i2c-dev: adapter [OMAP I2C adapter] registered as minor 3
[ 0.860239] pca953x 3-0021: supply vcc not found, using dummy regulator
[ 0.867074] pca953x 3-0021: using no AI
[ 0.891883] pca953x 3-0020: supply vcc not found, using dummy regulator
[ 0.898693] pca953x 3-0020: using no AI
[ 0.903334] pca953x 3-0022: supply vcc not found, using dummy regulator
[ 0.910145] pca953x 3-0022: using AI
[ 0.914464] omap_i2c 2000000.i2c: bus 3 rev0.12 at 400 kHz
[ 0.920509] i2c-dev: adapter [OMAP I2C adapter] registered as minor 4
[ 0.927179] omap_i2c 2010000.i2c: bus 4 rev0.12 at 400 kHz
[ 0.933618] ti-sci-intr 42200000.interrupt-controller: Interrupt Router 125 domain created
[ 0.942173] ti-sci-intr bus@100000:interrupt-controller@a00000: Interrupt Router 148 domain created
[ 0.951510] ti-sci-intr 310e0000.interrupt-controller: Interrupt Router 227 domain created
[ 0.960114] ti-sci-inta 33d00000.msi-controller: Interrupt Aggregator domain 265 created
[ 0.968709] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 0.976377] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 0.984655] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 0.992932] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 1.001755] j721e-pcie 2910000.pcie: Failed to init phy
[ 1.008014] k3-ringacc 2b800000.ringacc: Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:272
[ 1.017903] k3-ringacc 2b800000.ringacc: dma-ring-reset-quirk: disabled
[ 1.024663] k3-ringacc 2b800000.ringacc: RA Proxy rev. 66349100, num_proxies:64
[ 1.033548] k3-ringacc 3c000000.ringacc: Ring Accelerator probed rings:1024, gp-rings[878,128] sci-dev-id:259
[ 1.043709] k3-ringacc 3c000000.ringacc: dma-ring-reset-quirk: disabled
[ 1.050469] k3-ringacc 3c000000.ringacc: RA Proxy rev. 66349100, num_proxies:64
[ 1.058162] omap8250 40a00000.serial: failed to get alias
[ 1.064288] printk: console [ttyS2] disabled
[ 1.068689] 2880000.serial: ttyS2 at MMIO 0x2880000 (irq = 27, base_baud = 3000000) is a 8250
[ 1.077437] printk: console [ttyS2] enabled
[ 1.077437] printk: console [ttyS2] enabled
[ 1.085874] printk: bootconsole [ns16550a0] disabled
[ 1.085874] printk: bootconsole [ns16550a0] disabled
[ 1.101093] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
[ 1.147346] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[ 1.156051] davinci_mdio 46000f00.mdio: phy[0]: device 46000f00.mdio:00, driver TI DP83867
[ 1.164351] am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
[ 1.177204] am65-cpsw-nuss 46000000.ethernet: initialized cpsw ale version 1.4
[ 1.184411] am65-cpsw-nuss 46000000.ethernet: ALE Table size 64
[ 1.190714] am65-cpsw-nuss 46000000.ethernet: CPTS ver 0x4e8a010b, freq:500000000, add_val:1 pps:0
[ 1.200885] am65-cpts 310d0000.cpts: CPTS ver 0x4e8a010c, freq:200000000, add_val:4 pps:0
[ 1.310775] mmc0: CQHCI version 5.10
[ 1.317909] vdd_mmc1: supplied by vsys_3v3
[ 1.323183] omap-mailbox 31f80000.mailbox: omap mailbox rev 0x66fca100
[ 1.330034] omap-mailbox 31f81000.mailbox: omap mailbox rev 0x66fca100
[ 1.336849] omap-mailbox 31f82000.mailbox: omap mailbox rev 0x66fca100
[ 1.343654] omap-mailbox 31f84000.mailbox: omap mailbox rev 0x66fca100
[ 1.350460] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 1.357954] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 1.360335] mmc0: SDHCI controller on 4f80000.mmc [4f80000.mmc] using ADMA 64-bit
[ 1.366035] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 1.381653] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 1.390201] j721e-pcie 2910000.pcie: Failed to init phy
[ 1.396334] ti-udma 285c0000.dma-controller: Channels: 26 (tchan: 13, rchan: 13, gp-rflow: 8)
[ 1.406758] ti-udma 31150000.dma-controller: Channels: 60 (tchan: 30, rchan: 30, gp-rflow: 16)
[ 1.419490] spi-nor spi7.0: s28hs512t (65536 Kbytes)
[ 1.424473] 7 cmdlinepart partitions found on MTD device 47040000.spi.0
[ 1.431083] Creating 7 MTD partitions on "47040000.spi.0":
[ 1.436556] 0x000000000000-0x000000080000 : "ospi.tiboot3"
[ 1.442651] 0x000000080000-0x000000280000 : "ospi.tispl"
[ 1.448466] 0x000000280000-0x000000680000 : "ospi.u-boot"
[ 1.454320] 0x000000680000-0x0000006c0000 : "ospi.env"
[ 1.459885] 0x0000006c0000-0x000000700000 : "ospi.env.backup"
[ 1.466048] 0x000000800000-0x000003fc0000 : "ospi.rootfs"
[ 1.471869] 0x000003fc0000-0x000004000000 : "ospi.phypattern"
[ 1.483452] spi-nor spi8.0: mt25qu512a (65536 Kbytes)
[ 1.489986] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 1.490154] mmc1: CQHCI version 5.10
[ 1.497492] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 1.509149] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 1.517239] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 1.525740] j721e-pcie 2910000.pcie: Failed to init phy
[ 1.531984] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 1.539477] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 1.547562] mmc1: SDHCI controller on 4fb0000.mmc [4fb0000.mmc] using ADMA 64-bit
[ 1.547586] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 1.563122] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 1.571627] j721e-pcie 2910000.pcie: Failed to init phy
[ 1.577641] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 1.585184] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 1.593276] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 1.601434] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 1.609427] mmc1: new ultra high speed DDR50 SDHC card at address aaaa
[ 1.616428] j721e-pcie 2910000.pcie: Failed to init phy
[ 1.616628] mmcblk1: mmc1:aaaa SC16G 14.8 GiB
[ 1.622054] debugfs: Directory 'pd:39' with parent 'pm_genpd' already present!
[ 1.633492] debugfs: Directory 'pd:38' with parent 'pm_genpd' already present!
[ 1.637187] mmcblk1: p1 p2
[ 1.641328] debugfs: Directory 'pd:276' with parent 'pm_genpd' already present!
[ 1.643688] mmcblk1: p2 size 124405760 extends beyond EOD, truncated
[ 1.651324] debugfs: Directory 'pd:154' with parent 'pm_genpd' already present!
[ 1.658549] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 1.672061] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 1.680198] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 1.688312] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 1.697161] j721e-pcie 2910000.pcie: Failed to init phy
[ 1.706227] ALSA device list:
[ 1.709222] No soundcards found.
[ 1.712983] mmc0: Command Queue Engine enabled
[ 1.717443] mmc0: new HS400 MMC card at address 0001
[ 1.722733] mmcblk0: mmc0:0001 S0J56X 14.8 GiB
[ 1.727397] mmcblk0boot0: mmc0:0001 S0J56X partition 1 31.5 MiB
[ 1.733436] mmcblk0boot1: mmc0:0001 S0J56X partition 2 31.5 MiB
[ 1.739466] mmcblk0rpmb: mmc0:0001 S0J56X partition 3 4.00 MiB, chardev (237:0)
[ 1.749900] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 1.757426] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 1.765511] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 1.773594] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 1.782100] j721e-pcie 2910000.pcie: Failed to init phy
[ 1.817840] EXT4-fs (mmcblk1p2): warning: mounting fs with errors, running e2fsck is recommended
[ 1.829917] EXT4-fs (mmcblk1p2): Errors on filesystem, clearing orphan list.
[ 1.829917]
[ 1.838434] EXT4-fs (mmcblk1p2): recovery complete
[ 1.846063] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
[ 1.854178] VFS: Mounted root (ext4 filesystem) on device 179:2.
[ 1.868483] devtmpfs: mounted
[ 1.872184] Freeing unused kernel memory: 1792K
[ 1.876829] Run /sbin/init as init process
[ 2.088775] systemd[1]: System time before build time, advancing clock.
[ 2.144170] NET: Registered protocol family 10
[ 2.149186] Segment Routing with IPv6
[ 2.180723] systemd[1]: systemd 244.5+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid)
[ 2.202508] systemd[1]: Detected architecture arm64.
Welcome to [1mArago 2021.09[0m!
[ 2.245943] systemd[1]: Set hostname to <j721s2-evm>.
[ 2.455160] systemd[1]: /lib/systemd/system/docker.socket:6: ListenStream= references a path below legacy directory /var/run/, updating /var/run/docker.sock → /run/docker.sock; please update the unit file accordingly.
[ 2.545488] random: systemd: uninitialized urandom read (16 bytes read)
[ 2.552262] systemd[1]: system-getty.slice: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
[ 2.564590] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
[ 2.574799] systemd[1]: Created slice system-getty.slice.
[[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
[ 2.595453] random: systemd: uninitialized urandom read (16 bytes read)
[ 2.602902] systemd[1]: Created slice system-serial\x2dgetty.slice.
[[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
[ 2.623434] random: systemd: uninitialized urandom read (16 bytes read)
[ 2.630761] systemd[1]: Created slice system-syslog\x2dng.slice.
[[0;32m OK [0m] Created slice [0;1;39msystem-syslog\x2dng.slice[0m.
[ 2.652193] systemd[1]: Created slice User and Session Slice.
[[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
[ 2.675597] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
[[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
[ 2.699490] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
[[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
[ 2.723489] systemd[1]: Reached target Paths.
[[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
[ 2.739408] systemd[1]: Reached target Remote File Systems.
[[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
[ 2.759416] systemd[1]: Reached target Slices.
[[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
[ 2.775418] systemd[1]: Reached target Swap.
[[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
[ 2.795033] systemd[1]: Listening on RPCbind Server Activation Socket.
[[0;32m OK [0m] Listening on [0;1;39mRPCbind Server Activation Socket[0m.
[ 2.815464] systemd[1]: Reached target RPC Port Mapper.
[[0;32m OK [0m] Reached target [0;1;39mRPC Port Mapper[0m.
[ 2.839874] systemd[1]: Listening on Process Core Dump Socket.
[[0;32m OK [0m] Listening on [0;1;39mProcess Core Dump Socket[0m.
[ 2.863581] systemd[1]: Listening on initctl Compatibility Named Pipe.
[[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
[ 2.897796] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
[ 2.906232] systemd[1]: Listening on Journal Socket (/dev/log).
[[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
[ 2.927727] systemd[1]: Listening on Journal Socket.
[[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
[ 2.943773] systemd[1]: Listening on Network Service Netlink Socket.
[[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
[ 2.973502] systemd[1]: Listening on udev Control Socket.
[[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
[ 2.995598] systemd[1]: Listening on udev Kernel Socket.
[[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
[ 3.017962] systemd[1]: Mounting Huge Pages File System...
Mounting [0;1;39mHuge Pages File System[0m...
[ 3.037951] systemd[1]: Mounting POSIX Message Queue File System...
Mounting [0;1;39mPOSIX Message Queue File System[0m...
[ 3.061929] systemd[1]: Mounting Kernel Debug File System...
Mounting [0;1;39mKernel Debug File System[0m...
[ 3.084597] systemd[1]: Mounting Temporary Directory (/tmp)...
Mounting [0;1;39mTemporary Directory (/tmp)[0m...
[ 3.102230] systemd[1]: Starting Create list of static device nodes for the current kernel...
Starting [0;1;39mCreate list of st…odes for the current kernel[0m...
[ 3.130204] systemd[1]: Starting Start psplash boot splash screen...
Starting [0;1;39mStart psplash boot splash screen[0m...
[ 3.157317] systemd[1]: Starting RPC Bind...
Starting [0;1;39mRPC Bind[0m...
[ 3.171623] systemd[1]: Condition check resulted in File System Check on Root Device being skipped.
[ 3.184126] systemd[1]: Starting Journal Service...
Starting [0;1;39mJournal Service[0m...
[ 3.208386] systemd[1]: Starting Load Kernel Modules...
Starting [0;1;39mLoad Kernel Modules[0m...
[ 3.228267] systemd[1]: Starting Remount Root and Kernel File Systems...
Starting [0;1;39mRemount Root and Kernel File Systems[0m...
[ 3.250186] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null)
[ 3.252495] cryptodev: loading out-of-tree module taints kernel.
[ 3.263893] cryptodev: driver 1.10 loaded.
[ 3.265254] systemd[1]: Starting udev Coldplug all Devices...
Starting [0;1;39mudev Coldplug all Devices[0m...
[ 3.286794] systemd[1]: Started RPC Bind.
[[0;32m OK [0m] Started [0;1;39mRPC Bind[0m.
[ 3.299928] systemd[1]: Started Journal Service.
[[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
[[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
[[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
[[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
[[0;32m OK [0m] Mounted [0;1;39mTemporary Directory (/tmp)[0m.
[[0;32m OK [0m] Started [0;1;39mCreate list of sta… nodes for the current kernel[0m.
[[0;1;31mFAILED[0m] Failed to start [0;1;39mStart psplash boot splash screen[0m.
See 'systemctl status psplash-start.service' for details.
[[0;1;38;5;185mDEPEND[0m] Dependency failed for [0;1;39mStar…progress communication helper[0m.
[[0;32m OK [0m] Started [0;1;39mLoad Kernel Modules[0m.
[[0;32m OK [0m] Started [0;1;39mRemount Root and Kernel File Systems[0m.
Mounting [0;1;39mKernel Configuration File System[0m...
Starting [0;1;39mFlush Journal to Persistent Storage[0m...
[ 3.524011] systemd-journald[159]: Received client request to flush runtime journal.
Starting [0;1;39mApply Kernel Variables[0m...
[ 3.551758] random: systemd: uninitialized urandom read (16 bytes read)
Starting [0;1;39mCreate Static Device Nodes in /dev[0[ 3.563993] random: systemd-journal: uninitialized urandom read (16 bytes read)
m...
[[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
[[0;32m OK [0m] Started [0;1;39mFlush Journal to Persistent Storage[0m.
[[0;32m OK [0m] Started [0;1;39mApply Kernel Variables[0m.
[[0;32m OK [0m] Started [0;1;39mCreate Static Device Nodes in /dev[0m.
[[0;32m OK [0m] Started [0;1;39mudev Coldplug all Devices[0m.
[ 3.684044] random: systemd: uninitialized urandom read (16 bytes read)
[[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
Mounting [0;1;39m/media/ram[0m...
Mounting [0;1;39m/var/volatile[0m...
Starting [0;1;39mudev Wait for Complete Device Initialization[0m...
Starting [0;1;39mudev Kernel Device Manager[0m...
[[0;32m OK [0m] Mounted [0;1;39m/media/ram[0m.
[[0;32m OK [0m] Mounted [0;1;39m/var/volatile[0m.
Starting [0;1;39mLoad/Save Random Seed[0m...
[[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
Starting [0;1;39mCreate Volatile Files and Directories[0m...
[[0;32m OK [0m] Started [0;1;39mCreate Volatile Files and Directories[0m.
[[0;32m OK [0m] Started [0;1;39mudev Kernel Device Manager[0m.
Starting [0;1;39mNetwork Time Synchronization[0m...
Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
[[0;32m OK [0m] Started [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
[[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
[[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
[[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
[ 4.136245] random: crng init done
[ 4.137016] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 4.139713] random: 67 urandom warning(s) missed due to ratelimiting
[ 4.151398] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[[0;32m OK [0m] Started [0;1;39mLoad/Save Random Seed[0m.[ 4.167438] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 4.180505] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 4.215787] j721e-pcie 2910000.pcie: Failed to init phy
[ 4.222917] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 4.235169] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 4.247513] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 4.256152] CAN device driver interface
[ 4.260031] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 4.271730] j721e-pcie 2910000.pcie: Failed to init phy
[ 4.280403] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 4.290757] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 4.300648] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 4.309912] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 4.321630] j721e-pcie 2910000.pcie: Failed to init phy
[ 4.380566] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 4.389459] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 4.399418] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 4.409106] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 4.418226] cdns_dsi: disagrees about version of symbol of_drm_find_bridge
[ 4.419532] j721e-pcie 2910000.pcie: Failed to init phy
[ 4.507412] cdns_dsi: Unknown symbol of_drm_find_bridge (err -22)
[ 4.544799] k3-dsp-rproc 64800000.dsp: assigned reserved memory node vision-apps-c71-dma-memory@b0000000
[ 4.571151] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 4.575855] cdns_dsi: disagrees about version of symbol drm_bridge_add
[ 4.583397] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 4.592266] cdns_dsi: Unknown symbol drm_bridge_add (err -22)
[ 4.595605] cdns_mhdp8546: disagrees about version of symbol drm_bridge_add
[ 4.606011] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 4.614215] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 4.618053] cdns_dsi: disagrees about version of symbol of_drm_find_panel
[ 4.625523] k3-dsp-rproc 64800000.dsp: configured DSP for IPC-only mode
[ 4.629301] cdns_mhdp8546: Unknown symbol drm_bridge_add (err -22)
[ 4.630130] cdns_mhdp8546: disagrees about version of symbol drm_dp_dpcd_read
[ 4.636280] j721e-pcie 2910000.pcie: Failed to init phy
[ 4.642130] cdns_dsi: Unknown symbol of_drm_find_panel (err -22)
[ 4.668828] PVR_K: 201: Read BVNC 36.53.104.796 from HW device registers
[ 4.668901] cdns_mhdp8546: Unknown symbol drm_dp_dpcd_read (err -22)
[ 4.687834] m_can_platform 26a1000.can: m_can device registered (irq=40, version=32)
[ 4.699867] remoteproc remoteproc0: 64800000.dsp is available
[ 4.703526] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 4.705694] remoteproc remoteproc0: attaching to 64800000.dsp
[ 4.719478] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 4.722034] remoteproc remoteproc0: unsupported resource 65538
[ 4.733541] k3-dsp-rproc 64800000.dsp: DSP initialized in IPC-only mode
[ 4.735372] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 4.740163] remoteproc0#vdev0buffer: assigned reserved memory node vision-apps-c71-dma-memory@b0000000
[ 4.759453] PVR_K: 201: RGX Device registered BVNC 36.53.104.796 with 1 core in the system
[ 4.761563] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 4.783867] [drm] Initialized pvr 1.15.6133109 20170530 for 4e20000000.gpu on minor 0
[ 4.787764] j721e-pcie 2910000.pcie: Failed to init phy
[ 4.804732] platform 41000000.r5f: R5F core may have been powered on by a different host, programmed state (0) != actual state (1)
[ 4.819938] m_can_platform 40528000.can: m_can device registered (irq=19, version=32)
[ 4.828700] cdns_mhdp8546: disagrees about version of symbol drm_bridge_remove
[ 4.836167] cdns_mhdp8546: Unknown symbol drm_bridge_remove (err -22)
[ 4.838053] m_can_platform 40568000.can: m_can device registered (irq=21, version=32)
[ 4.843201] cdns_mhdp8546: disagrees about version of symbol drm_connector_attach_encoder
[ 4.861863] m_can_platform 2731000.can: m_can device registered (irq=36, version=32)
[ 4.874271] m_can_platform 2751000.can: m_can device registered (irq=38, version=32)
[ 4.884056] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 4.892323] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 4.900487] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 4.911282] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 4.919977] j721e-pcie 2910000.pcie: Failed to init phy
[ 4.932902] virtio_rpmsg_bus virtio0: rpmsg host is online
[ 4.987554] virtio_rpmsg_bus virtio0: creating channel rpmsg_chrdev addr 0xd
[ 5.063874] cdns_dsi: disagrees about version of symbol drm_panel_bridge_remove
[ 5.071559] cdns_mhdp8546: Unknown symbol drm_connector_attach_encoder (err -22)
[ 5.097258] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 5.106726] remoteproc0#vdev0buffer: registered virtio0 (type 7)
[ 5.112870] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 5.120975] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 5.139150] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 5.148229] cdns_dsi: Unknown symbol drm_panel_bridge_remove (err -22)
[ 5.155244] j721e-pcie 2910000.pcie: Failed to init phy
[ 5.167396] platform 41000000.r5f: configured R5F for IPC-only mode
[ 5.194413] remoteproc remoteproc0: remote processor 64800000.dsp is now attached
[ 5.203093] cdns_mhdp8546: disagrees about version of symbol drm_atomic_get_new_connector_for_encoder
[ 5.223597] platform 41000000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a0000000
[ 5.251458] cdns_mhdp8546: Unknown symbol drm_atomic_get_new_connector_for_encoder (err -22)
[ 5.251607] cdns_dsi: disagrees about version of symbol drm_bridge_remove
[ 5.268143] remoteproc remoteproc1: 41000000.r5f is available
[ 5.276156] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 5.287470] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 5.295645] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 5.313215] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 5.321787] k3-dsp-rproc 65800000.dsp: assigned reserved memory node vision-apps-c71_1-dma-memory@b6000000
[ 5.331859] j721e-pcie 2910000.pcie: Failed to init phy
[ 5.342404] remoteproc remoteproc1: attaching to 41000000.r5f
[ 5.365661] platform 41000000.r5f: R5F core initialized in IPC-only mode
[ 5.379799] k3-dsp-rproc 65800000.dsp: configured DSP for IPC-only mode
[ 5.394163] remoteproc1#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a0000000
[ 5.419467] remoteproc remoteproc2: 65800000.dsp is available
[ 5.427414] remoteproc remoteproc2: attaching to 65800000.dsp
[ 5.427760] cdns_mhdp8546: disagrees about version of symbol drm_dp_aux_init
[ 5.434018] virtio_rpmsg_bus virtio1: rpmsg host is online
[ 5.440908] cdns_dsi: Unknown symbol drm_bridge_remove (err -22)
[ 5.445768] virtio_rpmsg_bus virtio1: creating channel ti.ipc4.ping-pong addr 0xd
[ 5.460518] remoteproc remoteproc2: unsupported resource 65538
[ 5.466572] virtio_rpmsg_bus virtio1: creating channel rpmsg_chrdev addr 0xe
[ 5.475879] cdns_mhdp8546: Unknown symbol drm_dp_aux_init (err -22)
[ 5.477339] k3-dsp-rproc 65800000.dsp: DSP initialized in IPC-only mode
[ 5.490261] remoteproc1#vdev0buffer: registered virtio1 (type 7)
[ 5.496571] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 5.504901] remoteproc remoteproc1: remote processor 41000000.r5f is now attached
[ 5.512512] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 5.515034] cdns_dsi: disagrees about version of symbol drm_panel_bridge_add_typed
[ 5.520688] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 5.543181] remoteproc2#vdev0buffer: assigned reserved memory node vision-apps-c71_1-dma-memory@b6000000
[ 5.552913] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 5.561709] j721e-pcie 2910000.pcie: Failed to init phy
[ 5.577091] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 5.586620] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 5.595537] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 5.604527] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 5.613243] j721e-pcie 2910000.pcie: Failed to init phy
[ 5.621458] platform 5c00000.r5f: configured R5F for IPC-only mode
[ 5.643239] platform 5c00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a2000000
[ 5.661477] virtio_rpmsg_bus virtio2: rpmsg host is online
[ 5.667118] virtio_rpmsg_bus virtio2: creating channel rpmsg_chrdev addr 0xd
[ 5.669097] cdns_mhdp8546: disagrees about version of symbol drm_dp_dpcd_read_link_status
[ 5.682796] cdns_dsi: Unknown symbol drm_panel_bridge_add_typed (err -22)
[ 5.690038] cdns_mhdp8546: Unknown symbol drm_dp_dpcd_read_link_status (err -22)
[ 5.691498] cdns_dsi: disagrees about version of symbol drm_bridge_attach
[ 5.706056] remoteproc remoteproc3: 5c00000.r5f is available
[ 5.713800] remoteproc remoteproc3: attaching to 5c00000.r5f
[ 5.719696] platform 5c00000.r5f: R5F core initialized in IPC-only mode
[ 5.727817] remoteproc3#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a2000000
[ 5.739326] virtio_rpmsg_bus virtio3: rpmsg host is online
[ 5.745350] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 5.747575] remoteproc2#vdev0buffer: registered virtio2 (type 7)
[ 5.752907] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 5.758985] virtio_rpmsg_bus virtio3: creating channel rpmsg_chrdev addr 0xd
[ 5.767039] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 5.785562] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 5.794111] remoteproc remoteproc2: remote processor 65800000.dsp is now attached
[ 5.801749] remoteproc3#vdev0buffer: registered virtio3 (type 7)
[ 5.802028] cdns_mhdp8546: disagrees about version of symbol drm_atomic_helper_connector_destroy_state
[ 5.817242] j721e-pcie 2910000.pcie: Failed to init phy
[ 5.820215] cdns_dsi: Unknown symbol drm_bridge_attach (err -22)
[ 5.823654] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 5.836033] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 5.844192] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 5.852352] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 5.860975] j721e-pcie 2910000.pcie: Failed to init phy
[ 5.870795] remoteproc remoteproc3: remote processor 5c00000.r5f is now attached
[ 5.883011] cdns_mhdp8546: Unknown symbol drm_atomic_helper_connector_destroy_state (err -22)
[ 5.893732] cdns_mhdp8546: disagrees about version of symbol drm_connector_init
[ 5.903864] cdns_mhdp8546: Unknown symbol drm_connector_init (err -22)
[ 5.910760] cdns_mhdp8546: disagrees about version of symbol drm_add_edid_modes
[ 5.925834] cdns_mhdp8546: Unknown symbol drm_add_edid_modes (err -22)
[ 5.940487] cdns_mhdp8546: disagrees about version of symbol drm_connector_update_edid_property
[ 5.943543] platform 5d00000.r5f: configured R5F for IPC-only mode
[ 5.967561] cdns_mhdp8546: Unknown symbol drm_connector_update_edid_property (err -22)
[ 6.009642] cdns_mhdp8546: disagrees about version of symbol drm_atomic_helper_connector_duplicate_state
[ 6.037721] platform 5d00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a4000000
[ 6.047978] cdns_dsi: disagrees about version of symbol of_drm_find_bridge
[ 6.055018] cdns_mhdp8546: Unknown symbol drm_atomic_helper_connector_duplicate_state (err -22)
[ 6.065926] cdns_dsi: Unknown symbol of_drm_find_bridge (err -22)
[ 6.088428] cdns_dsi: disagrees about version of symbol drm_bridge_add
[ 6.099566] cdns_mhdp8546: disagrees about version of symbol __drm_atomic_helper_bridge_duplicate_state
[ 6.109680] cdns_dsi: Unknown symbol drm_bridge_add (err -22)
[ 6.121465] cdns_mhdp8546: Unknown symbol __drm_atomic_helper_bridge_duplicate_state (err -22)
[ 6.121499] remoteproc remoteproc4: 5d00000.r5f is available
[ 6.132834] cdns_dsi: disagrees about version of symbol of_drm_find_panel
[ 6.203415] cdns_mhdp8546: disagrees about version of symbol drm_do_get_edid
[ 6.210534] cdns_dsi: Unknown symbol of_drm_find_panel (err -22)
[ 6.215422] remoteproc remoteproc4: attaching to 5d00000.r5f
[ 6.279046] platform 5d00000.r5f: R5F core initialized in IPC-only mode
[ 6.285194] cdns_mhdp8546: Unknown symbol drm_do_get_edid (err -22)
[ 6.311579] cdns_dsi: disagrees about version of symbol drm_panel_bridge_remove
[ 6.329636] cdns_mhdp8546: disagrees about version of symbol drm_connector_cleanup
[ 6.337684] cdns_dsi: Unknown symbol drm_panel_bridge_remove (err -22)
[ 6.344246] cdns_mhdp8546: Unknown symbol drm_connector_cleanup (err -22)
[ 6.351285] cdns_dsi: disagrees about version of symbol drm_bridge_remove
[ 6.358433] cdns_dsi: Unknown symbol drm_bridge_remove (err -22)
[ 6.364491] cdns_mhdp8546: disagrees about version of symbol __drm_atomic_helper_bridge_reset
[ 6.373061] cdns_mhdp8546: Unknown symbol __drm_atomic_helper_bridge_reset (err -22)
[ 6.380878] cdns_dsi: disagrees about version of symbol drm_panel_bridge_add_typed
[ 6.388481] cdns_dsi: Unknown symbol drm_panel_bridge_add_typed (err -22)
[ 6.391473] cdns_mhdp8546: disagrees about version of symbol drm_kms_helper_hotplug_event
[ 6.403465] remoteproc4#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a4000000
[ 6.427911] cdns_dsi: disagrees about version of symbol drm_bridge_attach
[ 6.434742] cdns_mhdp8546: Unknown symbol drm_kms_helper_hotplug_event (err -22)
[ 6.442160] cdns_dsi: Unknown symbol drm_bridge_attach (err -22)
[ 6.448797] virtio_rpmsg_bus virtio4: rpmsg host is online
[ 6.456648] remoteproc4#vdev0buffer: registered virtio4 (type 7)
[ 6.457610] virtio_rpmsg_bus virtio4: creating channel rpmsg_chrdev addr 0xd
[ 6.462957] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 6.476811] virtio_rpmsg_bus virtio4: creating channel rpmsg_chrdev addr 0x15
[ 6.477403] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 6.485367] virtio_rpmsg_bus virtio4: creating channel ti.ipc4.ping-pong addr 0xe
[ 6.492570] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 6.500762] virtio_rpmsg_bus virtio0: creating channel rpmsg_chrdev addr 0x15
[ 6.511404] cdns_mhdp8546: disagrees about version of symbol drm_helper_probe_single_connector_modes
[ 6.515393] virtio_rpmsg_bus virtio0: creating channel ti.ipc4.ping-pong addr 0xe
[ 6.524388] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 6.531996] virtio_rpmsg_bus virtio2: creating channel rpmsg_chrdev addr 0x15
[ 6.542085] remoteproc remoteproc4: remote processor 5d00000.r5f is now attached
[ 6.547284] virtio_rpmsg_bus virtio2: creating channel ti.ipc4.ping-pong addr 0xe
[ 6.563548] j721e-pcie 2910000.pcie: Failed to init phy
[ 6.564019] virtio_rpmsg_bus virtio3: creating channel rpmsg_chrdev addr 0x15
[ 6.595180] cdns_mhdp8546: Unknown symbol drm_helper_probe_single_connector_modes (err -22)
[ 6.607030] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 6.613575] platform 5e00000.r5f: configured R5F for remoteproc mode
[ 6.617150] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 6.638322] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 6.651504] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 6.662577] cdns_mhdp8546: disagrees about version of symbol drm_atomic_get_new_bridge_state
[ 6.671557] j721e-pcie 2910000.pcie: Failed to init phy
[ 6.683642] platform 5e00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a6000000
[ 6.747420] cdns_mhdp8546: Unknown symbol drm_atomic_get_new_bridge_state (err -22)
[ 6.814531] remoteproc remoteproc5: 5e00000.r5f is available
[ 6.831686] cdns_mhdp8546: disagrees about version of symbol drm_atomic_helper_connector_reset
[ 6.856199] remoteproc remoteproc5: Direct firmware load for j721s2-main-r5f1_0-fw failed with error -2
[ 6.868078] remoteproc remoteproc5: powering up 5e00000.r5f
[ 6.876924] platform 5f00000.r5f: configured R5F for remoteproc mode
[ 6.879412] remoteproc remoteproc5: Direct firmware load for j721s2-main-r5f1_0-fw failed with error -2
[ 6.896867] remoteproc remoteproc5: request_firmware failed: -2
[ 6.935394] cdns_mhdp8546: Unknown symbol drm_atomic_helper_connector_reset (err -22)
[ 6.950381] platform 5f00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a7000000
[ 6.997480] remoteproc remoteproc6: 5f00000.r5f is available
[ 7.009216] remoteproc remoteproc6: Direct firmware load for j721s2-main-r5f1_1-fw failed with error -2
[ 7.020851] remoteproc remoteproc6: powering up 5f00000.r5f
[ 7.026575] remoteproc remoteproc6: Direct firmware load for j721s2-main-r5f1_1-fw failed with error -2
[ 7.032791] cdns_mhdp8546: disagrees about version of symbol drm_connector_set_link_status_property
[ 7.038948] remoteproc remoteproc6: request_firmware failed: -2
[ 7.054681] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 7.062341] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 7.070490] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 7.078698] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 7.088818] j721e-pcie 2910000.pcie: Failed to init phy
[[0;32m OK [0m] Created slice [0;1;39msystem-systemd\x2dfsc[ 7.100391] cdns_mhdp8546: Unknown symbol drm_connector_set_link_status_property (err -22)
k.slice[0m.
[ 7.112208] cdns_mhdp8546: disagrees about version of symbol drm_bridge_hpd_notify
[ 7.120196] virtio_rpmsg_bus virtio3: creating channel ti.ipc4.ping-pong addr 0xe
[ 7.138354] cdns_mhdp8546: Unknown symbol drm_bridge_hpd_notify (err -22)
[ 7.239468] cdns_mhdp8546: disagrees about version of symbol drm_dp_dpcd_write
[ 7.318516] cdns_mhdp8546: Unknown symbol drm_dp_dpcd_write (err -22)
[ 7.381099] usbcore: registered new interface driver usbfs
[ 7.429910] usbcore: registered new interface driver hub
[ 7.437795] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 7.447526] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 7.459473] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 7.470099] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 7.481424] j721e-pcie 2910000.pcie: Failed to init phy
[ 7.487921] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 7.494413] cdns_mhdp8546: disagrees about version of symbol drm_bridge_add
[ 7.499463] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 7.515399] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 7.523546] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 7.532156] j721e-pcie 2910000.pcie: Failed to init phy
[ 7.542268] usbcore: registered new device driver usb
[ 7.596938] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 7.606081] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 7.616137] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 7.627497] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 7.638484] j721e-pcie 2910000.pcie: Failed to init phy
[ 7.642977] cdns_mhdp8546: Unknown symbol drm_bridge_add (err -22)
[ 7.645042] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 7.659932] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 7.677794] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 7.689582] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 7.699706] cdns_mhdp8546: disagrees about version of symbol drm_dp_dpcd_read
[ 7.707303] j721e-pcie 2910000.pcie: Failed to init phy
[ 7.714516] cdns_mhdp8546: Unknown symbol drm_dp_dpcd_read (err -22)
[ 7.721924] cdns_mhdp8546: disagrees about version of symbol drm_bridge_remove
[ 7.729336] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 7.733746] cdns_mhdp8546: Unknown symbol drm_bridge_remove (err -22)
[ 7.739745] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 7.759435] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 7.771248] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 7.783926] j721e-pcie 2910000.pcie: Failed to init phy
[ 7.831828] cdns_mhdp8546: disagrees about version of symbol drm_connector_attach_encoder
[ 7.851791] cdns_mhdp8546: Unknown symbol drm_connector_attach_encoder (err -22)
[ 7.861875] cdns_mhdp8546: disagrees about version of symbol drm_atomic_get_new_connector_for_encoder
[ 7.882263] cdns_mhdp8546: Unknown symbol drm_atomic_get_new_connector_for_encoder (err -22)
[[0;32m OK [0m] Found device [0;1;39m/dev/mmcblk1p1[0m.[ 7.892085] cdns_mhdp8546: disagrees about version of symbol drm_dp_aux_init
[ 7.904686] cdns_mhdp8546: Unknown symbol drm_dp_aux_init (err -22)
Starting [0;1;39mFile System Check on /dev/mmcblk1p1[[ 7.917425] cdns_mhdp8546: disagrees about version of symbol drm_dp_dpcd_read_link_status
0m...
[ 7.929332] cdns_mhdp8546: Unknown symbol drm_dp_dpcd_read_link_status (err -22)
[ 7.940139] cdns_mhdp8546: disagrees about version of symbol drm_atomic_helper_connector_destroy_state
[ 7.949528] cdns_mhdp8546: Unknown symbol drm_atomic_helper_connector_destroy_state (err -22)
[ 7.949562] cdns_mhdp8546: disagrees about version of symbol drm_connector_init
[ 7.949564] cdns_mhdp8546: Unknown symbol drm_connector_init (err -22)
[ 7.949574] cdns_mhdp8546: disagrees about version of symbol drm_add_edid_modes
[ 7.949576] cdns_mhdp8546: Unknown symbol drm_add_edid_modes (err -22)
[ 7.949603] cdns_mhdp8546: disagrees about version of symbol drm_connector_update_edid_property
[ 7.949605] cdns_mhdp8546: Unknown symbol drm_connector_update_edid_property (err -22)
[ 7.949612] cdns_mhdp8546: disagrees about version of symbol drm_atomic_helper_connector_duplicate_state
[ 7.949614] cdns_mhdp8546: Unknown symbol drm_atomic_helper_connector_duplicate_state (err -22)
[ 7.949617] cdns_mhdp8546: disagrees about version of symbol __drm_atomic_helper_bridge_duplicate_state
[ 7.949620] cdns_mhdp8546: Unknown symbol __drm_atomic_helper_bridge_duplicate_state (err -22)
[ 7.949626] cdns_mhdp8546: disagrees about version of symbol drm_do_get_edid
[ 7.949628] cdns_mhdp8546: Unknown symbol drm_do_get_edid (err -22)
[ 7.949632] cdns_mhdp8546: disagrees about version of symbol drm_connector_cleanup
[ 7.949634] cdns_mhdp8546: Unknown symbol drm_connector_cleanup (err -22)
[ 7.949650] cdns_mhdp8546: disagrees about version of symbol __drm_atomic_helper_bridge_reset
[ 7.949651] cdns_mhdp8546: Unknown symbol __drm_atomic_helper_bridge_reset (err -22)
[ 7.949660] cdns_mhdp8546: disagrees about version of symbol drm_kms_helper_hotplug_event
[ 7.949662] cdns_mhdp8546: Unknown symbol drm_kms_helper_hotplug_event (err -22)
[ 7.949674] cdns_mhdp8546: disagrees about version of symbol drm_helper_probe_single_connector_modes
[ 7.949677] cdns_mhdp8546: Unknown symbol drm_helper_probe_single_connector_modes (err -22)
[ 7.949680] cdns_mhdp8546: disagrees about version of symbol drm_atomic_get_new_bridge_state
[ 7.949682] cdns_mhdp8546: Unknown symbol drm_atomic_get_new_bridge_state (err -22)
[ 7.949690] cdns_mhdp8546: disagrees about version of symbol drm_atomic_helper_connector_reset
[ 7.949691] cdns_mhdp8546: Unknown symbol drm_atomic_helper_connector_reset (err -22)
[ 7.949694] cdns_mhdp8546: disagrees about version of symbol drm_connector_set_link_status_property
[ 7.949696] cdns_mhdp8546: Unknown symbol drm_connector_set_link_status_property (err -22)
[ 7.949700] cdns_mhdp8546: disagrees about version of symbol drm_bridge_hpd_notify
[ 7.949702] cdns_mhdp8546: Unknown symbol drm_bridge_hpd_notify (err -22)
[ 7.949712] cdns_mhdp8546: disagrees about version of symbol drm_dp_dpcd_write
[ 7.949714] cdns_mhdp8546: Unknown symbol drm_dp_dpcd_write (err -22)
[[0;32m OK [0m] Started [0;1;39mudev Wait for Complete Device Initialization[0m.
[[0;32m OK [0m] Started [0;1;39mHardware RNG Entropy Gatherer Daemon[0m.
[[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
[[0;32m OK [0m] Started [0;1;39mDaily rotation of log files[0m.
[[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
[[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
[[0;32m OK [0m] Listening on [0;1;39mAvahi mDNS/DNS-SD Stack Activation Socket[0m.
[[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
Starting [0;1;39mDocker Socket for the API[0m.
[[0;32m OK [0m] Listening on [0;1;39mdropbear.socket[0m.
Starting [0;1;39mReboot and dump vmcore via kexec[0m...
[[0;32m OK [0m] Listening on [0;1;39mDocker Socket for the API[0m.
[[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
[[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
[[0;32m OK [0m] Started [0;1;39mJob spooling tools[0m.
[[0;32m OK [0m] Started [0;1;39mPeriodic Command Scheduler[0m.
[[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
Starting [0;1;39mEthernet Bridge Filtering Tables[0m...
Starting [0;1;39mPrint notice about GPLv3 packages[0m...
Starting [0;1;39mIPv6 Packet Filtering Framework[0m...
Starting [0;1;39mIPv4 Packet Filtering Framework[0m...
[[0;32m OK [0m] Started [0;1;39mirqbalance daemon[0m.
Starting [0;1;39mTelephony service[0m...
Starting [0;1;39mrc.pvr.service[0m...
Starting [0;1;39mSystem Logger Daemon "default" instance[0m...
Starting [0;1;39mLogin Service[0m...
[[0;32m OK [0m] Started [0;1;39mTEE Supplicant[0m.
[[0;32m OK [0m] Started [0;1;39mEthernet Bridge Filtering Tables[0m.
[[0;32m OK [0m] Started [0;1;39mFile System Check on /dev/mmcblk1p1[0m.
[[0;32m OK [0m] Started [0;1;39mReboot and dump vmcore via kexec[0m.
[[0;32m OK [0m] Started [0;1;39mIPv6 Packet Filtering Framework[0m.
[[0;32m OK [0m] Started [0;1;39mIPv4 Packet Filtering Framework[0m.
[[0;32m OK [0m] Started [0;1;39mTelephony service[0m.
[[0;32m OK [0m] Reached target [0;1;39mNetwork (Pre)[0m.
Mounting [0;1;39m/run/media/mmcblk1p1[0m...
Starting [0;1;39mNetwork Service[0m...
[ 8.733180] Bluetooth: Core ver 2.22
[[0;32m OK [0m] Listening on [0;1;39mLoad/Save RF …itch Status /dev/rfkill Watch[0m.
[ 8.743486] NET: Registered protocol family 31
[ 8.749561] Bluetooth: HCI device and connection manager initialized
[ 8.759395] Bluetooth: HCI socket layer initialized
[ 8.764378] Bluetooth: L2CAP socket layer initialized
[ 8.769474] Bluetooth: SCO socket layer initialized
[[0;32m OK [0m] Mounted [0;1;39m/run/media/mmcblk1p1[0m.
[[0;32m OK [0m] Started [0;1;39mLogin Service[0m.
[[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
Starting [0;1;39mWait for Network to be Configured[0m...
Starting [0;1;39mNetwork Name Resolution[0m...
[[0;32m OK [0m] Started [0;1;39mrc.pvr.service[0m.
Starting [0;1;39mweston.service[0m...
[ 8.999429] am65-cpsw-nuss 46000000.ethernet: down msc_sl f0000000 tmo 0
[[0;32m OK [0m] Started [0;1;39mSystem Logger Daemon "default" instance[0m.
[ 9.044195] am65-cpsw-nuss 46000000.ethernet: set new flow-id-base 48
[ 9.105949] am65-cpsw-nuss 46000000.ethernet eth0: PHY [46000f00.mdio:00] driver [TI DP83867] (irq=POLL)
[ 9.131658] am65-cpsw-nuss 46000000.ethernet eth0: configuring for phy/rgmii-rxid link mode
[[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
[[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
[[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
Starting [0;1;39mAvahi mDNS/DNS-SD Stack[0m...
Starting [0;1;39mEnable and configure wl18xx bluetooth stack[0m...
[[0;32m OK [0m] Started [0;1;39mNFS status monitor for NFSv2/3 locking.[0m.
Starting [0;1;39mSimple Network Ma…ent Protocol (SNMP) Daemon.[0m...
Starting [0;1;39mPermit User Sessions[0m...
[[0;32m OK [0m] Started [0;1;39mVsftpd ftp daemon[0m.
[[0;32m OK [0m] Started [0;1;39mPermit User Sessions[0m.
[[0;32m OK [0m] Started [0;1;39mEnable and configure wl18xx bluetooth stack[0m.
[[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
[[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyS2[0m.
[[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
Starting [0;1;39mSynchronize System and HW clocks[0m...
[[0;1;31mFAILED[0m] Failed to start [0;1;39mSynchronize System and HW clocks[0m.
See 'systemctl status sync-clocks.service' for details.
[[0;32m OK [0m] Started [0;1;39mAvahi mDNS/DNS-SD Stack[0m.
[[0;32m OK [0m] Started [0;1;39mSimple Network Man…ement Protocol (SNMP) Daemon.[0m.
***************************************************************
***************************************************************
NOTICE: This file system contains the following GPLv3 packages:
autoconf
bash-dev
bash
bc
binutils
cifs-utils
coreutils-stdbuf
coreutils
cpio
cpp-symlinks
cpp
dosfstools
elfutils
g++-symlinks
g++
gawk
gcc-symlinks
gcc
gdb
gdbserver
gettext
glmark2
gstreamer1.0-libav-dev
gstreamer1.0-libav
gzip
less
libasm1
libbfd
libdw1
libelf1
libgdbm-compat4
libgdbm-dev
libgdbm6
libgettextlib
libgettextsrc
libgmp-dev
libgmp10
libgmpxx4
libidn2-0
libidn2-dev
libmpc3
libmpfr6
libreadline-dev
libreadline8
libunistring-dev
libunistring2
m4-dev
m4
make
nettle-dev
nettle
parted
python3-rfc3987
python3-strict-rfc3339
tar
which
zeromq
If you do not wish to distribute GPLv3 components please remove
the above packages prior to distribution. This can be done using
the opkg remove command. i.e.:
opkg remove <package>
Where <package> is the name printed in the list above
NOTE: If the package is a dependency of another package you
will be notified of the dependent packages. You should
use the --force-removal-of-dependent-packages option to
also remove the dependent packages as well
***************************************************************
***************************************************************
[[0;32m OK [0m] Started [0;1;39mPrint notice about GPLv3 packages[0m.
[[0;32m OK [0m] Started [0;1;39mweston.service[0m.
Starting [0;1;39mtelnetd.service[0m...
[[0;32m OK [0m] Started [0;1;39mtelnetd.service[0m.
Starting [0;1;39msyslog.service[0m...
[[0;32m OK [0m] Started [0;1;39msyslog.service[0m.
[ 12.301213] PVR_K: 1051: RGX Firmware image 'rgx.fw.36.53.104.796' loaded
[ 12.333752] PVR_K: 1051: Shader binary image 'rgx.sh.36.53.104.796' loaded
[ 13.244361] am65-cpsw-nuss 46000000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
[ 13.253078] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
Starting [0;1;39mHostname Service[0m...
[[0;32m OK [0m] Started [0;1;39mHostname Service[0m.
[ 13.690030] PVR_K:(Error): 105: RGXSafetyEventHandler: Safety Watchdog Trigger ! [358]
_____ _____ _ _
| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_
| | _| .'| . | . | | __| _| . | | | -_| _| _|
|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_|
|___| |___|
Arago Project j721s2-evm ttyS2
Arago 2021.09 j721s2-evm ttyS2
j721s2-evm login: root
7[r[999;999H[6n8root@j721s2-evm:~# cd ./ /opt/vision_apps/
root@j721s2-evm:/opt/vision_apps# source ./vision_apps_init.sh
root@j721s2-evm:/opt/vision_apps# [ 27.948217] Initializing XFRM netlink socket
[MCU2_0] 4.649442 s: CIO: Init ... Done !!!
[MCU2_0] 4.649494 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0] 4.649525 s: CPU is running FreeRTOS
[MCU2_0] 4.649545 s: APP: Init ... !!!
[MCU2_0] 4.649563 s: SCICLIENT: Init ... !!!
[MCU2_0] 4.649706 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
[MCU2_0] 4.649741 s: SCICLIENT: DMSC FW revision 0x8
[MCU2_0] 4.649768 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0] 4.649798 s: SCICLIENT: Init ... Done !!!
[MCU2_0] 4.649821 s: UDMA: Init ... !!!
[MCU2_0] 4.650680 s: UDMA: Init ... Done !!!
[MCU2_0] 4.650712 s: UDMA: Init ... !!!
[MCU2_0] 4.651190 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0] 4.651225 s: MEM: Init ... !!!
[MCU2_0] 4.651257 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0] 4.651314 s: MEM: Init ... Done !!!
[MCU2_0] 4.651335 s: IPC: Init ... !!!
[MCU2_0] 4.651378 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0] 4.651413 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0] 12.678303 s: IPC: HLOS is ready !!!
[MCU2_0] 12.687521 s: IPC: Init ... Done !!!
[MCU2_0] 12.687561 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_0] 13.397092 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_0] 13.397126 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0] 13.398419 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0] 13.398457 s: FVID2: Init ... !!!
[MCU2_0] 13.398507 s: FVID2: Init ... Done !!!
[MCU2_0] 13.398532 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU2_0] 13.398649 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.398692 s: DSS: Init ... !!!
[MCU2_0] 13.398713 s: DSS: Display type is eDP !!!
[MCU2_0] 13.398735 s: DSS: M2M Path is enabled !!!
[MCU2_0] 13.398758 s: DSS: SoC init ... !!!
[MCU2_0] 13.398778 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0] 13.398937 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.398964 s: SCICLIENT: Sciclient_pmSetModuleState module=365 state=2
[MCU2_0] 13.399160 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.399191 s: SCICLIENT: Sciclient_pmSetModuleState module=156 state=2
[MCU2_0] 13.399317 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.399344 s: SCICLIENT: Sciclient_pmSetModuleState module=365 state=2
[MCU2_0] 13.399460 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.399485 s: SCICLIENT: Sciclient_pmSetModuleState module=156 state=2
[MCU2_0] 13.399578 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.399604 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0] 13.399686 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.399712 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=3 freq=148500000
[MCU2_0] 13.400710 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0] 13.400738 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=3 state=2 flag=2
[MCU2_0] 13.400896 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0] 13.400922 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=2
[MCU2_0] 13.401096 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.401121 s: DSS: SoC init ... Done !!!
[MCU2_0] 13.401143 s: DSS: Board init ... !!!
[MCU2_0] 13.401163 s: DSS: Turning on DP_PWR pin for eDP adapters ... !!!
[MCU2_0] 13.947043 s: DSS: Turning on DP_PWR pin for eDP adapters ... Done!!!
[MCU2_0] 13.947084 s: DSS: Board init ... Done !!!
[MCU2_0] 13.999315 s: DSS: Init ... Done !!!
[MCU2_0] 13.999365 s: VHWA: VPAC Init ... !!!
[MCU2_0] 13.999411 s: SCICLIENT: Sciclient_pmSetModuleState module=361 state=2
[MCU2_0] 13.999552 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 13.999583 s: VHWA: LDC Init ... !!!
[MCU2_0] 14.001468 s: VHWA: LDC Init ... Done !!!
[MCU2_0] 14.001506 s: VHWA: MSC Init ... !!!
[MCU2_0] 14.009544 s: VHWA: MSC Init ... Done !!!
[MCU2_0] 14.009579 s: VHWA: NF Init ... !!!
[MCU2_0] 14.010510 s: VHWA: NF Init ... Done !!!
[MCU2_0] 14.010541 s: VHWA: VISS Init ... !!!
[MCU2_0] 14.017451 s: VHWA: VISS Init ... Done !!!
[MCU2_0] 14.017495 s: VHWA: VPAC Init ... Done !!!
[MCU2_0] 14.017529 s: VX_ZONE_INIT:Enabled
[MCU2_0] 14.017552 s: VX_ZONE_ERROR:Enabled
[MCU2_0] 14.017573 s: VX_ZONE_WARNING:Enabled
[MCU2_0] 14.018442 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0
[MCU2_0] 14.018631 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF
[MCU2_0] 14.018800 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1
[MCU2_0] 14.018970 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1
[MCU2_0] 14.019141 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2
[MCU2_0] 14.019377 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1
[MCU2_0] 14.019578 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1
[MCU2_0] 14.019770 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2
[MCU2_0] 14.019959 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1
[MCU2_0] 14.020157 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2
[MCU2_0] 14.020332 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX
[MCU2_0] 14.020535 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3
[MCU2_0] 14.020727 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4
[MCU2_0] 14.020925 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5
[MCU2_0] 14.021130 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6
[MCU2_0] 14.021337 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7
[MCU2_0] 14.021540 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8
[MCU2_0] 14.021719 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1
[MCU2_0] 14.021891 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2
[MCU2_0] 14.022077 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3
[MCU2_0] 14.022249 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4
[MCU2_0] 14.022418 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX2
[MCU2_0] 14.022459 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
[MCU2_0] 14.022487 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0] 14.049112 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0] 14.049147 s: CSI2RX: Init ... !!!
[MCU2_0] 14.049167 s: SCICLIENT: Sciclient_pmSetModuleState module=136 state=2
[MCU2_0] 14.049259 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.049286 s: SCICLIENT: Sciclient_pmSetModuleState module=38 state=2
[MCU2_0] 14.049400 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.049426 s: SCICLIENT: Sciclient_pmSetModuleState module=39 state=2
[MCU2_0] 14.049503 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.049540 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0] 14.049602 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.049627 s: SCICLIENT: Sciclient_pmSetModuleState module=153 state=2
[MCU2_0] 14.049691 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.049835 s: CSI2RX: Init ... Done !!!
[MCU2_0] 14.049861 s: CSI2TX: Init ... !!!
[MCU2_0] 14.049881 s: SCICLIENT: Sciclient_pmSetModuleState module=136 state=2
[MCU2_0] 14.049942 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.049968 s: SCICLIENT: Sciclient_pmSetModuleState module=40 state=2
[MCU2_0] 14.050045 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.050071 s: SCICLIENT: Sciclient_pmSetModuleState module=41 state=2
[MCU2_0] 14.050154 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.050179 s: SCICLIENT: Sciclient_pmSetModuleState module=364 state=2
[MCU2_0] 14.050260 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.050284 s: SCICLIENT: Sciclient_pmSetModuleState module=363 state=2
[MCU2_0] 14.050344 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0] 14.050410 s: CSI2TX: Init ... Done !!!
[MCU2_0] 14.050435 s: ISS: Init ... !!!
[MCU2_0] 14.050460 s: Found sensor IMX390-UB953_D3 at location 0
[MCU2_0] 14.050493 s: Found sensor AR0233-UB953_MARS at location 1
[MCU2_0] 14.050523 s: Found sensor AR0820-UB953_LI at location 2
[MCU2_0] 14.050553 s: Found sensor AR0341-UB953_MARS at location 3
[MCU2_0] 14.050582 s: Found sensor UB9xxx_RAW12_TESTPATTERN at location 4
[MCU2_0] 14.050613 s: Found sensor UB96x_UYVY_TESTPATTERN at location 5
[MCU2_0] 14.050644 s: Found sensor GW_AR0233_UYVY at location 6
[MCU2_0] 14.050673 s: IssSensor_Init ... Done !!!
[MCU2_0] 14.050725 s: IttRemoteServer_Init ... Done !!!
[MCU2_0] 14.050752 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0] 14.050801 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0] 14.050827 s: UDMA Copy: Init ... !!!
[MCU2_0] 14.051797 s: UDMA Copy: Init ... Done !!!
[MCU2_0] 14.051860 s: APP: Init ... Done !!!
[MCU2_0] 14.051884 s: APP: Run ... !!!
[MCU2_0] 14.051904 s: IPC: Starting echo test ...
[MCU2_0] 14.053982 s: APP: Run ... Done !!!
[MCU2_0] 14.054749 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[.]
[MCU2_0] 14.054827 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[P]
[MCU2_0] 14.054891 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C7X_1[P] C7X_2[P]
[MCU2_1] 4.639018 s: CIO: Init ... Done !!!
[MCU2_1] 4.639065 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1] 4.639097 s: CPU is running FreeRTOS
[MCU2_1] 4.639117 s: APP: Init ... !!!
[MCU2_1] 4.639136 s: SCICLIENT: Init ... !!!
[MCU2_1] 4.639279 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
[MCU2_1] 4.639312 s: SCICLIENT: DMSC FW revision 0x8
[MCU2_1] 4.639339 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1] 4.639369 s: SCICLIENT: Init ... Done !!!
[MCU2_1] 4.639392 s: UDMA: Init ... !!!
[MCU2_1] 4.640387 s: UDMA: Init ... Done !!!
[MCU2_1] 4.640424 s: MEM: Init ... !!!
[MCU2_1] 4.640455 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1] 4.640513 s: MEM: Init ... Done !!!
[MCU2_1] 4.640534 s: IPC: Init ... !!!
[MCU2_1] 4.640577 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1] 4.640612 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1] 13.387773 s: IPC: HLOS is ready !!!
[MCU2_1] 13.397018 s: IPC: Init ... Done !!!
[MCU2_1] 13.397056 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_1] 13.397091 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_1] 13.397119 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1] 13.398436 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1] 13.398472 s: FVID2: Init ... !!!
[MCU2_1] 13.398524 s: FVID2: Init ... Done !!!
[MCU2_1] 13.398548 s: VHWA: DMPAC: Init ... !!!
[MCU2_1] 13.398568 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1] 13.398828 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1] 13.398856 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1] 13.398976 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1] 13.399001 s: VHWA: DOF Init ... !!!
[MCU2_1] 13.403733 s: VHWA: DOF Init ... Done !!!
[MCU2_1] 13.403770 s: VHWA: SDE Init ... !!!
[MCU2_1] 13.405140 s: VHWA: SDE Init ... Done !!!
[MCU2_1] 13.405174 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1] 13.405208 s: VX_ZONE_INIT:Enabled
[MCU2_1] 13.405231 s: VX_ZONE_ERROR:Enabled
[MCU2_1] 13.405253 s: VX_ZONE_WARNING:Enabled
[MCU2_1] 13.406117 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1
[MCU2_1] 13.406295 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE
[MCU2_1] 13.406460 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF
[MCU2_1] 13.406502 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
[MCU2_1] 13.406530 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1] 13.406772 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1] 13.406802 s: UDMA Copy: Init ... !!!
[MCU2_1] 13.407773 s: UDMA Copy: Init ... Done !!!
[MCU2_1] 13.407813 s: APP: Init ... Done !!!
[MCU2_1] 13.407835 s: APP: Run ... !!!
[MCU2_1] 13.407856 s: IPC: Starting echo test ...
[MCU2_1] 13.409921 s: APP: Run ... Done !!!
[MCU2_1] 13.410461 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[.]
[MCU2_1] 13.410530 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[P]
[MCU2_1] 14.054651 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C7X_1[P] C7X_2[P]
[C7x_1 ] 4.791220 s: CIO: Init ... Done !!!
[C7x_1 ] 4.791235 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ] 4.791247 s: CPU is running FreeRTOS
[C7x_1 ] 4.791256 s: APP: Init ... !!!
[C7x_1 ] 4.791263 s: SCICLIENT: Init ... !!!
[C7x_1 ] 4.791383 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
[C7x_1 ] 4.791398 s: SCICLIENT: DMSC FW revision 0x8
[C7x_1 ] 4.791408 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ] 4.791419 s: SCICLIENT: Init ... Done !!!
[C7x_1 ] 4.791428 s: UDMA: Init ... !!!
[C7x_1 ] 4.792266 s: UDMA: Init ... Done !!!
[C7x_1 ] 4.792279 s: MEM: Init ... !!!
[C7x_1 ] 4.792291 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ] 4.792313 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 3964928 bytes !!!
[C7x_1 ] 4.792332 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ] 4.792350 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ] 4.792367 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
[C7x_1 ] 4.792386 s: MEM: Init ... Done !!!
[C7x_1 ] 4.792394 s: IPC: Init ... !!!
[C7x_1 ] 4.792409 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ] 4.792424 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ] 11.871880 s: IPC: HLOS is ready !!!
[C7x_1 ] 11.873761 s: IPC: Init ... Done !!!
[C7x_1 ] 11.873776 s: APP: Syncing with 4 CPUs ... !!!
[C7x_1 ] 13.397094 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_1 ] 13.397112 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ] 13.397255 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ] 13.397280 s: VX_ZONE_INIT:Enabled
[C7x_1 ] 13.397315 s: VX_ZONE_ERROR:Enabled
[C7x_1 ] 13.397346 s: VX_ZONE_WARNING:Enabled
[C7x_1 ] 13.397536 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1
[C7x_1 ] 13.397600 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2
[C7x_1 ] 13.397661 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3
[C7x_1 ] 13.397723 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4
[C7x_1 ] 13.397788 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5
[C7x_1 ] 13.397851 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6
[C7x_1 ] 13.397914 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7
[C7x_1 ] 13.397977 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8
[C7x_1 ] 13.398000 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
[C7x_1 ] 13.398014 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ] 13.398151 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ] 13.398166 s: APP: Init ... Done !!!
[C7x_1 ] 13.398175 s: APP: Run ... !!!
[C7x_1 ] 13.398184 s: IPC: Starting echo test ...
[C7x_1 ] 13.398300 s: APP: Run ... Done !!!
[C7x_1[ 29.451931] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
] 13.399316 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[ 29.472013] Bridge firewalling registered
[x] C7X_1[s] C7X_2[P]
[C7x_1 ] 13.410365 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[s] C7X_2[P]
[C7x_1 ] 14.054594 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[s] C7X_2[P]
[C7x_2 ] 4.854161 s: CIO: Init ... Done !!!
[C7x_2 ] 4.854176 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ] 4.854189 s: CPU is running FreeRTOS
[C7x_2 ] 4.854198 s: APP: Init ... !!!
[C7x_2 ] 4.854207 s: SCICLIENT: Init ... !!!
[C7x_2 ] 4.854324 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
[C7x_2 ] 4.854339 s: SCICLIENT: DMSC FW revision 0x8
[C7x_2 ] 4.854350 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ] 4.854361 s: SCICLIENT: Init ... Done !!!
[C7x_2 ] 4.854372 s: UDMA: Init ... !!!
[C7x_2 ] 4.855184 s: UDMA: Init ... Done !!!
[C7x_2 ] 4.855198 s: MEM: Init ... !!!
[C7x_2 ] 4.855211 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ] 4.855233 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
[C7x_2 ] 4.855253 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
[C7x_2 ] 4.855270 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 128000000 of size 67108864 bytes !!!
[C7x_2 ] 4.855290 s: MEM: Init ... Done !!!
[C7x_2 ] 4.855299 s: IPC: Init ... !!!
[C7x_2 ] 4.855316 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ] 4.855333 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_2 ] 12.600440 s: IPC: HLOS is ready !!!
[C7x_2 ] 12.602227 s: IPC: Init ... Done !!!
[C7x_2 ] 12.602244 s: APP: Syncing with 4 CPUs ... !!!
[C7x_2 ] 13.397093 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_2 ] 13.397111 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ] 13.397261 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ] 13.397284 s: VX_ZONE_INIT:Enabled
[C7x_2 ] 13.397296 s: VX_ZONE_ERROR:Enabled
[C7x_2 ] 13.397334 s: VX_ZONE_WARNING:Enabled
[C7x_2 ] 13.397779 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1
[C7x_2 ] 13.397803 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
[C7x_2 ] 13.397816 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ] 13.398069 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ] 13.398085 s: UDMA Copy: Init ... !!!
[C7x_2 ] 13.398919 s: UDMA Copy: Init ... Done !!!
[C7x_2 ] 13.398934 s: APP: Init ... Done !!!
[C7x_2 ] 13.398944 s: APP: Run ... !!!
[C7x_2 ] 13.398953 s: IPC: Starting echo test ...
[C7x_2 ] 13.399072 s: APP: Run ... Done !!!
[C7x_2 ] 13.399326 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[P] C7X_2[s]
[C7x_2 ] 13.410440 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[P] C7X_2[s]
[C7x_2 ] 14.054620 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[P] C7X_2[s]
[ 30.217039] process 'docker/tmp/qemu-check750599151/check' started with executable stack
root@j721s2-evm:/opt/vision_apps# ./run_app_single_cam.sh
APP: Init ... !!!
MEM: Init ... !!!
MEM: Initialized DMA HEAP (fd=4) !!!
MEM: Init ... Done !!!
IPC: Init ... !!!
IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
43.144834 s: GTC Frequency = 200 MHz
APP: Init ... Done !!!
43.150019 s: VX_ZONE_INIT:Enabled
43.150033 s: VX_ZONE_ERROR:Enabled
43.150039 s: VX_ZONE_WARNING:Enabled
43.151177 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
43.152019 s: VX_ZONE_INIT:[tivxHostInitLocal:93] Initialization Done for HOST !!!
sensor_selection = [0]
ldc_enable = [0]
num_frames_to_run = [1000000000]
is_interactive = [1]
IttCtrl_registerHandler: command echo registered at location 0
IttCtrl_registerHandler: command iss_read_2a_params registered at location 1
IttCtrl_registerHandler: command iss_write_2a_params registered at location 2
IttCtrl_registerHandler: command iss_raw_save registered at location 3
IttCtrl_registerHandler: command iss_yuv_save registered at location 4
IttCtrl_registerHandler: command iss_read_sensor_reg registered at location 5
IttCtrl_registerHandler: command iss_write_sensor_reg registered at location 6
IttCtrl_registerHandler: command dev_ctrl registered at location 7
IttCtrl_registerHandler: command iss_send_dcc_file registered at location 8
NETWORK: Opened at IP Addr = 192.168.0.20, socket port=5000!!!
43.165164 s: ISS: Enumerating sensors ... !!!
[MCU2_0] 43.165341 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_ENUMERATE
[MCU2_0] 43.165508 s: write 0xfe to TCA6408 register 0x3
[MCU2_0] 43.265045 s: UB960 config start
[MCU2_0] 43.465297 s: End of UB960 config
[MCU2_0] 43.465322 s: UB960 config start
43.665462 s: ISS: Enumerating sensors ... found 0 : IMX390-UB953_D3
43.665482 s: ISS: Enumerating sensors ... found 1 : AR0233-UB953_MARS
43.665504 s: ISS: Enumerating sensors ... found 2 : AR0820-UB953_LI
43.665509 s: ISS: Enumerating sensors ... found 3 : AR0341-UB953_MARS
43.665515 s: ISS: Enumerating sensors ... found 4 : UB9xxx_RAW12_TESTPATTERN
43.665520 s: ISS: Enumerating sensors ... found 5 : UB96x_UYVY_TESTPATTERN
43.665525 s: ISS: Enumerating sensors ... found 6 : GW_AR0233_UYVY
Select camera port index 0-7 : [MCU2_0] 43.665296 s: End of UB960 config
0
7 registered sensor drivers
a : IMX390-UB953_D3
b : AR0233-UB953_MARS
c : AR0820-UB953_LI
d : AR0341-UB953_MARS
e : UB9xxx_RAW12_TESTPATTERN
f : UB96x_UYVY_TESTPATTERN
g : GW_AR0233_UYVY
Select a sensor above or press '0' to autodetect the sensor : Invalid selection
. Try again
7 registered sensor drivers
a : IMX390-UB953_D3
b : AR0233-UB953_MARS
c : AR0820-UB953_LI
d : AR0341-UB953_MARS
e : UB9xxx_RAW12_TESTPATTERN
f : UB96x_UYVY_TESTPATTERN
g : GW_AR0233_UYVY
Select a sensor above or press '0' to autodetect the sensor : d
Sensor selected : AR0341-UB953_MARS
LDC Selection Yes(1)/No(0) : LDC Selection Yes(1)/No(0) : 0
Querying AR0341-UB953_MARS
51.214608 s: ISS: Querying sensor [AR0341-UB953_MARS] ... !!!
51.214939 s: ISS: Querying sensor [AR0341-UB953_MARS] ... Done !!!
51.214950 s: ISS: Initializing sensor [AR0341-UB953_MARS], doing IM_SENSOR_CMD_PWRON ... !!!
51.215240 s: ISS: Initializing sensor [AR0341-UB953_MARS], doing IM_SENSOR_CMD_CONFIG ... !!!
[MCU2_0] 51.214759 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_QUERY
[MCU2_0] 51.214796 s: Received Query for AR0341-UB953_MARS
[MCU2_0] 51.215079 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_PWRON
[MCU2_0] 51.215114 s: IM_SENSOR_CMD_PWRON : channel_mask = 0x1
[MCU2_0] 51.215366 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CONFIG
[MCU2_0] 51.215400 s: Application requested features = 0x158
[MCU2_0]
[MCU2_0] 51.215434 s: UB960 config start
[MCU2_0] 51.471127 s: End of UB960 config
[MCU2_0] 51.471154 s: UB960 config start
[MCU2_0] 51.727127 s: End of UB960 config
[MCU2_0] 51.727289 s: UB960 config start
[MCU2_0] 51.731127 s: End of UB960 config
[MCU2_0] 51.831044 s: ub953 config start : slaveAddr = 0x74
[MCU2_0] 52.836135 s: End of UB953 config
[MCU2_0] 52.936044 s: Configuring camera # 0
[MCU2_0] 52.936204 s: UB960 config start
[MCU2_0] 52.940127 s: End of UB960 config
[MCU2_0] 52.990043 s: ub953 config start : slaveAddr = 0x74
[MCU2_0] 53.995134 s: End of UB953 config
[MCU2_0] 54.046322 s: Configuring AR0341 imager .. Please wait till it finishes
[MCU2_0] 56.724045 s: AR0341 config done
[MCU2_0] 56.724069 s: AR0341 config validation of selected registers:
[MCU2_0] 56.725375 s: MIPI deskew pattern width (first reg written after reset): 84b
[MCU2_0] 56.726690 s: PLL_pre_clock_divisor: 3
[MCU2_0] 56.727992 s: PLL_Multiplier: aa
[MCU2_0] 56.729291 s: VT PIX_CLK_DIV: 8
[MCU2_0] 56.730591 s: Line length Pix: f80
56.739911 s: ISS: Initializing sensor [AR0341-UB953_MARS] ... Done !!!
[MCU2_0] 56.731894 s: Frame length Lines: 646
[MCU2_0] 56.733196 s: Serial format: 204
[MCU2_0] 56.734495 s: CSI LANE Mode: 300
[MCU2_0] 56.735798 s: Y address end: 603
[MCU2_0] 56.737100 s: X address end: 787
[MCU2_0] 56.738403 s: Coarse Int time T1: 2d2
[MCU2_0] 56.739709 s: Green Gain T2 (last reg written): 81
[MCU2_0] 56.739737 s: IM_SENSOR_CMD_CONFIG returning status = 0
read_test_image_raw : Unable to open file /opt/vision_apps/test_data/img_test.raw
app_create_viss : sensor_dcc_id = 341
Enabling DSS_M2M
56.789622 s: ISS: Starting sensor [AR0341-UB953_MARS] ... !!!
[MCU2_0] 56.789948 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_ON
[MCU2_0] 56.790010 s: IM_SENSOR_CMD_STREAM_ON: channel_mask = 0x1
[MCU2_0] 56.790052 s: UB960 config start
[MCU2_0] 57.046128 s: End of UB960 config
[MCU2_0] 57.046159 s: UB960 config start
[MCU2_0] 57.302128 s: End of UB960 config
[MCU2_0] 57.315323 s: Mode select reg after streaming start: 100
[MCU2_0] 57.315357 s: UB960 config start
[MCU2_0] 57.331128 s: End of UB960 config
57.341185 s: ISS: Starting sensor [AR0341-UB953_MARS] ... !!!
==========================
Demo : Single Camera w/ 2A
==========================
p: Print performance statistics
s: Save Sensor RAW, VISS Output and H3A output images to File System
e: Export performance statistics
u: Update DCC from File System
x: Exit
Enter Choice:
Unsupported command
==========================
Demo : Single Camera w/ 2A
==========================
p: Print performance statistics
s: Save Sensor RAW, VISS Output and H3A output images to File System
e: Export performance statistics
u: Update DCC from File System
x: Exit
Enter Choice: p
Summary of CPU load,
====================
CPU: mpu1_0: TOTAL LOAD = 0.43 % ( HWI = 0. 5 %, SWI = 0. 1 % )
CPU: mcu2_0: TOTAL LOAD = 19. 0 % ( HWI = 0. 0 %, SWI = 0. 0 % )
CPU: mcu2_1: TOTAL LOAD = 14. 0 % ( HWI = 0. 0 %, SWI = 0. 0 % )
CPU: c7x_1: TOTAL LOAD = 1. 0 % ( HWI = 0. 0 %, SWI = 0. 0 % )
CPU: c7x_2: TOTAL LOAD = 0. 0 % ( HWI = 0. 0 %, SWI = 0. 0 % )
HWA performance statistics,
===========================
HWA: VISS: LOAD = 13.43 % ( 85 MP/s )
DDR performance statistics,
===========================
DDR: READ BW: AVG = 507 MB/s, PEAK = 9368 MB/s
DDR: WRITE BW: AVG = 491 MB/s, PEAK = 3014 MB/s
DDR: TOTAL BW: AVG = 998 MB/s, PEAK = 12382 MB/s
Detailed CPU performance/memory statistics,
===========================================
DDR_SHARED_MEM: Alloc's: 21 alloc's of 59074606 bytes
DDR_SHARED_MEM: Free's : 0 free's of 0 bytes
DDR_SHARED_MEM: Open's : 21 allocs of 59074606 bytes
DDR_SHARED_MEM: Total size: 536870912 bytes
CPU: mcu2_0: TASK: IPC_RX: 0. 4 %
CPU: mcu2_0: TASK: REMOTE_SRV: 3.26 %
CPU: mcu2_0: TASK: LOAD_TEST: 0. 0 %
CPU: mcu2_0: TASK: TIVX_CPU_0: 1.34 %
CPU: mcu2_0: TASK: TIVX_V1NF: 0. 0 %
CPU: mcu2_0: TASK: TIVX_V1LDC1: 0. 0 %
CPU: mcu2_0: TASK: TIVX_V1SC1: 0. 0 %
CPU: mcu2_0: TASK: TIVX_V1MSC2: 0. 0 %
CPU: mcu2_0: TASK: TIVXVVISS1: 0.51 %
CPU: mcu2_0: TASK: TIVX_CAPT1: 0. 0 %
CPU: mcu2_0: TASK: TIVX_CAPT2: 0.10 %
CPU: mcu2_0: TASK: TIVX_DISP1: 0. 0 %
CPU: mcu2_0: TASK: TIVX_DISP2: 0. 0 %
CPU: mcu2_0: TASK: TIVX_CSITX: 0.10 %
CPU: mcu2_0: TASK: TIVX_CAPT3: 0. 0 %
CPU: mcu2_0: TASK: TIVX_CAPT4: 0. 0 %
CPU: mcu2_0: TASK: TIVX_CAPT5: 0. 0 %
CPU: mcu2_0: TASK: TIVX_CAPT6: 0. 0 %
CPU: mcu2_0: TASK: TIVX_CAPT7: 0. 0 %
CPU: mcu2_0: TASK: TIVX_CAPT8: 0. 0 %
CPU: mcu2_0: TASK: TIVX_DPM2M1: 0.24 %
CPU: mcu2_0: TASK: TIVX_DPM2M2: 0. 0 %
CPU: mcu2_0: TASK: TIVX_DPM2M3: 0. 0 %
CPU: mcu2_0: TASK: TIVX_DPM2M4: 0. 0 %
CPU: mcu2_0: HEAP: DDR_LOCAL_MEM: size = 16777216 B, free = 16047360 B ( 95 % unused)
CPU: mcu2_1: TASK: IPC_RX: 0. 0 %
CPU: mcu2_1: TASK: REMOTE_SRV: 0. 0 %
CPU: mcu2_1: TASK: LOAD_TEST: 0. 0 %
CPU: mcu2_1: TASK: TIVX_CPU_1: 0. 0 %
CPU: mcu2_1: TASK: TIVX_SDE: 0. 0 %
CPU: mcu2_1: TASK: TIVX_DOF: 0. 0 %
CPU: mcu2_1: TASK: IPC_TEST_RX: 0. 0 %
CPU: mcu2_1: TASK: IPC_TEST_TX: 0. 0 %
CPU: mcu2_1: TASK: IPC_TEST_TX: 0. 0 %
CPU: mcu2_1: TASK: IPC_TEST_TX: 0. 0 %
CPU: mcu2_1: TASK: IPC_TEST_TX: 0. 0 %
CPU: mcu2_1: HEAP: DDR_LOCAL_MEM: size = 16777216 B, free = 16773120 B ( 99 % unused)
CPU: c7x_1: TASK: IPC_RX: 0. 0 %
CPU: c7x_1: TASK: REMOTE_SRV: 0. 0 %
CPU: c7x_1: TASK: LOAD_TEST: 0. 0 %
CPU: c7x_1: TASK: TIVX_C71_P1: 0. 0 %
CPU: c7x_1: TASK: TIVX_C71_P2: 0. 0 %
CPU: c7x_1: TASK: TIVX_C71_P3: 0. 0 %
CPU: c7x_1: TASK: TIVX_C71_P4: 0. 0 %
CPU: c7x_1: TASK: TIVX_C71_P5: 0. 0 %
CPU: c7x_1: TASK: TIVX_C71_P6: 0. 0 %
CPU: c7x_1: TASK: TIVX_C71_P7: 0. 0 %
CPU: c7x_1: TASK: TIVX_C71_P8: 0. 0 %
CPU: c7x_1: TASK: IPC_TEST_RX: 0. 0 %
CPU: c7x_1: TASK: IPC_TEST_TX: 0. 0 %
CPU: c7x_1: TASK: IPC_TEST_TX: 0. 0 %
CPU: c7x_1: TASK: IPC_TEST_TX: 0. 0 %
CPU: c7x_1: TASK: IPC_TEST_TX: 0. 0 %
CPU: c7x_1: HEAP: DDR_LOCAL_MEM: size = 268435456 B, free = 268435200 B ( 99 % unused)
CPU: c7x_1: HEAP: L3_MEM: size = 3964928 B, free = 3964928 B (100 % unused)
CPU: c7x_1: HEAP: L2_MEM: size = 458752 B, free = 458752 B (100 % unused)
CPU: c7x_1: HEAP: L1_MEM: size = 16384 B, free = 16384 B (100 % unused)
CPU: c7x_1: HEAP: DDR_SCRATCH_MEM: size = 385875968 B, free = 385875968 B (100 % unused)
CPU: c7x_2: TASK: IPC_RX: 0. 0 %
CPU: c7x_2: TASK: REMOTE_SRV: 0. 0 %
CPU: c7x_2: TASK: LOAD_TEST: 0. 0 %
CPU: c7x_2: TASK: TIVX_CPU: 0. 0 %
CPU: c7x_2: TASK: IPC_TEST_RX: 0. 0 %
CPU: c7x_2: TASK: IPC_TEST_TX: 0. 0 %
CPU: c7x_2: TASK: IPC_TEST_TX: 0. 0 %
CPU: c7x_2: TASK: IPC_TEST_TX: 0. 0 %
CPU: c7x_2: TASK: IPC_TEST_TX: 0. 0 %
CPU: c7x_2: HEAP: DDR_LOCAL_MEM: size = 16777216 B, free = 16772608 B ( 99 % unused)
CPU: c7x_2: HEAP: L2_MEM: size = 458752 B, free = 458752 B (100 % unused)
CPU: c7x_2: HEAP: L1_MEM: size = 16384 B, free = 16384 B (100 % unused)
CPU: c7x_2: HEAP: DDR_SCRATCH_MEM: size = 67108864 B, free = 67108864 B (100 % unused)
GRAPH: graph_86 (#nodes = 5, #executions = 451)
NODE: CSITX: node_112: avg = 16070 usecs, min/max = 16027 / 16092 usecs, #executions = 451
NODE: CAPTURE2: node_97: avg = 33256 usecs, min/max = 33223 / 38701 usecs, #executions = 451
NODE: VPAC_VISS1: VISS_Processing: avg = 4996 usecs, min/max = 4976 / 5382 usecs, #executions = 451
NODE: MCU2-0: 2A_AlgNode: avg = 1955 usecs, min/max = 1801 / 8169 usecs, #executions = 451
NODE: DSS_M2M1: node_109: avg = 5219 usecs, min/max = 5184 / 5441 usecs, #executions = 451
PERF: TOTAL: avg = 33293 usecs, min/max = 32939 / 37408 usecs, #executions = 452
PERF: TOTAL: 30. 3 FPS
==========================
Demo : Single Camera w/ 2A
==========================
p: Print performance statistics
s: Save Sensor RAW, VISS Output and H3A output images to File System
e: Export performance statistics
u: Update DCC from File System
x: Exit
Enter Choice:
Unsupported command
==========================
Demo : Single Camera w/ 2A
==========================
p: Print performance statistics
s: Save Sensor RAW, VISS Output and H3A output images to File System
e: Export performance statistics
u: Update DCC from File System
x: Exit
Enter Choice: x
89.445346 s: ISS: Stopping sensor [AR0341-UB953_MARS] ... !!!
[MCU2_0] 89.445535 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_OFF
[MCU2_0] 89.445598 s: IM_SENSOR_CMD_STREAM_ON: channel_mask = 0x1
[MCU2_0] 89.457047 s: UB960 config start
89.473259 s: ISS: Stopping sensor [AR0341-UB953_MARS] ... Done !!!
[MCU2_0] 89.473132 s: End of UB960 config
89.571886 s: ISS: Stopping sensor [AR0341-UB953_MARS] ... !!!
[MCU2_0] 89.572051 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_OFF
[MCU2_0] 89.572089 s: IM_SENSOR_CMD_STREAM_ON: channel_mask = 0x1
[MCU2_0] 89.583044 s: UB960 config start
89.599259 s: ISS: Stopping sensor [AR0341-UB953_MARS] ... Done !!!
[MCU2_0] 89.599128 s: End of UB960 config
[MCU2_0] 89.605312 s: ==========================================================
[MCU2_0] 89.605370 s: Csitx Status: Instance|0
[MCU2_0] 89.605397 s: ==========================================================
[MCU2_0] 89.605435 s: FIFO Overflow Count: 0
[MCU2_0] 89.605460 s: Channel Num | Frame Queue Count | Frame De-queue Count | Frame Repeat Count |
[MCU2_0] 89.605513 s: 0| 964| 964| 0|
89.612841 s: ISS: De-initializing sensor [AR0341-UB953_MARS] ... !!!
89.613109 s: ISS: De-initializing sensor [AR0341-UB953_MARS] ... Done !!!
89.613125 s: VX_ZONE_INIT:[tivxHostDeInitLocal:107] De-Initialization Done for HOST !!!
[MCU2_0] 89.606957 s: ==========================================================
[MCU2_0] 89.607019 s: Display M2M Status: Instance|0
[MCU2_0] 89.607052 s: ==========================================================
[MCU2_0] 89.607089 s: Queue Count: 964
[MCU2_0] 89.607116 s: De-queue Count: 964
[MCU2_0] 89.607146 s: Write-back Frames Count: 964
[MCU2_0] 89.607175 s: Underflow Count: 0
[MCU2_0] 89.610211 s: ==========================================================
[MCU2_0] 89.610275 s: Capture Status: Instance|0
[MCU2_0] 89.610301 s: ==========================================================
[MCU2_0] 89.610338 s: overflowCount: 0
[MCU2_0] 89.610366 s: spuriousUdmaIntrCount: 0
[MCU2_0] 89.610396 s: frontFIFOOvflCount: 0
[MCU2_0] 89.610422 s: crcCount: 1
[MCU2_0] 89.610447 s: eccCount: 0
[MCU2_0] 89.610473 s: correctedEccCount: 0
[MCU2_0] 89.610501 s: dataIdErrorCount: 0
[MCU2_0] 89.610529 s: invalidAccessCount: 0
[MCU2_0] 89.610557 s: invalidSpCount: 0
[MCU2_0] 89.610589 s: strmFIFOOvflCount[0]: 0
[MCU2_0] 89.610622 s: strmFIFOOvflCount[1]: 0
[MCU2_0] 89.610647 s: Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |
[MCU2_0] 89.610711 s: 0 | 966 | 966 | 0 | 0 |
[MCU2_0] 89.611022 s: ==========================================================
[MCU2_0] 89.611083 s: Capture Status: Instance|1
[MCU2_0] 89.611108 s: ==========================================================
[MCU2_0] 89.611144 s: overflowCount: 0
[MCU2_0] 89.611172 s: spuriousUdmaIntrCount: 0
[MCU2_0] 89.611201 s: frontFIFOOvflCount: 0
[MCU2_0] 89.611227 s: crcCount: 0
[MCU2_0] 89.611252 s: eccCount: 0
[MCU2_0] 89.611278 s: correctedEccCount: 0
[MCU2_0] 89.611306 s: dataIdErrorCount: 0
[MCU2_0] 89.611334 s: invalidAccessCount: 0
[MCU2_0] 89.611361 s: invalidSpCount: 0
[MCU2_0] 89.611392 s: strmFIFOOvflCount[0]: 0
[MCU2_0] 89.611425 s: strmFIFOOvflCount[1]: 0
[MCU2_0] 89.611449 s: Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |
89.617550 s: VX_ZONE_INIT:[tivxDeInitLocal:223] De-Initialization Done !!!
APP: Deinit ... !!!
REMOTE_SERVICE: Deinit ... !!!
REMOTE_SERVICE: Deinit ... Done !!!
IPC: Deinit ... !!!
IPC: DeInit ... Done !!!
MEM: Deinit ... !!!
DDR_SHARED_MEM: Alloc's: 21 alloc's of 59074606 bytes
DDR_SHARED_MEM: Free's : 21 free's of 59074606 bytes
DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes
DDR_SHARED_MEM: Total size: 536870912 bytes
MEM: Deinit ... Done !!!
APP: Deinit ... Done !!!
root@j721s2-evm:/opt/vision_apps#
