TDA4VM: Accessing GTC and PLL3 registers from the C66

Thanks

One last question the GTC base address was 0x18000000 in the example instead of 0x00A90000 like for the R5. I am wondering where in the documentation this is spelled out.

Thanks again

So continuing on, is there examples that do the same on the C71

Yes, you can look into the same file, above mentioned. 

Regards,

Brijesh

So I am trying to get the C7x to work and in my init I call

Hey Brijesh, after looking into this further, I didn't find anything specific to the C7. When I try to read the module clock frequency, it waits indefinitely. First I wanted to confirm that it has nothing to do with RAT Config Region Translation. I have tried with and with out running it. No difference, unless I have the wrong BASE address. So far I have not found what it might be in the documentation. 

Hi,

Joseph Dobesh said:

status = Sciclient_pmGetModuleClkFreq(TISCI_DEV_GTC0,

                                           TISCI_DEV_GTC0_GTC_CLK,

                                           &clkFreq,

                                           SCICLIENT_SERVICE_WAIT_FOREVER)

I don't think that this API would require RAT configuration. Is it running properly for other cores?
Are you able to run this API on C66 without any issues?

Regards,
Parth

Yes, I am able to run it on R5 and C66 (using the RAT). I was wondering if I needed the run the sciclient Init before anything but that never returns also. Deep down in the code it is waiting for a thread event. Perhaps I was running the wrong Init routine.

So this is the place where Sciclient_init is hanging

/* Check if some message is received*/
while (((HW_RD_REG32(Sciclient_threadStatusReg(rxThread)) &
CSL_SEC_PROXY_RT_THREAD_STATUS_CUR_CNT_MASK) - initialCount) <= 0U)
{
if (timeToWait > 0U)
{
timeToWait--;
}
else
{
status = CSL_ETIMEOUT;
break;
}
}

Hi Joseph, 

I just tried this on my end and I can see this API returning success. Can you please share more details about your system? How you are testing this API? Are you running using SBL or CCS?

Regards,
Parth

Hey Parth, I am running CCS. The only other core running is the MCU. A coworker was also able to get it working. She was using the latest RTOS. I am running ti-processor-sdk-rtos-j721e-evm-08_06_00_12/pdk_jacinto_08_06_00_31. We are in the process of comparing make and linker files. If we don't see anything there I will try updating the RTOS.

Hi Joseph,

Actually, even I tested SDK 8.6 and used the CCS. Not sure, what could be causing the issue at your end. 

Joseph Dobesh said:

The only other core running is the MCU

The MCU is running the DM firmware right?

Regards,
Parth

We got it. There were some items missing from the launch.js file

There was also an issue with the linker file. I downloaded the generic file from TI and it is all good.