AM6412: Using BCDMA other than channel#0

Hello Koichiro Tashiro,

I am looking at your queries, and you may expect a reply by today.

Regards,

S.Anil.

Hello Koichiro Tashiro,

There is only BCDMA instant on the AM64X device in that you have to select different channels.

To select different channels, please follow the below steps.

Please look at the below image. click the add option for multiple channels.

Regards,

S.Anil.

Hi Anil,

Swargam Anil said:

There is only BCDMA instant on the AM64X device in that you have to select different channels.

I understood there is only one BCDMA instance and we can use multiple channels in it.
Suppose multiple Cores (like A53 and R5) are using BCDMA, is it OK to use different channels simultaneously (ch0 in A53 and ch1 in R5 for example)?

Thanks and regards,
Koichiro Tashiro

Hi Anil,

Don't need it. Even though you configured the same channel number, finally real channel numbers are allocated based on the cores.

Does this handled by BCDMA driver in RTOS?
If so, in the customer's usecase, A53 uses Linux, so there may be conflict between RTOS and Linux, correct?

Thanks and regards,
Koichiro Tashiro

Koichiro Tashiro said:

If so, in the customer's usecase, A53 uses Linux, so there may be conflict between RTOS and Linux, correct?

Hello, Koichiro Tashiro,

Mostly all resources are allocated to support both R5F and A53 applications, and there are no issues.

If the customer  uses  A53 Linux + RTOS CORES( M4F + R5F), SOC uses the resource allocation from the below file.

C:\ti\mcu_plus_sdk_am64x_08_05_00_24\source\drivers\sciclient\sciclient_default_boardcfg\am64x_am243x

If the customer uses only the RTOS application and there is no A53 Linux , SOC uses the resource allocation from the below file.

C:\ti\mcu_plus_sdk_am64x_08_05_00_24\source\drivers\sciclient\sciclient_default_boardcfg\am64x_am243x

Please let me know if you face any problem.

I am curious customer uses A53 on Linux or Custom OS ?

Regards,

S.Anil.

Hi Anil,

I checked the customer's usecase.
In fact they use dual-OS (Linux and RTOS) on A53 cores.
Linux is running on A53 Core0
RTOS is running on A53 Core1

According to the customer, u-boot running on Core0 is using BCDMA ch0 for data transfer from SPI.
RTOS on Core1 also uses BCDMA ch0 and sometimes it fails (probably due to resource conflict?)

Swargam Anil said:

If the customer  uses  A53 Linux + RTOS CORES( M4F + R5F), SOC uses the resource allocation from the below file.

Could you explain how A53 Linux and RTOS cores handle resource allocation?
Is this applicable for dual-OS on A53 cores?

Thanks and regards,
Koichiro Tashiro

Hi Anil,

I understand that A53 Core 0 uses SPI with DMA.

Yes. This is what the customer understood. They modified TI SDK with below patch to output debug log.

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index d311dfbd60..d192f010c3 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -508,7 +508,7 @@ static int udma_start(struct udma_chan *uc)
 	if (udma_is_chan_running(uc))
 		goto out;
 
-	pr_debug("%s: chan:%d dir:%s\n",
+	printf("%s: chan:%d dir:%s\n",
 		 __func__, uc->id, udma_get_dir_text(uc->config.dir));
 
 	/* Make sure that we clear the teardown bit, if it is set */
@@ -559,7 +559,7 @@ static int udma_start(struct udma_chan *uc)
 		return -EINVAL;
 	}
 
-	pr_debug("%s: DONE chan:%d\n", __func__, uc->id);
+	printf("%s: DONE chan:%d\n", __func__, uc->id);
 out:
 	return 0;
 }
@@ -618,7 +618,7 @@ static inline void udma_stop_dev2mem(struct udma_chan *uc, bool sync)
 
 static inline int udma_stop(struct udma_chan *uc)
 {
-	pr_debug("%s: chan:%d dir:%s\n",
+	printf("%s: chan:%d dir:%s\n",
 		 __func__, uc->id, udma_get_dir_text(uc->config.dir));
 
 	udma_reset_counters(uc);
@@ -1814,7 +1814,7 @@ static int udma_probe(struct udevice *dev)
 			uc->in_use = true;
 	}
 
-	pr_debug("%s(rev: 0x%08x) CAP0-3: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
+	printf("%s(rev: 0x%08x) CAP0-3: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
 		 dev->name,
 		 udma_read(ud->mmrs[MMR_GCFG], 0),
 		 udma_read(ud->mmrs[MMR_GCFG], 0x20),
@@ -2176,7 +2176,7 @@ static int bcdma_alloc_chan_resources(struct udma_chan *uc)
 	switch (uc->config.dir) {
 	case DMA_MEM_TO_MEM:
 		/* Non synchronized - mem to mem type of transfer */
-		dev_dbg(uc->ud->dev, "%s: chan%d as MEM-to-MEM\n", __func__,
+		printf("%s: chan%d as MEM-to-MEM\n", __func__,
 			uc->id);
 
 		ret = bcdma_alloc_bchan_resources(uc);
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 394f6e2060..112c2c1bc4 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -1005,6 +1005,7 @@ cadence_qspi_apb_direct_read_execute(struct cadence_spi_platdata *plat,
 	}
 
 	if (!cadence_qspi_apb_use_phy(plat, op)) {
+		printf("MDC=> before dma_memcpy()\n");
 		if (dma_memcpy(buf, plat->ahbbase + from, len) < 0)
 			memcpy_fromio(buf, plat->ahbbase + from, len);
 

=> sf read ${kernel_addr_r} 0 0x100000
device 0 offset 0x0, size 0x100000
MDC=> before dma_memcpy()
bcdma_alloc_chan_resources: chan0 as MEM-to-MEM
udma_start: chan:0 dir:MEM_TO_MEM
udma_start: DONE chan:0
udma_stop: chan:0 dir:MEM_TO_MEM
SF: 1048576 bytes @ 0x0 Read: OK

Here, A53 Core can use PDMA and PKTDMA and doesn't use BCDMA mode.

Do you mean A53 core never uses BCDMA? If so, the above log is something wrong.

BTW, I understood there is some mechanism for resource allocation among CPU cores in TI MCU plus SDK.
The customer used that SDK, but as you mentioned A53 core is not officially supported.
In this case the resource allocation does not work for A53 Linux and A53 RTOS?
If so, are there possibility resource conflict between Linux and RTOS?

Thanks and regards,
Koichiro Tashiro

Hello Koichiro Tashiro,

Which boot mode are you using?

Exactly, what is the requirement?

Which peripheral, along with DMA, is being used on the A53 core?

Similarly, which peripherals along with DMA are used on the R5F core?

Are you transferring data from the A53 core to the R5F?

Please explain what the use case is here.

Please provide a reply for the above queries to besters assist later, I will give a reply for the above queries.

Regards,

S.Anil.