Hi,
I am trying to use the GPMC interface of OMAP in Pandaboard to
communicate with a Xilinx FPGA in synchronous NOR mode. Inspite of correct pad mux selection,
GPMC registers configuration and VDD voltage settings (to 1.8V), we are
observing a strange issue of clock (GPMC_CLK) being at 1.0V (instead of 1.8V).
All other control signals (such as nCS, nOE) are at proper voltage of 1.8V.
Further more, the timing of the control signals (nCS, nWE, nOE) appears to
be incorrect. They are not changing on gpmc_clk posedge as expected (since the
GPMC_FCLK divider is set to "0"). We are using the A-A-D mode of multiplexing
option.
Any suggestions on what could be the problem would be highly appreciated.
thanks,
Manohar
>> I have a DDR3 on an FPGA which I want to access from Panda over GPMC
>> interface.
>>
>> I am using AAD mode of GPMC and I am able to send data to the other side
>> from Panda. But I am facing some issues.
>> GPMC_CLK interface voltage I am seeing is around 1 to 1.1 V, even though
>> all the other interface connections are at 1.8 V. Also, I am not seeing
>> data changing with rising GPMC_CLK.
>>
>> Mostly looks like the GPMC programming I am doing are not proper. It would
>> be a great favor if you can share the u-boot changes for GPMC interface. I
>> would be obliged for any help here.
>>
>> thanks and best regards,
>> Kapil Hali
