PROCESSOR-SDK-AM62P: HOW to configure the esm interrupt for triggering the wdg reset

Hello Anjana, 

I assume you are asking regarding the ESM event that gets triggered on expiry of the Wdg timer and on how to configure it. The ESM events corresponding to the Wdg timer can be found in Table 10-40 (WKUP_ESM0_INTERRUPT_MAP Memory Map) of AM62Px TRM.(Attaching screenshot below).

To understand how to enable these events in software, you can go through the FAQ below. It is also applicable for AM62Px. 

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1265594/faq-am64x-am62x-am62ax-configuring-the-esm-module-from-sdl-and-setting-the-esm-bit-fields-to-enable-the-esm-error-events

Additionally, you can go through the SDL RTI example(C:\ti\mcu_plus_sdk_am62px_09_01_00_39\examples\sdl\rti) provided in the MCU+SDK. This example configures the Wdg and also initializes the ESM module with the corresponding RTI events enabled.

(https://software-dl.ti.com/mcu-plus-sdk/esd/AM62PX/09_01_00_39/exports/docs/api_guide_am62px/EXAMPLES_SDL_RTI.html)

If you any additional questions after going through the FAQ and the reference example, feel free to respond back on this thread.

Regards,

Nihar Potturu.