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TMDS64EVM: Using CPSW on A53 (AARCH64)

Duy Trung Nguyen
Prodigy 70 points

Part Number: TMDS64EVM
Other Parts Discussed in Thread: AM6411,

Hello,

Our firmware should run on a53/AM6411. I'm currently using the TMDS64EVM board to get started. First I would like to use the ethernet port (CPSW, J14) to implement diagnostics/WEB server (TCP/IP). The example “Enet Layer 2 CPSW Example” (enet_l2_cpsw_am64x-evm_r5fss0-0_freertos_ti-arm-clang):

 https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_01_00_36/exports/docs/api_guide_am64x/EXAMPLES_ENET_LAYER2_CPSW.html


would be suitable, but it is only designed for R5FSS CPU. Do you have something similar for me that can run under a53 / AARCH64?

Thank you very much for support!

N. Trung

  • +1
    TI__Expert 7395 points

    Hi,

    As of now, we do not have a dedicated example in MCU+SDK similar to enet_layer2_cpsw for AM64x that can run on A53 

    Regards,

    Nitika

  • 0 in reply to Nitika Verma
    Prodigy 70 points

    Hi,

    can you please provide the source code of the driver used to build the library “enet-cpsw.am64x.r5f.ti-arm-clang.debug.lib” for the R5F target? I'll try to adapt it for a53/_aarch64_ (similarly I did successfully for OSPI since you also only have drivers for r5f target). We need the A53 because the R5's performance is not sufficient for our application.

    Regards

    Trung

  • 0 in reply to Duy Trung Nguyen
    TI__Expert 7395 points

    Hi,

    You can refer to the makefile "makefile.cpsw.am64x.r5f.ti-arm-clang" under source/networking/enet, this has information involved in building the library “enet-cpsw.am64x.r5f.ti-arm-clang.debug.lib”.

    Also, can you please elaborate your use case and why you are looking into replacing R5 with A53? 

    Regards,

    Nitika

  • 0 in reply to Nitika Verma
    Prodigy 70 points

    Thank you very much. I have find the make-file. I will be able to continue the project next week.
    The “Sercos Bridge” project is not for us, but for one of our customers.
    On the R5 core runs the second bootloaders and is for updates (OSPI is used) responsible. The bootloader copies to and starts firmeware from the RAM memory so the whole application (firmware source codes, data...) runs in RAM, a53.
    On one side, the bridge contains a sercos 3 interface (sercos ip-core=PRU firmware/real-time ethernet, 100MBit) with 6x sercos3 slave devices, on the other side there is a sercos 2 master, which controls up to 6 Sercos-2 drives (Sercos IP core = SERCON816/optical transmission connected to GPMC).
    Both buses are synchronized via SYNC0 of ICSS0. The communication cycle time is 1ms, time jitter <= 1us. In addition to the real-time channel, data is also sporadically exchanged via the parameter channel. The rest of the 1ms bandwidth (cca 300us) is used for so-called UC channel to transport raw data by using UDP or TFTP.
    The ethernet interface CPSW is responsible for web servers, diagnostics, fw-transmission and remote maintenance. I hope I can adapt and build your library for A53/64-bit without much effort.
    Best Regards
    N. Trung

  • 0 in reply to Duy Trung Nguyen
    TI__Expert 7395 points

    Hi,

    Thank you for the summary of the project. Hope the makefile helps with the implementation.

    Regards,

    Nitika