AM62A7: Custom board stuck in SPL

Evan

Part Number: AM62A7
Other Parts Discussed in Thread: SK-AM62A-LP

Hello,

I have a custom board based on the SK-AM62A-LP. The LPDDR4 device and connections should match the EVM, and the image and u-boot is the default one at the moment.

Attempting to boot from SD card, I have the following debug data:

U-Boot SPL 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000)

SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.8--v09.01.08 (Kool Koala)')

am62a_init: board_init_f done

SPL initial stack usage: 17040 bytes

(It stops there).

Using the same SD card in the evm, it does boot fully, the next lines to print are:

m62a_init: spl_boot_device: devstat = 0x243 bootmedia = 0x8 bootindex = 0
Trying to boot from MMC2
am62a_init: spl_boot_device: devstat = 0x243 bootmedia = 0x8 bootindex = 0
Authentication passed

So far as I understand the boot process, SPL has been loaded from the SD card (so the basic clock and reset of the device is OK, and the bootmode pins are set correctly).

But I am having difficulty following the U-boot code to understand:

Which processor are we in, and which memory is in use here?

What is the code trying to do when it blocks (after "SPL initial stack usage:")?

Is the "BOARD EEPROM" relevant at this stage? (I believe not but would like to know for sure).

Any commentary on how the process works, or advice how to proceed would be gratefully received!

Thank you!

over 1 year ago

0 Aparna Patra over 1 year ago

TI__Genius 12980 points

Hi,

From the logs that you have shared, it is stuck in R5 SPL stage (tiboot3.bin)
After SPL initial stack usage: 17040 bytes, code relocates stack and heap to DDR.

Generally, custom board requires DDR configuration update and configurations present in TI SDK won't work. This leads to R5 crash silently when it starts accessing DDR.

For reference: Porting Linux to Custom Hardware

(+) [FAQ] AM62A7 and AM62A7-Q1 Custom board hardware design – Collaterals to Get started - Processors forum - Processors - TI E2E support forums

Regards,
Aparna

0 Evan over 1 year ago in reply to Aparna Patra

Prodigy 111 points

Hi Aparna.

Thanks for the info.

The memory device used is MT53E1G32D2FW-046, matching the schematic/BOM for the SK-AM62A-LP eval board (PROC135E2_SCH.pdf). Can we confirm that is actually what’s on the shipped EVM? [edit: it is the same device, just different temperature grade]

The topology and board stack up is also based on that board, and the DDR layout guidance was followed as closely as possible.

I did notice that the sprad66a document has been updated in Dec ’23 with package delays. Before that I did not have this info, so I am worried that length matching may be not perfect.

My plan now is to reduce bus speeds as much as possible using the DDR configuration tool, rebuild tiboot with the generated dts file, and see if that will help.

If there is any guidance about making a “most tolerant” DDR config, please let me know. Or any other ideas to try!

0 JJD over 1 year ago in reply to Evan

TI__Guru* 86060 points

Evan, before you attempt to reduce the DDR bus speed, take these steps to ensure you can successfully build u-boot:

1. ensure you can create an SD with the .wic image and boot an EVM

2. ensure you can build u-boot with making any changes to the SDK. Guidance is here: https://dev.ti.com/tirex/explore/node?node=A__AQH3F7basNZN1Bd-xGjUng__AM62A-ACADEMY__WeZ9SsL__LATEST

3. ensure you can copy the built u-boot files to the SD card and successfully boot the EVM as you did before

4. go to https://dev.ti.com/sysconfig/?product=Processor_DDR_Config&device=AM62Ax, this is where you will generate new DDR configurations. Choose

Reference Design: SK-AM62A-LP

and change FSP2 to 800MHz. Save the .dtsi file you see on the right to your u-boot source code at u-boot/arch/arm/dts/ and change the existing

#include "k3-am62a-ddr-1866mhz-32bit.dtsi"

in k3-am62a7-r5-sk.dts to use this new file.

then rebuild u-boot, move the output files to the SD card, and see if you can successfully boot on the EVM

If this is successful on the EVM, try the SD card in your custom board. This image will have a DDR configuration for 800MHz instead of the 1866MHz (which is the default on the EVM).

Let me know the results

Regards,

James

0 Evan over 1 year ago in reply to JJD

Prodigy 111 points

Thanks James!

We had just figured out the build process so it's good to have the confirmation.

An SD card with the 800MHz u-boot is working in the EVM. Is there a way to confirm that the clock speed has changed? I don't see anything about it in the boot log.

For the moment, no change on the custom board.

0 Evan over 1 year ago in reply to Evan

Prodigy 111 points

With the 800MHz image in the custom board, I try to probe some signals.

LPDDR4_RESET_N goes high soon after power on.

LPDDR4_CK_P gets a 50MHz signal after reset goes high, but it stops after ~2ms

It seems there is a more fundamental problem...

Power rails are looking OK, including VDDA_DDR_PLL0.and VDDA_PLL0.

0 Zane Wei over 1 year ago in reply to Evan

TI__Intellectual 1665 points

Hi Evan,

Have you solved this issue? If solved, can you share the solution in this post?

Best Regards,

Zane

0 JJD over 1 year ago in reply to Zane Wei

TI__Guru* 86060 points

Evan, the 50MHz is expected initially, as this would be the first frequency that is used during DDR training. But this frequency should change to 800MHz at some point, to be able to train at that frequency. So it appears that the initial point of the training isn't working.

-Please check the voltage rails around the memory itself, including VDD_LPDDR4 (should be 1.1V) and VDD1_LPDDR4_1V8 (should be 1.8V)

-do you mean that the 50MHz goes away after ~2ms? No clock at all? Check MCU_PORz, ensure it goes high and stays high

-if possible, try to probe CKE as well. This should go high and stay high, much like RESET_N (should go high after RESET_N goes high)

-do you have JTAG access? If you can connect Code Composer via JTAG, this can help narrow down where the issue is. If so, i can give further instructions

-do you see the same issue on multiple boards? This can help identify assembly issues.

Regards,

James

0 Evan over 1 year ago in reply to JJD

Prodigy 111 points

Hi James, thanks for the help.

I obtained the LPDDR4 spec so understand the initialization a bit more, as you say the 50MHz for 2ms is normal at the start.

MCU_PORz is staying high. I will re-check the power rails next.

Then will try to connect the JTAG.

I have checked with two boards and have the same behavior.

Here are some traces:

Showing the 50MHz clock. The P and N phases of the clock are not symmetrical but the resulting differential clock looks OK. Is it normal?

Here you can see the end of the 50MHz clock (this scope cannot show 800MHz anyway but I think this flat line is true). LPDDR4_RST_N stays high. Perhaps a problem of the source PLL?

A more zoomed in view:

Fully zoomed out showing LPDDR_RST_N and CKE0. CA activity continues after the clock ended and CKE0 went low??

0 JJD over 1 year ago in reply to Evan

TI__Guru* 86060 points

Evan, i think you will need a faster scope to truly find out if the clock is going away. I think it may actually be fine, you just can't see it with the scope you are using. Everything else in the scope shots you sent look fine. CKE is expected to go low during Command Bus Training, which would be when the clock switches to a higher frequency.

May want to take a wider shot of the init sequence, to see what the signals do further in time. CKE should go back high again eventually, and you should see another short time when the clock is 50MHz again (might depend on the memory you are using). Eventually, CKE should stay high, and clock should be 800MHz. This will help determine how far into the init sequence you are getting

Definitely need to get JTAG working to better understand it. Also the power checks are important. Keep me posted.

Regards,

James

0 Evan over 1 year ago in reply to JJD

Prodigy 111 points

Hi James,

Great diagnosis! After a quick scope upgrade, the 800MHz is present (amplitude is quite small), and CKE does return high. There are also two short bursts of 50MHz again before CKE goes high.

I will confirm the power rails and then move on to connect the JTAG. Thanks again.

0 JJD over 1 year ago in reply to Evan

TI__Guru* 86060 points

Ok, great, so the training appears to be going thru the appropriate steps. My guess is that training is either failing or not coming up with appropriate values. We will be able to inspect these with JTAG and Code Composer.

Once you get Code Composer installed, here are the steps to take a DDR register dump:

Open CCS and choose View -> Target Configurations
Right click on User Defined and choose New Target Configuration
Give the file a name and click Finish
Choose the Connection based on the JTAG pod you have
For Board or Device, choose the EVM that is closest to your design and then click Save:
- AM62Ax LPDDR4: AM62A_SK_EVM
Connect the JTAG cable and power up your board to boot.
Right click on the Target Configuration file you made and Launch Selected Configuration
Connect to the R5 and run the Register Dump GEL script, examples for different devices below
- Scripts->AM62Ax_DDRSS Memory debug->AM62Ax_DDRSS_CTL_PI_PHY_RegDump()

Regards,

James

0 Evan over 1 year ago in reply to JJD

Prodigy 111 points

Hi James,

Sorry for the delay, the first JTAG debug unit was DOA.

A new unit appears to connect but the registers read from the R5 are all 0

example:

MAIN_Cortex_R5_0_0: GEL Output: Running from SMS
MAIN_Cortex_R5_0_0: GEL Output: 0x8F308000 0x00000000 //DDRSS_CTL_0_DATA
MAIN_Cortex_R5_0_0: GEL Output: 0x8F308004 0x00000000 //DDRSS_CTL_1_DATA
MAIN_Cortex_R5_0_0: GEL Output: 0x8F308008 0x00000000 //DDRSS_CTL_2_DATA
MAIN_Cortex_R5_0_0: GEL Output: 0x8F30800C 0x00000000 //DDRSS_CTL_3_DATA
MAIN_Cortex_R5_0_0: GEL Output: 0x8F308010 0x00000000 //DDRSS_CTL_4_DATA

MAIN_Cortex_R5_0_0: GEL Output: DDRSS: Subsystem ID and Revision Register (offset 0x000) = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: DDRSS: Subsystem Control Register (offset 0x004) = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: DDRSS: VBUSM2AXI Control Register (offset 0x020) = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: DDRSS: VBUSM2AXI Range 1 Match Register (offset 0x024) = 0x00000000
MAIN_Cortex_R5_0_0: GEL Output: DDRSS: VBUSM2AXI Range 2 Match Register (offset 0x028) = 0x00000000

This is after the board stopped / crashed at "SPL initial stack usage: 17032 bytes".

Report from "test connection":

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100/110/510 class product.
This utility will load the adapter 'jioxds110.dll'.
The library build date was 'Dec 6 2023'.
The library build time was '17:33:10'.
The library package version is '12.6.0.00029'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '5' (0x00000005).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the XDS110 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for XDS110 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

The JTAG DR Integrity scan-test has succeeded.

[End: Texas Instruments XDS110 USB Debug Probe_0]

0 JJD over 1 year ago in reply to Evan

TI__Guru* 86060 points

Sorry, it is picking up the wrong base address, i missed a step.

Run AM62A DDR Initialization -> DDR Init, before you run the regdump script. You should see the differences in yellow, then the register values will be correct

MAIN_Cortex_R5_0_0: GEL Output: Running from R5
MAIN_Cortex_R5_0_0: GEL Output: 0x0F308000 0x00000000 //DDRSS_CTL_0_DATA

etc.

Regards,

James

0 Evan over 1 year ago in reply to JJD

Prodigy 111 points

Thanks James, the init script does not complete:

MAIN_Cortex_R5_0_0: GEL Output: Running from SMS
MAIN_Cortex_R5_0_0: GEL Output: --->>> ECC Disabled! <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> LPDDR4 Initialization is in progress ... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR controller programming in progress.. <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR controller programming completed... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PI programming in progress.. <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PI programming completed... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Data Slice 0 programming in progress.. <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Data Slice 0 programming completed... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Data Slice 1 programming in progress.. <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Data Slice 1 programming completed... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Address Slice 0 programming in progress.. <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Address Slice 0 programming completed... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Address Slice 1 programming in progress.. <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Address Slice 1 programming completed... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Address slice 2 programming in progress.. <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY Address Slice 2 programming completed... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY programming in progress.. <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> Set PHY registers for all FSPs simultaneously (multicast)... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PHY programming completed... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> Set DDR to 25MHz for FSP F0... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR PI initialization started... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> DDR CTL initialization started... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> Inside DDR_Change_freq_ack function ... <<<---
MAIN_Cortex_R5_0_0: GEL Output: --->>> Waiting for first frequency change request ... <<<---
MAIN_Cortex_R5_0_0: Trouble Reading Memory Block at 0x63014080 on Page 0 of Length 0x4: (Error -1205 @ 0x63014080) Device memory bus has an error and may be hung. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 12.6.0.00029)
AM62_DDR_Initialization_ECC_Disabled() cannot be evaluated.

0 JJD over 1 year ago in reply to Evan

TI__Guru* 86060 points

Evan, something still doesn't seem right. Did you setup a Target Configuration with AM62Ax? Your log shows MAIN_Cortex_R5_0_0, but there is no MAIN R5 on AM62A. Below is what it should look like. Ensure you have chosen AM62Ax for the device, and that you connect to WKUP_R5FSS to run the GELs

REgards,

James

0 Evan over 1 year ago in reply to JJD

Prodigy 111 points

Hi James,

Sorry for the slow reply.

Yes, my mistake, for the above screenshot I had clicked on the wrong R5 line. Here is what happens using the init script with WKUP_R5SS0_0, without boot volume:

DDR not initialized with R5 connect.

Go to menu Scripts --> AM62 DDR Initialization -> AM62A_DDR_Initialization_ECC_Disabled to initialize DDR.

====

WKUP_R5FSS0_0: Trouble Writing Memory Block at 0xf300120 on Page 0 of Length 0x4: (Error -1065 @ 0xF300124) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 12.6.0.00029)
AM62A_DDR_Initialization_ECC_Disabled() cannot be evaluated.
Target failed to write 0x0F300120
at *((unsigned int*) (AM62A_DDRSS_SS_BASE+0x120))=(unsigned int) 0x00 [ddrss_ti_wrapper.gel:40]
at TI_disable_ECC() [AM62A_ddr_top.gel:109]
at AM62A_DDR_Initialization_ECC_Disabled()

And here, with boot volume:

WKUP_R5FSS0_0: GEL Output: Running from R5
WKUP_R5FSS0_0: GEL Output: 

DDR not initialized with R5 connect.

Go to menu Scripts --> AM62 DDR Initialization -> AM62A_DDR_Initialization_ECC_Disabled to initialize DDR.

====

WKUP_R5FSS0_0: GEL Output: 
WKUP_R5FSS0_0: GEL Output: DDR programming has already been attempted. 
WKUP_R5FSS0_0: GEL Output: DDR Initialization GEL script is being skipped...
WKUP_R5FSS0_0: GEL Output: 
WKUP_R5FSS0_0: GEL Output: 0x0F308000 0x10460B01  //DDRSS_CTL_0_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308004 0x617AD652  //DDRSS_CTL_1_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308008 0x00409E81  //DDRSS_CTL_2_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30800C 0x40020A12  //DDRSS_CTL_3_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308010 0x00052006  //DDRSS_CTL_4_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308014 0x02050020  //DDRSS_CTL_5_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308018 0x03070101  //DDRSS_CTL_6_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30801C 0x00002710  //DDRSS_CTL_7_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308020 0x000186A0  //DDRSS_CTL_8_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308024 0x00000005  //DDRSS_CTL_9_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308028 0x00000064  //DDRSS_CTL_10_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30802C 0x00027100  //DDRSS_CTL_11_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308030 0x00186A00  //DDRSS_CTL_12_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308034 0x00000005  //DDRSS_CTL_13_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308038 0x00000640  //DDRSS_CTL_14_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30803C 0x00027100  //DDRSS_CTL_15_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308040 0x00186A00  //DDRSS_CTL_16_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308044 0x00000005  //DDRSS_CTL_17_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308048 0x00000640  //DDRSS_CTL_18_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30804C 0x01010100  //DDRSS_CTL_19_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308050 0x01010101  //DDRSS_CTL_20_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308054 0x01000110  //DDRSS_CTL_21_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308058 0x02010002  //DDRSS_CTL_22_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30805C 0x0000000A  //DDRSS_CTL_23_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308060 0x000186A0  //DDRSS_CTL_24_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308064 0x00000000  //DDRSS_CTL_25_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308068 0x00000000  //DDRSS_CTL_26_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30806C 0x00000000  //DDRSS_CTL_27_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308070 0x00000000  //DDRSS_CTL_28_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308074 0x00020200  //DDRSS_CTL_29_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308078 0x00000000  //DDRSS_CTL_30_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30807C 0x00000000  //DDRSS_CTL_31_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308080 0x00000000  //DDRSS_CTL_32_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308084 0x00000000  //DDRSS_CTL_33_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308088 0x08000010  //DDRSS_CTL_34_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30808C 0x00002020  //DDRSS_CTL_35_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308090 0x00000000  //DDRSS_CTL_36_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308094 0x00000000  //DDRSS_CTL_37_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308098 0x00000000  //DDRSS_CTL_38_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30809C 0x00000000  //DDRSS_CTL_39_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080A0 0x0000040C  //DDRSS_CTL_40_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080A4 0x00000000  //DDRSS_CTL_41_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080A8 0x0000081C  //DDRSS_CTL_42_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080AC 0x00000000  //DDRSS_CTL_43_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080B0 0x0000081C  //DDRSS_CTL_44_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080B4 0x00000000  //DDRSS_CTL_45_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080B8 0x05000804  //DDRSS_CTL_46_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080BC 0x00000700  //DDRSS_CTL_47_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080C0 0x09090004  //DDRSS_CTL_48_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080C4 0x00000303  //DDRSS_CTL_49_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080C8 0x00320009  //DDRSS_CTL_50_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080CC 0x09090023  //DDRSS_CTL_51_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080D0 0x0000210F  //DDRSS_CTL_52_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080D4 0x00320009  //DDRSS_CTL_53_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080D8 0x09090023  //DDRSS_CTL_54_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080DC 0x0900210F  //DDRSS_CTL_55_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080E0 0x000A0A09  //DDRSS_CTL_56_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080E4 0x040006DB  //DDRSS_CTL_57_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080E8 0x09092005  //DDRSS_CTL_58_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080EC 0x00000C0A  //DDRSS_CTL_59_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080F0 0x06006DB0  //DDRSS_CTL_60_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080F4 0x09092007  //DDRSS_CTL_61_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080F8 0x00000C0A  //DDRSS_CTL_62_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3080FC 0x06006DB0  //DDRSS_CTL_63_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308100 0x03042007  //DDRSS_CTL_64_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308104 0x04050002  //DDRSS_CTL_65_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308108 0x100F100F  //DDRSS_CTL_66_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30810C 0x01010008  //DDRSS_CTL_67_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308110 0x041F1F07  //DDRSS_CTL_68_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308114 0x03111103  //DDRSS_CTL_69_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308118 0x00001111  //DDRSS_CTL_70_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30811C 0x00000101  //DDRSS_CTL_71_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308120 0x00000000  //DDRSS_CTL_72_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308124 0x01000000  //DDRSS_CTL_73_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308128 0x000E0803  //DDRSS_CTL_74_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30812C 0x000000BB  //DDRSS_CTL_75_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308130 0x000000E0  //DDRSS_CTL_76_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308134 0x00000C28  //DDRSS_CTL_77_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308138 0x000000E0  //DDRSS_CTL_78_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30813C 0x00000C28  //DDRSS_CTL_79_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308140 0x00000005  //DDRSS_CTL_80_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308144 0x00000007  //DDRSS_CTL_81_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308148 0x00000010  //DDRSS_CTL_82_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30814C 0x00000070  //DDRSS_CTL_83_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308150 0x0000017E  //DDRSS_CTL_84_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308154 0x00000070  //DDRSS_CTL_85_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308158 0x0000017E  //DDRSS_CTL_86_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30815C 0x03004000  //DDRSS_CTL_87_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308160 0x00001201  //DDRSS_CTL_88_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308164 0x00060005  //DDRSS_CTL_89_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308168 0x12080006  //DDRSS_CTL_90_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30816C 0x0A050512  //DDRSS_CTL_91_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308170 0x0C060503  //DDRSS_CTL_92_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308174 0x0C060503  //DDRSS_CTL_93_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308178 0x02010103  //DDRSS_CTL_94_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30817C 0x00010201  //DDRSS_CTL_95_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308180 0x000F000F  //DDRSS_CTL_96_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308184 0x00E600E6  //DDRSS_CTL_97_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308188 0x00E600E6  //DDRSS_CTL_98_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30818C 0x00000000  //DDRSS_CTL_99_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308190 0x03030000  //DDRSS_CTL_100_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308194 0x05050501  //DDRSS_CTL_101_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308198 0x02030C04  //DDRSS_CTL_102_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30819C 0x06050605  //DDRSS_CTL_103_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081A0 0x0502030C  //DDRSS_CTL_104_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081A4 0x03060506  //DDRSS_CTL_105_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081A8 0x00000303  //DDRSS_CTL_106_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081AC 0x00000301  //DDRSS_CTL_107_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081B0 0x00000001  //DDRSS_CTL_108_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081B4 0x00000000  //DDRSS_CTL_109_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081B8 0x40020100  //DDRSS_CTL_110_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081BC 0x00038010  //DDRSS_CTL_111_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081C0 0x00050004  //DDRSS_CTL_112_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081C4 0x00000004  //DDRSS_CTL_113_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081C8 0x00040003  //DDRSS_CTL_114_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081CC 0x00040005  //DDRSS_CTL_115_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081D0 0x00030000  //DDRSS_CTL_116_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081D4 0x00050004  //DDRSS_CTL_117_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081D8 0x00000004  //DDRSS_CTL_118_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081DC 0x00002EC0  //DDRSS_CTL_119_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081E0 0x00002EC0  //DDRSS_CTL_120_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081E4 0x00002EC0  //DDRSS_CTL_121_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081E8 0x00002EC0  //DDRSS_CTL_122_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081EC 0x00002EC0  //DDRSS_CTL_123_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081F0 0x00000000  //DDRSS_CTL_124_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081F4 0x0000051D  //DDRSS_CTL_125_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081F8 0x00030A00  //DDRSS_CTL_126_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3081FC 0x00030A00  //DDRSS_CTL_127_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308200 0x00030A00  //DDRSS_CTL_128_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308204 0x00030A00  //DDRSS_CTL_129_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308208 0x00030A00  //DDRSS_CTL_130_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30820C 0x00000000  //DDRSS_CTL_131_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308210 0x00005518  //DDRSS_CTL_132_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308214 0x00030A00  //DDRSS_CTL_133_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308218 0x00030A00  //DDRSS_CTL_134_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30821C 0x00030A00  //DDRSS_CTL_135_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308220 0x00030A00  //DDRSS_CTL_136_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308224 0x00030A00  //DDRSS_CTL_137_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308228 0x00000000  //DDRSS_CTL_138_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30822C 0x00005518  //DDRSS_CTL_139_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308230 0x00000000  //DDRSS_CTL_140_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308234 0x00000000  //DDRSS_CTL_141_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308238 0x00000000  //DDRSS_CTL_142_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30823C 0x00000000  //DDRSS_CTL_143_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308240 0x00000000  //DDRSS_CTL_144_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308244 0x00000000  //DDRSS_CTL_145_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308248 0x00000000  //DDRSS_CTL_146_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30824C 0x00000000  //DDRSS_CTL_147_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308250 0x00000000  //DDRSS_CTL_148_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308254 0x00000000  //DDRSS_CTL_149_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308258 0x00000000  //DDRSS_CTL_150_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30825C 0x00000000  //DDRSS_CTL_151_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308260 0x00000000  //DDRSS_CTL_152_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308264 0x00000000  //DDRSS_CTL_153_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308268 0x00000000  //DDRSS_CTL_154_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30826C 0x00000000  //DDRSS_CTL_155_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308270 0x00000000  //DDRSS_CTL_156_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308274 0x00000000  //DDRSS_CTL_157_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308278 0x03050000  //DDRSS_CTL_158_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30827C 0x03050305  //DDRSS_CTL_159_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308280 0x00000000  //DDRSS_CTL_160_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308284 0x08010000  //DDRSS_CTL_161_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308288 0x000E0808  //DDRSS_CTL_162_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30828C 0x01000000  //DDRSS_CTL_163_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308290 0x0E080808  //DDRSS_CTL_164_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308294 0x00000000  //DDRSS_CTL_165_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308298 0x08080801  //DDRSS_CTL_166_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30829C 0x0000080E  //DDRSS_CTL_167_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082A0 0x00040003  //DDRSS_CTL_168_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082A4 0x00004007  //DDRSS_CTL_169_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082A8 0x00000000  //DDRSS_CTL_170_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082AC 0x00000000  //DDRSS_CTL_171_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082B0 0x00000000  //DDRSS_CTL_172_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082B4 0x00000000  //DDRSS_CTL_173_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082B8 0x00000000  //DDRSS_CTL_174_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082BC 0x00000000  //DDRSS_CTL_175_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082C0 0x01000000  //DDRSS_CTL_176_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082C4 0x00000000  //DDRSS_CTL_177_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082C8 0x00001700  //DDRSS_CTL_178_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082CC 0x0200100E  //DDRSS_CTL_179_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082D0 0x00000002  //DDRSS_CTL_180_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082D4 0x00000000  //DDRSS_CTL_181_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082D8 0x00000001  //DDRSS_CTL_182_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082DC 0x00000002  //DDRSS_CTL_183_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082E0 0x00000C00  //DDRSS_CTL_184_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082E4 0x00008000  //DDRSS_CTL_185_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082E8 0x00000C00  //DDRSS_CTL_186_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082EC 0x00008000  //DDRSS_CTL_187_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082F0 0x00000C00  //DDRSS_CTL_188_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082F4 0x00008000  //DDRSS_CTL_189_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082F8 0x00000000  //DDRSS_CTL_190_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3082FC 0x00000000  //DDRSS_CTL_191_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308300 0x00000000  //DDRSS_CTL_192_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308304 0x00000000  //DDRSS_CTL_193_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308308 0x00000000  //DDRSS_CTL_194_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30830C 0x0005000A  //DDRSS_CTL_195_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308310 0x0404000D  //DDRSS_CTL_196_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308314 0x0000000D  //DDRSS_CTL_197_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308318 0x005000A0  //DDRSS_CTL_198_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30831C 0x060600C8  //DDRSS_CTL_199_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308320 0x000000C8  //DDRSS_CTL_200_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308324 0x005000A0  //DDRSS_CTL_201_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308328 0x060600C8  //DDRSS_CTL_202_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30832C 0x000000C8  //DDRSS_CTL_203_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308330 0x00000000  //DDRSS_CTL_204_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308334 0x00000000  //DDRSS_CTL_205_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308338 0x00000000  //DDRSS_CTL_206_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30833C 0x00000000  //DDRSS_CTL_207_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308340 0x00000004  //DDRSS_CTL_208_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308344 0x00000000  //DDRSS_CTL_209_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308348 0x00000000  //DDRSS_CTL_210_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30834C 0x00000024  //DDRSS_CTL_211_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308350 0x00000012  //DDRSS_CTL_212_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308354 0x00000000  //DDRSS_CTL_213_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308358 0x00000024  //DDRSS_CTL_214_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30835C 0x00000012  //DDRSS_CTL_215_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308360 0x00000000  //DDRSS_CTL_216_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308364 0x00000004  //DDRSS_CTL_217_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308368 0x00000000  //DDRSS_CTL_218_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30836C 0x00000000  //DDRSS_CTL_219_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308370 0x00000024  //DDRSS_CTL_220_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308374 0x00000012  //DDRSS_CTL_221_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308378 0x00000000  //DDRSS_CTL_222_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30837C 0x00000024  //DDRSS_CTL_223_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308380 0x00000012  //DDRSS_CTL_224_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308384 0x00000000  //DDRSS_CTL_225_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308388 0x00000000  //DDRSS_CTL_226_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30838C 0x00000031  //DDRSS_CTL_227_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308390 0x000000B1  //DDRSS_CTL_228_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308394 0x000000B1  //DDRSS_CTL_229_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308398 0x00000031  //DDRSS_CTL_230_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30839C 0x000000B1  //DDRSS_CTL_231_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083A0 0x000000B1  //DDRSS_CTL_232_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083A4 0x00000000  //DDRSS_CTL_233_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083A8 0x00000000  //DDRSS_CTL_234_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083AC 0x00000000  //DDRSS_CTL_235_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083B0 0x00000000  //DDRSS_CTL_236_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083B4 0x00000000  //DDRSS_CTL_237_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083B8 0x00000000  //DDRSS_CTL_238_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083BC 0x00000000  //DDRSS_CTL_239_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083C0 0x00000000  //DDRSS_CTL_240_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083C4 0x00000000  //DDRSS_CTL_241_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083C8 0x00000000  //DDRSS_CTL_242_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083CC 0x00000000  //DDRSS_CTL_243_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083D0 0x00000000  //DDRSS_CTL_244_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083D4 0x00000000  //DDRSS_CTL_245_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083D8 0x00000000  //DDRSS_CTL_246_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083DC 0x00000000  //DDRSS_CTL_247_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083E0 0x00000000  //DDRSS_CTL_248_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083E4 0x00000000  //DDRSS_CTL_249_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083E8 0x00000000  //DDRSS_CTL_250_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083EC 0x00000000  //DDRSS_CTL_251_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083F0 0x00000000  //DDRSS_CTL_252_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083F4 0x00000000  //DDRSS_CTL_253_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083F8 0x00000000  //DDRSS_CTL_254_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3083FC 0x00000000  //DDRSS_CTL_255_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308400 0x00000000  //DDRSS_CTL_256_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308404 0x55005555  //DDRSS_CTL_257_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308408 0x00002755  //DDRSS_CTL_258_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30840C 0x00000027  //DDRSS_CTL_259_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308410 0x00000027  //DDRSS_CTL_260_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308414 0x00000027  //DDRSS_CTL_261_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308418 0x00000027  //DDRSS_CTL_262_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30841C 0x00000027  //DDRSS_CTL_263_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308420 0x00000000  //DDRSS_CTL_264_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308424 0x00000000  //DDRSS_CTL_265_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308428 0x0000002B  //DDRSS_CTL_266_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30842C 0x0000002B  //DDRSS_CTL_267_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308430 0x0000002B  //DDRSS_CTL_268_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308434 0x0000002B  //DDRSS_CTL_269_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308438 0x0000002B  //DDRSS_CTL_270_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30843C 0x0000002B  //DDRSS_CTL_271_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308440 0x00000000  //DDRSS_CTL_272_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308444 0x00000000  //DDRSS_CTL_273_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308448 0x00000016  //DDRSS_CTL_274_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30844C 0x00000016  //DDRSS_CTL_275_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308450 0x00000000  //DDRSS_CTL_276_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308454 0x00000016  //DDRSS_CTL_277_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308458 0x00000016  //DDRSS_CTL_278_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30845C 0x00000020  //DDRSS_CTL_279_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308460 0x00010000  //DDRSS_CTL_280_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308464 0x00000100  //DDRSS_CTL_281_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308468 0x02000100  //DDRSS_CTL_282_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30846C 0x00000000  //DDRSS_CTL_283_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308470 0x00000101  //DDRSS_CTL_284_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308474 0x00000000  //DDRSS_CTL_285_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308478 0x00000000  //DDRSS_CTL_286_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30847C 0x00000000  //DDRSS_CTL_287_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308480 0x00000000  //DDRSS_CTL_288_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308484 0x00000000  //DDRSS_CTL_289_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308488 0x00000000  //DDRSS_CTL_290_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30848C 0x00000000  //DDRSS_CTL_291_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308490 0x00000000  //DDRSS_CTL_292_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308494 0x00000000  //DDRSS_CTL_293_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308498 0x00000000  //DDRSS_CTL_294_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30849C 0x00000000  //DDRSS_CTL_295_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084A0 0x0C181511  //DDRSS_CTL_296_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084A4 0x00000304  //DDRSS_CTL_297_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084A8 0x00000000  //DDRSS_CTL_298_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084AC 0x00000000  //DDRSS_CTL_299_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084B0 0x00000000  //DDRSS_CTL_300_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084B4 0x00000000  //DDRSS_CTL_301_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084B8 0x00000000  //DDRSS_CTL_302_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084BC 0x00000000  //DDRSS_CTL_303_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084C0 0x00000000  //DDRSS_CTL_304_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084C4 0x00000000  //DDRSS_CTL_305_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084C8 0x00000000  //DDRSS_CTL_306_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084CC 0x00000000  //DDRSS_CTL_307_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084D0 0x00000000  //DDRSS_CTL_308_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084D4 0x00000000  //DDRSS_CTL_309_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084D8 0x00000000  //DDRSS_CTL_310_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084DC 0x00020000  //DDRSS_CTL_311_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084E0 0x00400100  //DDRSS_CTL_312_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084E4 0x00080032  //DDRSS_CTL_313_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084E8 0x01000200  //DDRSS_CTL_314_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084EC 0x03200040  //DDRSS_CTL_315_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084F0 0x00020018  //DDRSS_CTL_316_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084F4 0x00400100  //DDRSS_CTL_317_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084F8 0x00180320  //DDRSS_CTL_318_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3084FC 0x00030000  //DDRSS_CTL_319_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308500 0x00280028  //DDRSS_CTL_320_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308504 0x00000100  //DDRSS_CTL_321_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308508 0x01010000  //DDRSS_CTL_322_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30850C 0x00000202  //DDRSS_CTL_323_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308510 0x0FFF0000  //DDRSS_CTL_324_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308514 0x000FFF00  //DDRSS_CTL_325_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308518 0x1FFF1000  //DDRSS_CTL_326_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30851C 0x000FFF00  //DDRSS_CTL_327_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308520 0x0B000001  //DDRSS_CTL_328_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308524 0x0001FFFF  //DDRSS_CTL_329_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308528 0x01010101  //DDRSS_CTL_330_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30852C 0x01010101  //DDRSS_CTL_331_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308530 0x00000118  //DDRSS_CTL_332_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308534 0x00000C03  //DDRSS_CTL_333_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308538 0x00040100  //DDRSS_CTL_334_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30853C 0x00040100  //DDRSS_CTL_335_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308540 0x00000000  //DDRSS_CTL_336_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308544 0x00000000  //DDRSS_CTL_337_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308548 0x01030303  //DDRSS_CTL_338_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30854C 0x00010001  //DDRSS_CTL_339_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308550 0x00000004  //DDRSS_CTL_340_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308554 0x00000000  //DDRSS_CTL_341_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308558 0x80000400  //DDRSS_CTL_342_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30855C 0x00000000  //DDRSS_CTL_343_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308560 0x00000000  //DDRSS_CTL_344_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308564 0x00000000  //DDRSS_CTL_345_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308568 0x00000000  //DDRSS_CTL_346_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30856C 0x00000000  //DDRSS_CTL_347_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308570 0x00000000  //DDRSS_CTL_348_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308574 0x00000000  //DDRSS_CTL_349_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308578 0x00000004  //DDRSS_CTL_350_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30857C 0x00000000  //DDRSS_CTL_351_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308580 0x00000000  //DDRSS_CTL_352_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308584 0x00000000  //DDRSS_CTL_353_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308588 0x00000000  //DDRSS_CTL_354_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30858C 0x00000000  //DDRSS_CTL_355_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308590 0x00000000  //DDRSS_CTL_356_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308594 0x00000000  //DDRSS_CTL_357_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308598 0x00000000  //DDRSS_CTL_358_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30859C 0x00000000  //DDRSS_CTL_359_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085A0 0x00000000  //DDRSS_CTL_360_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085A4 0x00000000  //DDRSS_CTL_361_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085A8 0x00000000  //DDRSS_CTL_362_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085AC 0x00000000  //DDRSS_CTL_363_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085B0 0x00000000  //DDRSS_CTL_364_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085B4 0x00000000  //DDRSS_CTL_365_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085B8 0x00000000  //DDRSS_CTL_366_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085BC 0x00000000  //DDRSS_CTL_367_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085C0 0x00000000  //DDRSS_CTL_368_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085C4 0x00000000  //DDRSS_CTL_369_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085C8 0x00000000  //DDRSS_CTL_370_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085CC 0x00000000  //DDRSS_CTL_371_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085D0 0x00000000  //DDRSS_CTL_372_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085D4 0x00000000  //DDRSS_CTL_373_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085D8 0x00000000  //DDRSS_CTL_374_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085DC 0x00000000  //DDRSS_CTL_375_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085E0 0x00000000  //DDRSS_CTL_376_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085E4 0x00000000  //DDRSS_CTL_377_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085E8 0x00000000  //DDRSS_CTL_378_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085EC 0x00000000  //DDRSS_CTL_379_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085F0 0x00000000  //DDRSS_CTL_380_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085F4 0x00000000  //DDRSS_CTL_381_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085F8 0x00000000  //DDRSS_CTL_382_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3085FC 0x01000101  //DDRSS_CTL_383_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308600 0x01010001  //DDRSS_CTL_384_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308604 0x00010101  //DDRSS_CTL_385_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308608 0x01050503  //DDRSS_CTL_386_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30860C 0x05020201  //DDRSS_CTL_387_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308610 0x08080C0C  //DDRSS_CTL_388_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308614 0x00080408  //DDRSS_CTL_389_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308618 0x000B0406  //DDRSS_CTL_390_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30861C 0x000B0406  //DDRSS_CTL_391_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308620 0x0B0B0806  //DDRSS_CTL_392_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308624 0x01000000  //DDRSS_CTL_393_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308628 0x03020301  //DDRSS_CTL_394_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30862C 0x04000102  //DDRSS_CTL_395_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308630 0x1B000304  //DDRSS_CTL_396_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308634 0x00000176  //DDRSS_CTL_397_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308638 0x00000200  //DDRSS_CTL_398_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30863C 0x00000200  //DDRSS_CTL_399_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308640 0x00000200  //DDRSS_CTL_400_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308644 0x00000200  //DDRSS_CTL_401_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308648 0x00000693  //DDRSS_CTL_402_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30864C 0x00000E9C  //DDRSS_CTL_403_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308650 0x03000202  //DDRSS_CTL_404_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308654 0x25200404  //DDRSS_CTL_405_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308658 0x00001850  //DDRSS_CTL_406_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30865C 0x00000200  //DDRSS_CTL_407_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308660 0x00000200  //DDRSS_CTL_408_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308664 0x00000200  //DDRSS_CTL_409_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308668 0x00000200  //DDRSS_CTL_410_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30866C 0x00006D68  //DDRSS_CTL_411_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308670 0x0000F320  //DDRSS_CTL_412_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308674 0x07080402  //DDRSS_CTL_413_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308678 0x25200401  //DDRSS_CTL_414_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30867C 0x00001850  //DDRSS_CTL_415_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308680 0x00000200  //DDRSS_CTL_416_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308684 0x00000200  //DDRSS_CTL_417_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308688 0x00000200  //DDRSS_CTL_418_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30868C 0x00000200  //DDRSS_CTL_419_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308690 0x00006D68  //DDRSS_CTL_420_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308694 0x0000F320  //DDRSS_CTL_421_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F308698 0x07080402  //DDRSS_CTL_422_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30869C 0x00200401  //DDRSS_CTL_423_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086A0 0x00000000  //DDRSS_CTL_424_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086A4 0x02000A00  //DDRSS_CTL_425_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086A8 0x00050003  //DDRSS_CTL_426_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086AC 0x00010101  //DDRSS_CTL_427_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086B0 0x00010101  //DDRSS_CTL_428_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086B4 0x00010001  //DDRSS_CTL_429_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086B8 0x00000101  //DDRSS_CTL_430_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086BC 0x02000201  //DDRSS_CTL_431_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086C0 0x02010000  //DDRSS_CTL_432_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086C4 0x06000200  //DDRSS_CTL_433_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F3086C8 0x00001010  //DDRSS_CTL_434_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A000 0x00000B01  //DDRSS_PI_0_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A004 0xB0BD08BA  //DDRSS_PI_1_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A008 0x0232C9DD  //DDRSS_PI_2_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A00C 0x01011387  //DDRSS_PI_3_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A010 0x00000001  //DDRSS_PI_4_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A014 0x00010064  //DDRSS_PI_5_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A018 0x00000000  //DDRSS_PI_6_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A01C 0x00000000  //DDRSS_PI_7_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A020 0x00000000  //DDRSS_PI_8_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A024 0x000FFFFF  //DDRSS_PI_9_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A028 0x00000014  //DDRSS_PI_10_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A02C 0x00000002  //DDRSS_PI_11_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A030 0x00000005  //DDRSS_PI_12_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A034 0x000F0001  //DDRSS_PI_13_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A038 0x08000000  //DDRSS_PI_14_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A03C 0x00010300  //DDRSS_PI_15_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A040 0x00000005  //DDRSS_PI_16_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A044 0x00010000  //DDRSS_PI_17_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A048 0x00000000  //DDRSS_PI_18_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A04C 0x00000000  //DDRSS_PI_19_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A050 0x00000000  //DDRSS_PI_20_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A054 0x00000000  //DDRSS_PI_21_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A058 0x00000000  //DDRSS_PI_22_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A05C 0x00000000  //DDRSS_PI_23_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A060 0x00000000  //DDRSS_PI_24_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A064 0x00000000  //DDRSS_PI_25_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A068 0x01010000  //DDRSS_PI_26_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A06C 0x0A000100  //DDRSS_PI_27_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A070 0x00000028  //DDRSS_PI_28_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A074 0x0F000000  //DDRSS_PI_29_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A078 0x00320000  //DDRSS_PI_30_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A07C 0x00000000  //DDRSS_PI_31_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A080 0x00000000  //DDRSS_PI_32_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A084 0x01010102  //DDRSS_PI_33_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A088 0x00000000  //DDRSS_PI_34_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A08C 0x00000000  //DDRSS_PI_35_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A090 0x00000000  //DDRSS_PI_36_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A094 0x00000001  //DDRSS_PI_37_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A098 0x000000AA  //DDRSS_PI_38_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A09C 0x00000055  //DDRSS_PI_39_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0A0 0x000000B5  //DDRSS_PI_40_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0A4 0x0000004A  //DDRSS_PI_41_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0A8 0x00000056  //DDRSS_PI_42_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0AC 0x000000A9  //DDRSS_PI_43_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0B0 0x000000A9  //DDRSS_PI_44_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0B4 0x000000B5  //DDRSS_PI_45_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0B8 0x00000000  //DDRSS_PI_46_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0BC 0x00000000  //DDRSS_PI_47_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0C0 0x000F0F00  //DDRSS_PI_48_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0C4 0x00000015  //DDRSS_PI_49_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0C8 0x000007D0  //DDRSS_PI_50_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0CC 0x00000300  //DDRSS_PI_51_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0D0 0x00000000  //DDRSS_PI_52_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0D4 0x00000000  //DDRSS_PI_53_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0D8 0x01000000  //DDRSS_PI_54_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0DC 0x00010101  //DDRSS_PI_55_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0E0 0x01000407  //DDRSS_PI_56_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0E4 0x03000000  //DDRSS_PI_57_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0E8 0x00000000  //DDRSS_PI_58_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0EC 0x0000170F  //DDRSS_PI_59_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0F0 0x00000000  //DDRSS_PI_60_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0F4 0x00000000  //DDRSS_PI_61_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0F8 0x00000000  //DDRSS_PI_62_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A0FC 0x0A0A140A  //DDRSS_PI_63_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A100 0x10020101  //DDRSS_PI_64_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A104 0x01000210  //DDRSS_PI_65_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A108 0x05000404  //DDRSS_PI_66_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A10C 0x00010001  //DDRSS_PI_67_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A110 0x0001000E  //DDRSS_PI_68_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A114 0x01010F00  //DDRSS_PI_69_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A118 0x00010000  //DDRSS_PI_70_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A11C 0x00000034  //DDRSS_PI_71_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A120 0x00000000  //DDRSS_PI_72_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A124 0x00000000  //DDRSS_PI_73_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A128 0x0000FFFF  //DDRSS_PI_74_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A12C 0x00000000  //DDRSS_PI_75_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A130 0x00000000  //DDRSS_PI_76_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A134 0x00000000  //DDRSS_PI_77_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A138 0x00000000  //DDRSS_PI_78_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A13C 0x01000000  //DDRSS_PI_79_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A140 0x02010001  //DDRSS_PI_80_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A144 0x02000008  //DDRSS_PI_81_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A148 0x01000200  //DDRSS_PI_82_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A14C 0x00000100  //DDRSS_PI_83_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A150 0x02000100  //DDRSS_PI_84_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A154 0x02000200  //DDRSS_PI_85_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A158 0x00000000  //DDRSS_PI_86_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A15C 0x27C02000  //DDRSS_PI_87_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A160 0x00000000  //DDRSS_PI_88_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A164 0x00000000  //DDRSS_PI_89_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A168 0x00000000  //DDRSS_PI_90_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A16C 0x00000000  //DDRSS_PI_91_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A170 0x00000000  //DDRSS_PI_92_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A174 0x00000000  //DDRSS_PI_93_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A178 0x00000000  //DDRSS_PI_94_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A17C 0x00000000  //DDRSS_PI_95_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A180 0x00000000  //DDRSS_PI_96_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A184 0x00000000  //DDRSS_PI_97_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A188 0x00000000  //DDRSS_PI_98_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A18C 0x01000400  //DDRSS_PI_99_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A190 0x0E0D0F10  //DDRSS_PI_100_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A194 0x080A1413  //DDRSS_PI_101_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A198 0x01000009  //DDRSS_PI_102_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A19C 0x00000302  //DDRSS_PI_103_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1A0 0x00000008  //DDRSS_PI_104_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1A4 0x08000000  //DDRSS_PI_105_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1A8 0x00000100  //DDRSS_PI_106_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1AC 0x00000000  //DDRSS_PI_107_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1B0 0x0000AA00  //DDRSS_PI_108_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1B4 0x00000000  //DDRSS_PI_109_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1B8 0x00000000  //DDRSS_PI_110_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1BC 0x00010000  //DDRSS_PI_111_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1C0 0x00000000  //DDRSS_PI_112_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1C4 0x00000000  //DDRSS_PI_113_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1C8 0x00000000  //DDRSS_PI_114_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1CC 0x00000000  //DDRSS_PI_115_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1D0 0x00000000  //DDRSS_PI_116_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1D4 0x00000000  //DDRSS_PI_117_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1D8 0x00000000  //DDRSS_PI_118_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1DC 0x00000000  //DDRSS_PI_119_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1E0 0x00000000  //DDRSS_PI_120_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1E4 0x00000000  //DDRSS_PI_121_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1E8 0x00000000  //DDRSS_PI_122_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1EC 0x00000000  //DDRSS_PI_123_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1F0 0x00000000  //DDRSS_PI_124_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1F4 0x00000000  //DDRSS_PI_125_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1F8 0x00000000  //DDRSS_PI_126_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A1FC 0x00000000  //DDRSS_PI_127_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A200 0x00000000  //DDRSS_PI_128_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A204 0x00000000  //DDRSS_PI_129_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A208 0x00000000  //DDRSS_PI_130_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A20C 0x00000000  //DDRSS_PI_131_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A210 0x00000000  //DDRSS_PI_132_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A214 0x00000000  //DDRSS_PI_133_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A218 0x00000000  //DDRSS_PI_134_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A21C 0x00000000  //DDRSS_PI_135_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A220 0x00000008  //DDRSS_PI_136_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A224 0x00000000  //DDRSS_PI_137_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A228 0x00000000  //DDRSS_PI_138_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A22C 0x00000000  //DDRSS_PI_139_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A230 0x00000000  //DDRSS_PI_140_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A234 0x00000000  //DDRSS_PI_141_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A238 0x00000000  //DDRSS_PI_142_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A23C 0x00000000  //DDRSS_PI_143_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A240 0x00000000  //DDRSS_PI_144_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A244 0x00010000  //DDRSS_PI_145_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A248 0x00000000  //DDRSS_PI_146_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A24C 0x00000000  //DDRSS_PI_147_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A250 0x0000000A  //DDRSS_PI_148_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A254 0x000186A0  //DDRSS_PI_149_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A258 0x00000100  //DDRSS_PI_150_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A25C 0x00000000  //DDRSS_PI_151_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A260 0x00000000  //DDRSS_PI_152_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A264 0x00000000  //DDRSS_PI_153_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A268 0x00000000  //DDRSS_PI_154_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A26C 0x00000000  //DDRSS_PI_155_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A270 0x01000000  //DDRSS_PI_156_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A274 0xC1010003  //DDRSS_PI_157_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A278 0x02000101  //DDRSS_PI_158_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A27C 0x01030101  //DDRSS_PI_159_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A280 0x00010400  //DDRSS_PI_160_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A284 0x06000105  //DDRSS_PI_161_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A288 0x01070001  //DDRSS_PI_162_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A28C 0x00000020  //DDRSS_PI_163_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A290 0x00000000  //DDRSS_PI_164_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A294 0x00020201  //DDRSS_PI_165_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A298 0x00010001  //DDRSS_PI_166_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A29C 0x00000000  //DDRSS_PI_167_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2A0 0x00000000  //DDRSS_PI_168_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2A4 0x00000000  //DDRSS_PI_169_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2A8 0x00000000  //DDRSS_PI_170_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2AC 0x00010000  //DDRSS_PI_171_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2B0 0x00000004  //DDRSS_PI_172_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2B4 0x00000000  //DDRSS_PI_173_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2B8 0x00010000  //DDRSS_PI_174_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2BC 0x00000000  //DDRSS_PI_175_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2C0 0x00080000  //DDRSS_PI_176_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2C4 0x00780078  //DDRSS_PI_177_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2C8 0x00101001  //DDRSS_PI_178_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2CC 0x00000034  //DDRSS_PI_179_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2D0 0x00000042  //DDRSS_PI_180_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2D4 0x00020042  //DDRSS_PI_181_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2D8 0x02000200  //DDRSS_PI_182_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2DC 0x00000004  //DDRSS_PI_183_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2E0 0x0000080C  //DDRSS_PI_184_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2E4 0x00081C00  //DDRSS_PI_185_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2E8 0x001C0000  //DDRSS_PI_186_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2EC 0x0000000E  //DDRSS_PI_187_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2F0 0x000000BB  //DDRSS_PI_188_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2F4 0x000000E0  //DDRSS_PI_189_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2F8 0x00000C28  //DDRSS_PI_190_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A2FC 0x000000E0  //DDRSS_PI_191_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A300 0x04000C28  //DDRSS_PI_192_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A304 0x01010404  //DDRSS_PI_193_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A308 0x00001501  //DDRSS_PI_194_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A30C 0x001D001D  //DDRSS_PI_195_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A310 0x01000100  //DDRSS_PI_196_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A314 0x00000100  //DDRSS_PI_197_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A318 0x00000000  //DDRSS_PI_198_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A31C 0x05050503  //DDRSS_PI_199_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A320 0x01010C0C  //DDRSS_PI_200_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A324 0x01010101  //DDRSS_PI_201_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A328 0x000C0C0A  //DDRSS_PI_202_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A32C 0x00000000  //DDRSS_PI_203_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A330 0x00000000  //DDRSS_PI_204_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A334 0x04000000  //DDRSS_PI_205_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A338 0x04020808  //DDRSS_PI_206_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A33C 0x04040204  //DDRSS_PI_207_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A340 0x00090031  //DDRSS_PI_208_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A344 0x00110039  //DDRSS_PI_209_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A348 0x00110039  //DDRSS_PI_210_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A34C 0x01010101  //DDRSS_PI_211_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A350 0x0002000D  //DDRSS_PI_212_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A354 0x000200C8  //DDRSS_PI_213_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A358 0x010000C8  //DDRSS_PI_214_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A35C 0x000E000E  //DDRSS_PI_215_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A360 0x00C90100  //DDRSS_PI_216_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A364 0x010000C9  //DDRSS_PI_217_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A368 0x00C900C9  //DDRSS_PI_218_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A36C 0x32103200  //DDRSS_PI_219_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A370 0x01013210  //DDRSS_PI_220_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A374 0x0A070601  //DDRSS_PI_221_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A378 0x0D09070D  //DDRSS_PI_222_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A37C 0x0D09070D  //DDRSS_PI_223_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A380 0x000C000D  //DDRSS_PI_224_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A384 0x00001000  //DDRSS_PI_225_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A388 0x00000C00  //DDRSS_PI_226_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A38C 0x00001000  //DDRSS_PI_227_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A390 0x00000C00  //DDRSS_PI_228_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A394 0x02001000  //DDRSS_PI_229_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A398 0x0016000D  //DDRSS_PI_230_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A39C 0x001600C8  //DDRSS_PI_231_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3A0 0x000000C8  //DDRSS_PI_232_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3A4 0x00001900  //DDRSS_PI_233_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3A8 0x32000056  //DDRSS_PI_234_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3AC 0x06000101  //DDRSS_PI_235_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3B0 0x001D0204  //DDRSS_PI_236_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3B4 0x32120058  //DDRSS_PI_237_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3B8 0x05000101  //DDRSS_PI_238_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3BC 0x001D0408  //DDRSS_PI_239_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3C0 0x32120058  //DDRSS_PI_240_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3C4 0x05000101  //DDRSS_PI_241_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3C8 0x00000408  //DDRSS_PI_242_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3CC 0x05030900  //DDRSS_PI_243_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3D0 0x00040900  //DDRSS_PI_244_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3D4 0x0000062B  //DDRSS_PI_245_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3D8 0x20010004  //DDRSS_PI_246_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3DC 0x0A0A0A03  //DDRSS_PI_247_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3E0 0x11090000  //DDRSS_PI_248_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3E4 0x1009000F  //DDRSS_PI_249_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3E8 0x000062B8  //DDRSS_PI_250_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3EC 0x20030023  //DDRSS_PI_251_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3F0 0x0C0A0C0C  //DDRSS_PI_252_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3F4 0x11090000  //DDRSS_PI_253_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3F8 0x1009000F  //DDRSS_PI_254_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A3FC 0x000062B8  //DDRSS_PI_255_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A400 0x20030023  //DDRSS_PI_256_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A404 0x0C0A0C0C  //DDRSS_PI_257_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A408 0x00000000  //DDRSS_PI_258_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A40C 0x00000176  //DDRSS_PI_259_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A410 0x00000E9C  //DDRSS_PI_260_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A414 0x00001850  //DDRSS_PI_261_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A418 0x0000F320  //DDRSS_PI_262_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A41C 0x00001850  //DDRSS_PI_263_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A420 0x0000F320  //DDRSS_PI_264_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A424 0x00E6000F  //DDRSS_PI_265_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A428 0x030300E6  //DDRSS_PI_266_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A42C 0x00000003  //DDRSS_PI_267_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A430 0x00000000  //DDRSS_PI_268_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A434 0x05030503  //DDRSS_PI_269_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A438 0x00000503  //DDRSS_PI_270_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A43C 0x00002710  //DDRSS_PI_271_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A440 0x000186A0  //DDRSS_PI_272_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A444 0x00000005  //DDRSS_PI_273_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A448 0x00000064  //DDRSS_PI_274_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A44C 0x0000000F  //DDRSS_PI_275_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A450 0x00027100  //DDRSS_PI_276_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A454 0x000186A0  //DDRSS_PI_277_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A458 0x00000005  //DDRSS_PI_278_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A45C 0x00000640  //DDRSS_PI_279_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A460 0x000000E6  //DDRSS_PI_280_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A464 0x00027100  //DDRSS_PI_281_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A468 0x000186A0  //DDRSS_PI_282_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A46C 0x00000005  //DDRSS_PI_283_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A470 0x00000640  //DDRSS_PI_284_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A474 0x010000E6  //DDRSS_PI_285_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A478 0x00320040  //DDRSS_PI_286_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A47C 0x00010008  //DDRSS_PI_287_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A480 0x03200040  //DDRSS_PI_288_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A484 0x00010018  //DDRSS_PI_289_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A488 0x03200040  //DDRSS_PI_290_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A48C 0x00000318  //DDRSS_PI_291_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A490 0x00280028  //DDRSS_PI_292_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A494 0x03040404  //DDRSS_PI_293_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A498 0x00000303  //DDRSS_PI_294_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A49C 0x01010000  //DDRSS_PI_295_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4A0 0x04040202  //DDRSS_PI_296_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4A4 0x67670808  //DDRSS_PI_297_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4A8 0x67676767  //DDRSS_PI_298_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4AC 0x67676767  //DDRSS_PI_299_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4B0 0x67676767  //DDRSS_PI_300_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4B4 0x00006767  //DDRSS_PI_301_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4B8 0x00000000  //DDRSS_PI_302_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4BC 0x00000000  //DDRSS_PI_303_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4C0 0x00000000  //DDRSS_PI_304_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4C4 0x00000000  //DDRSS_PI_305_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4C8 0x55C00000  //DDRSS_PI_306_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4CC 0x00000000  //DDRSS_PI_307_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4D0 0x3C00005A  //DDRSS_PI_308_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4D4 0x000055C0  //DDRSS_PI_309_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4D8 0x00005A00  //DDRSS_PI_310_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4DC 0x0055C03C  //DDRSS_PI_311_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4E0 0x00000000  //DDRSS_PI_312_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4E4 0x3C00005A  //DDRSS_PI_313_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4E8 0x000055C0  //DDRSS_PI_314_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4EC 0x00005A00  //DDRSS_PI_315_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4F0 0x1716153C  //DDRSS_PI_316_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4F4 0x13121118  //DDRSS_PI_317_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4F8 0x06050414  //DDRSS_PI_318_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A4FC 0x02010007  //DDRSS_PI_319_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A500 0x00000003  //DDRSS_PI_320_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A504 0x00000000  //DDRSS_PI_321_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A508 0x00000000  //DDRSS_PI_322_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A50C 0x01000000  //DDRSS_PI_323_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A510 0x04020201  //DDRSS_PI_324_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A514 0x00080804  //DDRSS_PI_325_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A518 0x00000000  //DDRSS_PI_326_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A51C 0x00000000  //DDRSS_PI_327_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A520 0x00000000  //DDRSS_PI_328_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A524 0x00000004  //DDRSS_PI_329_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A528 0x00000000  //DDRSS_PI_330_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A52C 0x00000031  //DDRSS_PI_331_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A530 0x00000000  //DDRSS_PI_332_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A534 0x00000000  //DDRSS_PI_333_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A538 0x00000000  //DDRSS_PI_334_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A53C 0x20002B27  //DDRSS_PI_335_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A540 0x00000000  //DDRSS_PI_336_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A544 0x00000024  //DDRSS_PI_337_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A548 0x00000012  //DDRSS_PI_338_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A54C 0x000000B1  //DDRSS_PI_339_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A550 0x00000000  //DDRSS_PI_340_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A554 0x00000000  //DDRSS_PI_341_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A558 0x55000000  //DDRSS_PI_342_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A55C 0x20162B27  //DDRSS_PI_343_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A560 0x00000000  //DDRSS_PI_344_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A564 0x00000024  //DDRSS_PI_345_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A568 0x00000012  //DDRSS_PI_346_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A56C 0x000000B1  //DDRSS_PI_347_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A570 0x00000000  //DDRSS_PI_348_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A574 0x00000000  //DDRSS_PI_349_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A578 0x55000000  //DDRSS_PI_350_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A57C 0x20161210  //DDRSS_PI_351_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A580 0x00000000  //DDRSS_PI_352_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A584 0x00000004  //DDRSS_PI_353_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A588 0x00000000  //DDRSS_PI_354_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A58C 0x00000031  //DDRSS_PI_355_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A590 0x00000000  //DDRSS_PI_356_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A594 0x00000000  //DDRSS_PI_357_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A598 0x00000000  //DDRSS_PI_358_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A59C 0x20002B27  //DDRSS_PI_359_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5A0 0x00000000  //DDRSS_PI_360_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5A4 0x00000024  //DDRSS_PI_361_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5A8 0x00000012  //DDRSS_PI_362_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5AC 0x000000B1  //DDRSS_PI_363_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5B0 0x00000000  //DDRSS_PI_364_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5B4 0x00000000  //DDRSS_PI_365_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5B8 0x55000000  //DDRSS_PI_366_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5BC 0x20162B27  //DDRSS_PI_367_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5C0 0x00000000  //DDRSS_PI_368_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5C4 0x00000024  //DDRSS_PI_369_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5C8 0x00000012  //DDRSS_PI_370_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5CC 0x000000B1  //DDRSS_PI_371_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5D0 0x00000000  //DDRSS_PI_372_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5D4 0x00000000  //DDRSS_PI_373_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5D8 0x55000000  //DDRSS_PI_374_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5DC 0x20161210  //DDRSS_PI_375_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5E0 0x00000000  //DDRSS_PI_376_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5E4 0x00000004  //DDRSS_PI_377_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5E8 0x00000000  //DDRSS_PI_378_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5EC 0x00000031  //DDRSS_PI_379_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5F0 0x00000000  //DDRSS_PI_380_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5F4 0x00000000  //DDRSS_PI_381_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5F8 0x00000000  //DDRSS_PI_382_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A5FC 0x20002B27  //DDRSS_PI_383_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A600 0x00000000  //DDRSS_PI_384_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A604 0x00000024  //DDRSS_PI_385_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A608 0x00000012  //DDRSS_PI_386_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A60C 0x000000B1  //DDRSS_PI_387_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A610 0x00000000  //DDRSS_PI_388_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A614 0x00000000  //DDRSS_PI_389_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A618 0x55000000  //DDRSS_PI_390_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A61C 0x20162B27  //DDRSS_PI_391_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A620 0x00000000  //DDRSS_PI_392_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A624 0x00000024  //DDRSS_PI_393_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A628 0x00000012  //DDRSS_PI_394_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A62C 0x000000B1  //DDRSS_PI_395_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A630 0x00000000  //DDRSS_PI_396_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A634 0x00000000  //DDRSS_PI_397_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A638 0x55000000  //DDRSS_PI_398_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A63C 0x20161210  //DDRSS_PI_399_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A640 0x00000000  //DDRSS_PI_400_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A644 0x00000004  //DDRSS_PI_401_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A648 0x00000000  //DDRSS_PI_402_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A64C 0x00000031  //DDRSS_PI_403_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A650 0x00000000  //DDRSS_PI_404_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A654 0x00000000  //DDRSS_PI_405_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A658 0x00000000  //DDRSS_PI_406_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A65C 0x20002B27  //DDRSS_PI_407_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A660 0x00000000  //DDRSS_PI_408_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A664 0x00000024  //DDRSS_PI_409_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A668 0x00000012  //DDRSS_PI_410_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A66C 0x000000B1  //DDRSS_PI_411_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A670 0x00000000  //DDRSS_PI_412_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A674 0x00000000  //DDRSS_PI_413_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A678 0x55000000  //DDRSS_PI_414_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A67C 0x20162B27  //DDRSS_PI_415_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A680 0x00000000  //DDRSS_PI_416_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A684 0x00000024  //DDRSS_PI_417_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A688 0x00000012  //DDRSS_PI_418_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A68C 0x000000B1  //DDRSS_PI_419_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A690 0x00000000  //DDRSS_PI_420_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A694 0x00000000  //DDRSS_PI_421_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A698 0x55000000  //DDRSS_PI_422_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30A69C 0x20161210  //DDRSS_PI_423_DATA
WKUP_R5FSS0_0: GEL Output: 0x0F30C000 0x04F00000  //DDRSS_PHY_0_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C004 0x00000000  //DDRSS_PHY_1_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C008 0x00030200  //DDRSS_PHY_2_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C00C 0x00000000  //DDRSS_PHY_3_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C010 0x00000000  //DDRSS_PHY_4_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C014 0x01030000  //DDRSS_PHY_5_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C018 0x00010000  //DDRSS_PHY_6_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C01C 0x01030004  //DDRSS_PHY_7_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C020 0x01000000  //DDRSS_PHY_8_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C024 0x00000000  //DDRSS_PHY_9_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C028 0x00000000  //DDRSS_PHY_10_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C02C 0x05000000  //DDRSS_PHY_11_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C030 0x01010000  //DDRSS_PHY_12_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C034 0x00010000  //DDRSS_PHY_13_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C038 0x00C00001  //DDRSS_PHY_14_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C03C 0x00CC0008  //DDRSS_PHY_15_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C040 0x00660601  //DDRSS_PHY_16_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C044 0x00000003  //DDRSS_PHY_17_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C048 0x00000000  //DDRSS_PHY_18_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C04C 0x00000001  //DDRSS_PHY_19_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C050 0x0000AAAA  //DDRSS_PHY_20_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C054 0x00005555  //DDRSS_PHY_21_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C058 0x0000B5B5  //DDRSS_PHY_22_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C05C 0x00004A4A  //DDRSS_PHY_23_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C060 0x00005656  //DDRSS_PHY_24_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C064 0x0000A9A9  //DDRSS_PHY_25_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C068 0x0000B7B7  //DDRSS_PHY_26_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C06C 0x00004848  //DDRSS_PHY_27_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C070 0x00000000  //DDRSS_PHY_28_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C074 0x00000000  //DDRSS_PHY_29_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C078 0x08000000  //DDRSS_PHY_30_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C07C 0x0F000008  //DDRSS_PHY_31_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C080 0x00000F0F  //DDRSS_PHY_32_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C084 0x00E4E400  //DDRSS_PHY_33_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C088 0x00071020  //DDRSS_PHY_34_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C08C 0x000C0020  //DDRSS_PHY_35_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C090 0x00062000  //DDRSS_PHY_36_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C094 0x00000000  //DDRSS_PHY_37_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C098 0x55555555  //DDRSS_PHY_38_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C09C 0xAAAAAAAA  //DDRSS_PHY_39_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0A0 0x55555555  //DDRSS_PHY_40_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0A4 0xAAAAAAAA  //DDRSS_PHY_41_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0A8 0x00005555  //DDRSS_PHY_42_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0AC 0x01000100  //DDRSS_PHY_43_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0B0 0x00800180  //DDRSS_PHY_44_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0B4 0x00000001  //DDRSS_PHY_45_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0B8 0x00100000  //DDRSS_PHY_46_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0BC 0x00000000  //DDRSS_PHY_47_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0C0 0x0008000F  //DDRSS_PHY_48_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0C4 0x00000000  //DDRSS_PHY_49_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0C8 0x00000000  //DDRSS_PHY_50_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0CC 0x0000027C  //DDRSS_PHY_51_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0D0 0x00041DFF  //DDRSS_PHY_52_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0D4 0x00000000  //DDRSS_PHY_53_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0D8 0x00000001  //DDRSS_PHY_54_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0DC 0x00000000  //DDRSS_PHY_55_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0E0 0x000000B0  //DDRSS_PHY_56_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0E4 0x00000000  //DDRSS_PHY_57_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0E8 0x00000000  //DDRSS_PHY_58_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0EC 0x0C000000  //DDRSS_PHY_59_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0F0 0x07FF07FF  //DDRSS_PHY_60_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0F4 0x00000000  //DDRSS_PHY_61_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0F8 0x000007F0  //DDRSS_PHY_62_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C0FC 0x00000000  //DDRSS_PHY_63_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C100 0x00000000  //DDRSS_PHY_64_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C104 0x00000000  //DDRSS_PHY_65_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C108 0x00000000  //DDRSS_PHY_66_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C10C 0x00000004  //DDRSS_PHY_67_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C110 0x00000000  //DDRSS_PHY_68_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C114 0x00000000  //DDRSS_PHY_69_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C118 0x00000000  //DDRSS_PHY_70_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C11C 0x00000000  //DDRSS_PHY_71_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C120 0x00000000  //DDRSS_PHY_72_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C124 0x00000000  //DDRSS_PHY_73_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C128 0x081F07FF  //DDRSS_PHY_74_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C12C 0x10200080  //DDRSS_PHY_75_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C130 0x00000008  //DDRSS_PHY_76_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C134 0x00000401  //DDRSS_PHY_77_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C138 0x00000000  //DDRSS_PHY_78_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C13C 0x01CC0C01  //DDRSS_PHY_79_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C140 0x1003CC0C  //DDRSS_PHY_80_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C144 0x20000140  //DDRSS_PHY_81_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C148 0x07FF0200  //DDRSS_PHY_82_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C14C 0x0000DD01  //DDRSS_PHY_83_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C150 0x00100303  //DDRSS_PHY_84_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C154 0x00000000  //DDRSS_PHY_85_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C158 0x00000000  //DDRSS_PHY_86_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C15C 0x00021000  //DDRSS_PHY_87_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C160 0x00100010  //DDRSS_PHY_88_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C164 0x00100010  //DDRSS_PHY_89_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C168 0x00100010  //DDRSS_PHY_90_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C16C 0x00100010  //DDRSS_PHY_91_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C170 0x02000010  //DDRSS_PHY_92_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C174 0x00000003  //DDRSS_PHY_93_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C178 0x51516042  //DDRSS_PHY_94_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C17C 0x31C06000  //DDRSS_PHY_95_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C180 0x07800340  //DDRSS_PHY_96_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C184 0x00C0C000  //DDRSS_PHY_97_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C188 0x05000000  //DDRSS_PHY_98_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C18C 0x00050404  //DDRSS_PHY_99_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C190 0x42100010  //DDRSS_PHY_100_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C194 0x010C053E  //DDRSS_PHY_101_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C198 0x000F0C1D  //DDRSS_PHY_102_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C19C 0x01000140  //DDRSS_PHY_103_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1A0 0x007A0120  //DDRSS_PHY_104_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1A4 0x00000C00  //DDRSS_PHY_105_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1A8 0x000001CC  //DDRSS_PHY_106_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1AC 0x00030200  //DDRSS_PHY_107_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1B0 0x02800000  //DDRSS_PHY_108_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1B4 0x80800000  //DDRSS_PHY_109_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1B8 0x00052010  //DDRSS_PHY_110_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1BC 0x76543210  //DDRSS_PHY_111_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1C0 0x00000008  //DDRSS_PHY_112_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1C4 0x07FF07FF  //DDRSS_PHY_113_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1C8 0x07FF07FF  //DDRSS_PHY_114_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1CC 0x07FF07FF  //DDRSS_PHY_115_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1D0 0x07FF07FF  //DDRSS_PHY_116_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1D4 0x008807FF  //DDRSS_PHY_117_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1D8 0x00000000  //DDRSS_PHY_118_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1DC 0x00000000  //DDRSS_PHY_119_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1E0 0x00000000  //DDRSS_PHY_120_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1E4 0x00000000  //DDRSS_PHY_121_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1E8 0x00000000  //DDRSS_PHY_122_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1EC 0x00000000  //DDRSS_PHY_123_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1F0 0x00000000  //DDRSS_PHY_124_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1F4 0x00000000  //DDRSS_PHY_125_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1F8 0x00000000  //DDRSS_PHY_126_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C1FC 0x00540000  //DDRSS_PHY_127_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C200 0x0100000F  //DDRSS_PHY_128_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C204 0x00000000  //DDRSS_PHY_129_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C208 0x00000000  //DDRSS_PHY_130_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C20C 0x00080200  //DDRSS_PHY_131_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C210 0x00000000  //DDRSS_PHY_132_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C214 0x20202020  //DDRSS_PHY_133_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C218 0x20202020  //DDRSS_PHY_134_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C21C 0xF0F02020  //DDRSS_PHY_135_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C220 0x00000000  //DDRSS_PHY_136_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C400 0x04F00000  //DDRSS_PHY_256_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C404 0x00000000  //DDRSS_PHY_257_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C408 0x00030200  //DDRSS_PHY_258_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C40C 0x00000000  //DDRSS_PHY_259_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C410 0x00000000  //DDRSS_PHY_260_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C414 0x01030000  //DDRSS_PHY_261_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C418 0x00010000  //DDRSS_PHY_262_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C41C 0x01030004  //DDRSS_PHY_263_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C420 0x01000000  //DDRSS_PHY_264_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C424 0x00000000  //DDRSS_PHY_265_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C428 0x00000000  //DDRSS_PHY_266_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C42C 0x02000000  //DDRSS_PHY_267_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C430 0x01010000  //DDRSS_PHY_268_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C434 0x00010000  //DDRSS_PHY_269_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C438 0x00C00001  //DDRSS_PHY_270_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C43C 0x00CC0008  //DDRSS_PHY_271_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C440 0x00660601  //DDRSS_PHY_272_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C444 0x00000003  //DDRSS_PHY_273_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C448 0x00000000  //DDRSS_PHY_274_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C44C 0x00000001  //DDRSS_PHY_275_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C450 0x0000AAAA  //DDRSS_PHY_276_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C454 0x00005555  //DDRSS_PHY_277_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C458 0x0000B5B5  //DDRSS_PHY_278_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C45C 0x00004A4A  //DDRSS_PHY_279_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C460 0x00005656  //DDRSS_PHY_280_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C464 0x0000A9A9  //DDRSS_PHY_281_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C468 0x0000B7B7  //DDRSS_PHY_282_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C46C 0x00004848  //DDRSS_PHY_283_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C470 0x00000000  //DDRSS_PHY_284_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C474 0x00000000  //DDRSS_PHY_285_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C478 0x08000000  //DDRSS_PHY_286_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C47C 0x0F000008  //DDRSS_PHY_287_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C480 0x00000F0F  //DDRSS_PHY_288_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C484 0x00E4E400  //DDRSS_PHY_289_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C488 0x00071020  //DDRSS_PHY_290_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C48C 0x000C0020  //DDRSS_PHY_291_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C490 0x00062000  //DDRSS_PHY_292_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C494 0x00000000  //DDRSS_PHY_293_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C498 0x55555555  //DDRSS_PHY_294_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C49C 0xAAAAAAAA  //DDRSS_PHY_295_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4A0 0x55555555  //DDRSS_PHY_296_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4A4 0xAAAAAAAA  //DDRSS_PHY_297_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4A8 0x00005555  //DDRSS_PHY_298_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4AC 0x01000100  //DDRSS_PHY_299_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4B0 0x00800180  //DDRSS_PHY_300_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4B4 0x00000000  //DDRSS_PHY_301_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4B8 0x00100000  //DDRSS_PHY_302_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4BC 0x00000000  //DDRSS_PHY_303_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4C0 0x0008000F  //DDRSS_PHY_304_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4C4 0x00000000  //DDRSS_PHY_305_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4C8 0x00000000  //DDRSS_PHY_306_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4CC 0x0000027C  //DDRSS_PHY_307_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4D0 0x00041DFF  //DDRSS_PHY_308_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4D4 0x00000000  //DDRSS_PHY_309_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4D8 0x00000001  //DDRSS_PHY_310_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4DC 0x00000000  //DDRSS_PHY_311_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4E0 0x000000B0  //DDRSS_PHY_312_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4E4 0x00000000  //DDRSS_PHY_313_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4E8 0x00000000  //DDRSS_PHY_314_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4EC 0x0C000000  //DDRSS_PHY_315_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4F0 0x07FF07FF  //DDRSS_PHY_316_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4F4 0x00000000  //DDRSS_PHY_317_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4F8 0x000007F0  //DDRSS_PHY_318_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C4FC 0x00000000  //DDRSS_PHY_319_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C500 0x00000000  //DDRSS_PHY_320_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C504 0x00000000  //DDRSS_PHY_321_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C508 0x00000000  //DDRSS_PHY_322_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C50C 0x00000004  //DDRSS_PHY_323_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C510 0x00000000  //DDRSS_PHY_324_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C514 0x00000000  //DDRSS_PHY_325_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C518 0x00000000  //DDRSS_PHY_326_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C51C 0x00000000  //DDRSS_PHY_327_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C520 0x00000000  //DDRSS_PHY_328_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C524 0x00000000  //DDRSS_PHY_329_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C528 0x081F07FF  //DDRSS_PHY_330_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C52C 0x10200080  //DDRSS_PHY_331_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C530 0x00000008  //DDRSS_PHY_332_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C534 0x00000401  //DDRSS_PHY_333_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C538 0x00000000  //DDRSS_PHY_334_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C53C 0x01CC0C01  //DDRSS_PHY_335_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C540 0x1003CC0C  //DDRSS_PHY_336_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C544 0x20000140  //DDRSS_PHY_337_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C548 0x07FF0200  //DDRSS_PHY_338_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C54C 0x0000DD01  //DDRSS_PHY_339_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C550 0x00100303  //DDRSS_PHY_340_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C554 0x00000000  //DDRSS_PHY_341_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C558 0x00000000  //DDRSS_PHY_342_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C55C 0x00021000  //DDRSS_PHY_343_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C560 0x00100010  //DDRSS_PHY_344_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C564 0x00100010  //DDRSS_PHY_345_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C568 0x00100010  //DDRSS_PHY_346_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C56C 0x00100010  //DDRSS_PHY_347_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C570 0x02000010  //DDRSS_PHY_348_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C574 0x00000003  //DDRSS_PHY_349_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C578 0x51516042  //DDRSS_PHY_350_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C57C 0x31C06000  //DDRSS_PHY_351_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C580 0x07800340  //DDRSS_PHY_352_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C584 0x00C0C000  //DDRSS_PHY_353_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C588 0x05000000  //DDRSS_PHY_354_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C58C 0x00050404  //DDRSS_PHY_355_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C590 0x42100010  //DDRSS_PHY_356_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C594 0x010C053E  //DDRSS_PHY_357_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C598 0x000F0C1D  //DDRSS_PHY_358_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C59C 0x01000140  //DDRSS_PHY_359_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5A0 0x007A0120  //DDRSS_PHY_360_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5A4 0x00000C00  //DDRSS_PHY_361_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5A8 0x000001CC  //DDRSS_PHY_362_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5AC 0x00030200  //DDRSS_PHY_363_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5B0 0x02800000  //DDRSS_PHY_364_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5B4 0x80800000  //DDRSS_PHY_365_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5B8 0x00052010  //DDRSS_PHY_366_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5BC 0x76543210  //DDRSS_PHY_367_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5C0 0x00000008  //DDRSS_PHY_368_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5C4 0x07FF07FF  //DDRSS_PHY_369_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5C8 0x07FF07FF  //DDRSS_PHY_370_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5CC 0x07FF07FF  //DDRSS_PHY_371_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5D0 0x07FF07FF  //DDRSS_PHY_372_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5D4 0x008807FF  //DDRSS_PHY_373_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5D8 0x00000000  //DDRSS_PHY_374_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5DC 0x00000000  //DDRSS_PHY_375_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5E0 0x00000000  //DDRSS_PHY_376_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5E4 0x00000000  //DDRSS_PHY_377_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5E8 0x00000000  //DDRSS_PHY_378_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5EC 0x00000000  //DDRSS_PHY_379_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5F0 0x00000000  //DDRSS_PHY_380_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5F4 0x00000000  //DDRSS_PHY_381_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5F8 0x00000000  //DDRSS_PHY_382_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C5FC 0x01B20000  //DDRSS_PHY_383_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C600 0x0100000F  //DDRSS_PHY_384_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C604 0x00000000  //DDRSS_PHY_385_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C608 0x00000000  //DDRSS_PHY_386_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C60C 0x00080200  //DDRSS_PHY_387_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C610 0x00000000  //DDRSS_PHY_388_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C614 0x20202020  //DDRSS_PHY_389_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C618 0x20202020  //DDRSS_PHY_390_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C61C 0xF0F02020  //DDRSS_PHY_391_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C620 0x00000000  //DDRSS_PHY_392_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C800 0x04F00000  //DDRSS_PHY_512_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C804 0x00000000  //DDRSS_PHY_513_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C808 0x00030200  //DDRSS_PHY_514_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C80C 0x00000000  //DDRSS_PHY_515_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C810 0x00000000  //DDRSS_PHY_516_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C814 0x01030000  //DDRSS_PHY_517_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C818 0x00010000  //DDRSS_PHY_518_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C81C 0x01030004  //DDRSS_PHY_519_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C820 0x01000000  //DDRSS_PHY_520_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C824 0x00000000  //DDRSS_PHY_521_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C828 0x00000000  //DDRSS_PHY_522_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C82C 0x03200000  //DDRSS_PHY_523_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C830 0x01010000  //DDRSS_PHY_524_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C834 0x00010000  //DDRSS_PHY_525_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C838 0x00C00001  //DDRSS_PHY_526_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C83C 0x00CC0008  //DDRSS_PHY_527_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C840 0x00660601  //DDRSS_PHY_528_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C844 0x00000003  //DDRSS_PHY_529_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C848 0x00000000  //DDRSS_PHY_530_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C84C 0x00000001  //DDRSS_PHY_531_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C850 0x0000AAAA  //DDRSS_PHY_532_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C854 0x00005555  //DDRSS_PHY_533_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C858 0x0000B5B5  //DDRSS_PHY_534_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C85C 0x00004A4A  //DDRSS_PHY_535_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C860 0x00005656  //DDRSS_PHY_536_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C864 0x0000A9A9  //DDRSS_PHY_537_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C868 0x0000B7B7  //DDRSS_PHY_538_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C86C 0x00004848  //DDRSS_PHY_539_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C870 0x00000000  //DDRSS_PHY_540_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C874 0x00000000  //DDRSS_PHY_541_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C878 0x08000000  //DDRSS_PHY_542_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C87C 0x0F000008  //DDRSS_PHY_543_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C880 0x00000F0F  //DDRSS_PHY_544_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C884 0x00E4E400  //DDRSS_PHY_545_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C888 0x00071020  //DDRSS_PHY_546_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C88C 0x000C0020  //DDRSS_PHY_547_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C890 0x00062000  //DDRSS_PHY_548_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C894 0x00000000  //DDRSS_PHY_549_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C898 0x55555555  //DDRSS_PHY_550_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C89C 0xAAAAAAAA  //DDRSS_PHY_551_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8A0 0x55555555  //DDRSS_PHY_552_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8A4 0xAAAAAAAA  //DDRSS_PHY_553_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8A8 0x00005555  //DDRSS_PHY_554_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8AC 0x01000100  //DDRSS_PHY_555_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8B0 0x00800180  //DDRSS_PHY_556_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8B4 0x00000001  //DDRSS_PHY_557_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8B8 0x00100000  //DDRSS_PHY_558_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8BC 0x00000000  //DDRSS_PHY_559_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8C0 0x0008000F  //DDRSS_PHY_560_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8C4 0x00000000  //DDRSS_PHY_561_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8C8 0x00000000  //DDRSS_PHY_562_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8CC 0x0000027C  //DDRSS_PHY_563_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8D0 0x00041DFF  //DDRSS_PHY_564_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8D4 0x00000000  //DDRSS_PHY_565_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8D8 0x00000001  //DDRSS_PHY_566_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8DC 0x00000000  //DDRSS_PHY_567_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8E0 0x000000B0  //DDRSS_PHY_568_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8E4 0x00000000  //DDRSS_PHY_569_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8E8 0x00000000  //DDRSS_PHY_570_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8EC 0x0C000000  //DDRSS_PHY_571_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8F0 0x07FF07FF  //DDRSS_PHY_572_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8F4 0x00000000  //DDRSS_PHY_573_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8F8 0x000007F0  //DDRSS_PHY_574_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C8FC 0x00000000  //DDRSS_PHY_575_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C900 0x00000000  //DDRSS_PHY_576_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C904 0x00000000  //DDRSS_PHY_577_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C908 0x00000000  //DDRSS_PHY_578_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C90C 0x00000004  //DDRSS_PHY_579_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C910 0x00000000  //DDRSS_PHY_580_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C914 0x00000000  //DDRSS_PHY_581_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C918 0x00000000  //DDRSS_PHY_582_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C91C 0x00000000  //DDRSS_PHY_583_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C920 0x00000000  //DDRSS_PHY_584_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C924 0x00000000  //DDRSS_PHY_585_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C928 0x081F07FF  //DDRSS_PHY_586_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C92C 0x10200080  //DDRSS_PHY_587_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C930 0x00000008  //DDRSS_PHY_588_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C934 0x00000401  //DDRSS_PHY_589_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C938 0x00000000  //DDRSS_PHY_590_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C93C 0x01CC0C01  //DDRSS_PHY_591_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C940 0x1003CC0C  //DDRSS_PHY_592_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C944 0x20000140  //DDRSS_PHY_593_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C948 0x07FF0200  //DDRSS_PHY_594_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C94C 0x0000DD01  //DDRSS_PHY_595_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C950 0x00100303  //DDRSS_PHY_596_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C954 0x00000000  //DDRSS_PHY_597_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C958 0x00000000  //DDRSS_PHY_598_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C95C 0x00021000  //DDRSS_PHY_599_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C960 0x00100010  //DDRSS_PHY_600_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C964 0x00100010  //DDRSS_PHY_601_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C968 0x00100010  //DDRSS_PHY_602_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C96C 0x00100010  //DDRSS_PHY_603_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C970 0x02000010  //DDRSS_PHY_604_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C974 0x00000003  //DDRSS_PHY_605_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C978 0x51516042  //DDRSS_PHY_606_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C97C 0x31C06000  //DDRSS_PHY_607_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C980 0x07800340  //DDRSS_PHY_608_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C984 0x00C0C000  //DDRSS_PHY_609_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C988 0x05000000  //DDRSS_PHY_610_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C98C 0x00050404  //DDRSS_PHY_611_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C990 0x42100010  //DDRSS_PHY_612_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C994 0x010C053E  //DDRSS_PHY_613_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C998 0x000F0C1D  //DDRSS_PHY_614_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C99C 0x01000140  //DDRSS_PHY_615_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9A0 0x007A0120  //DDRSS_PHY_616_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9A4 0x00000C00  //DDRSS_PHY_617_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9A8 0x000001CC  //DDRSS_PHY_618_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9AC 0x00030200  //DDRSS_PHY_619_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9B0 0x02800000  //DDRSS_PHY_620_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9B4 0x80800000  //DDRSS_PHY_621_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9B8 0x00052010  //DDRSS_PHY_622_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9BC 0x76543210  //DDRSS_PHY_623_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9C0 0x00000008  //DDRSS_PHY_624_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9C4 0x07FF07FF  //DDRSS_PHY_625_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9C8 0x07FF07FF  //DDRSS_PHY_626_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9CC 0x07FF07FF  //DDRSS_PHY_627_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9D0 0x07FF07FF  //DDRSS_PHY_628_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9D4 0x008807FF  //DDRSS_PHY_629_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9D8 0x00000000  //DDRSS_PHY_630_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9DC 0x00000000  //DDRSS_PHY_631_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9E0 0x00000000  //DDRSS_PHY_632_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9E4 0x00000000  //DDRSS_PHY_633_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9E8 0x00000000  //DDRSS_PHY_634_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9EC 0x00000000  //DDRSS_PHY_635_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9F0 0x00000000  //DDRSS_PHY_636_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9F4 0x00000000  //DDRSS_PHY_637_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9F8 0x00000000  //DDRSS_PHY_638_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C9FC 0x003A0000  //DDRSS_PHY_639_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA00 0x0100000F  //DDRSS_PHY_640_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA04 0x00000000  //DDRSS_PHY_641_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA08 0x00000000  //DDRSS_PHY_642_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA0C 0x00080200  //DDRSS_PHY_643_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA10 0x00000000  //DDRSS_PHY_644_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA14 0x20202020  //DDRSS_PHY_645_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA18 0x20202020  //DDRSS_PHY_646_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA1C 0xF0F02020  //DDRSS_PHY_647_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CA20 0x00000000  //DDRSS_PHY_648_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC00 0x04F00000  //DDRSS_PHY_768_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC04 0x00000000  //DDRSS_PHY_769_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC08 0x00030200  //DDRSS_PHY_770_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC0C 0x00000000  //DDRSS_PHY_771_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC10 0x00000000  //DDRSS_PHY_772_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC14 0x01030000  //DDRSS_PHY_773_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC18 0x00010000  //DDRSS_PHY_774_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC1C 0x01030004  //DDRSS_PHY_775_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC20 0x01000000  //DDRSS_PHY_776_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC24 0x00000000  //DDRSS_PHY_777_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC28 0x00000000  //DDRSS_PHY_778_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC2C 0x06800000  //DDRSS_PHY_779_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC30 0x01010000  //DDRSS_PHY_780_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC34 0x00010000  //DDRSS_PHY_781_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC38 0x00C00001  //DDRSS_PHY_782_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC3C 0x00CC0008  //DDRSS_PHY_783_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC40 0x00660601  //DDRSS_PHY_784_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC44 0x00000003  //DDRSS_PHY_785_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC48 0x00000000  //DDRSS_PHY_786_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC4C 0x00000001  //DDRSS_PHY_787_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC50 0x0000AAAA  //DDRSS_PHY_788_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC54 0x00005555  //DDRSS_PHY_789_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC58 0x0000B5B5  //DDRSS_PHY_790_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC5C 0x00004A4A  //DDRSS_PHY_791_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC60 0x00005656  //DDRSS_PHY_792_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC64 0x0000A9A9  //DDRSS_PHY_793_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC68 0x0000B7B7  //DDRSS_PHY_794_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC6C 0x00004848  //DDRSS_PHY_795_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC70 0x00000000  //DDRSS_PHY_796_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC74 0x00000000  //DDRSS_PHY_797_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC78 0x08000000  //DDRSS_PHY_798_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC7C 0x0F000008  //DDRSS_PHY_799_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC80 0x00000F0F  //DDRSS_PHY_800_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC84 0x00E4E400  //DDRSS_PHY_801_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC88 0x00071020  //DDRSS_PHY_802_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC8C 0x000C0020  //DDRSS_PHY_803_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC90 0x00062000  //DDRSS_PHY_804_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC94 0x00000000  //DDRSS_PHY_805_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC98 0x55555555  //DDRSS_PHY_806_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CC9C 0xAAAAAAAA  //DDRSS_PHY_807_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCA0 0x55555555  //DDRSS_PHY_808_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCA4 0xAAAAAAAA  //DDRSS_PHY_809_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCA8 0x00005555  //DDRSS_PHY_810_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCAC 0x01000100  //DDRSS_PHY_811_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCB0 0x00800180  //DDRSS_PHY_812_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCB4 0x00000000  //DDRSS_PHY_813_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCB8 0x00100000  //DDRSS_PHY_814_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCBC 0x00000000  //DDRSS_PHY_815_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCC0 0x0008000F  //DDRSS_PHY_816_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCC4 0x00000000  //DDRSS_PHY_817_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCC8 0x00000000  //DDRSS_PHY_818_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCCC 0x0000027C  //DDRSS_PHY_819_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCD0 0x00041DFF  //DDRSS_PHY_820_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCD4 0x00000000  //DDRSS_PHY_821_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCD8 0x00000001  //DDRSS_PHY_822_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCDC 0x00000000  //DDRSS_PHY_823_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCE0 0x000000B0  //DDRSS_PHY_824_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCE4 0x00000000  //DDRSS_PHY_825_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCE8 0x00000000  //DDRSS_PHY_826_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCEC 0x0C000000  //DDRSS_PHY_827_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCF0 0x07FF07FF  //DDRSS_PHY_828_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCF4 0x00000000  //DDRSS_PHY_829_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCF8 0x000007F0  //DDRSS_PHY_830_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CCFC 0x00000000  //DDRSS_PHY_831_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD00 0x00000000  //DDRSS_PHY_832_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD04 0x00000000  //DDRSS_PHY_833_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD08 0x00000000  //DDRSS_PHY_834_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD0C 0x00000004  //DDRSS_PHY_835_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD10 0x00000000  //DDRSS_PHY_836_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD14 0x00000000  //DDRSS_PHY_837_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD18 0x00000000  //DDRSS_PHY_838_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD1C 0x00000000  //DDRSS_PHY_839_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD20 0x00000000  //DDRSS_PHY_840_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD24 0x00000000  //DDRSS_PHY_841_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD28 0x081F07FF  //DDRSS_PHY_842_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD2C 0x10200080  //DDRSS_PHY_843_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD30 0x00000008  //DDRSS_PHY_844_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD34 0x00000401  //DDRSS_PHY_845_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD38 0x00000000  //DDRSS_PHY_846_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD3C 0x01CC0C01  //DDRSS_PHY_847_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD40 0x1003CC0C  //DDRSS_PHY_848_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD44 0x20000140  //DDRSS_PHY_849_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD48 0x07FF0200  //DDRSS_PHY_850_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD4C 0x0000DD01  //DDRSS_PHY_851_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD50 0x00100303  //DDRSS_PHY_852_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD54 0x00000000  //DDRSS_PHY_853_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD58 0x00000000  //DDRSS_PHY_854_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD5C 0x00021000  //DDRSS_PHY_855_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD60 0x00100010  //DDRSS_PHY_856_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD64 0x00100010  //DDRSS_PHY_857_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD68 0x00100010  //DDRSS_PHY_858_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD6C 0x00100010  //DDRSS_PHY_859_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD70 0x02000010  //DDRSS_PHY_860_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD74 0x00000003  //DDRSS_PHY_861_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD78 0x51516042  //DDRSS_PHY_862_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD7C 0x31C06000  //DDRSS_PHY_863_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD80 0x07800340  //DDRSS_PHY_864_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD84 0x00C0C000  //DDRSS_PHY_865_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD88 0x05000000  //DDRSS_PHY_866_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD8C 0x00050404  //DDRSS_PHY_867_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD90 0x42100010  //DDRSS_PHY_868_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD94 0x010C053E  //DDRSS_PHY_869_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD98 0x000F0C1D  //DDRSS_PHY_870_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CD9C 0x01000140  //DDRSS_PHY_871_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDA0 0x007A0120  //DDRSS_PHY_872_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDA4 0x00000C00  //DDRSS_PHY_873_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDA8 0x000001CC  //DDRSS_PHY_874_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDAC 0x00030200  //DDRSS_PHY_875_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDB0 0x02800000  //DDRSS_PHY_876_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDB4 0x80800000  //DDRSS_PHY_877_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDB8 0x00052010  //DDRSS_PHY_878_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDBC 0x76543210  //DDRSS_PHY_879_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDC0 0x00000008  //DDRSS_PHY_880_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDC4 0x07FF07FF  //DDRSS_PHY_881_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDC8 0x07FF07FF  //DDRSS_PHY_882_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDCC 0x07FF07FF  //DDRSS_PHY_883_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDD0 0x07FF07FF  //DDRSS_PHY_884_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDD4 0x008807FF  //DDRSS_PHY_885_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDD8 0x00000000  //DDRSS_PHY_886_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDDC 0x00000000  //DDRSS_PHY_887_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDE0 0x00000000  //DDRSS_PHY_888_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDE4 0x00000000  //DDRSS_PHY_889_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDE8 0x00000000  //DDRSS_PHY_890_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDEC 0x00000000  //DDRSS_PHY_891_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDF0 0x00000000  //DDRSS_PHY_892_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDF4 0x00000000  //DDRSS_PHY_893_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDF8 0x00000000  //DDRSS_PHY_894_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CDFC 0x01D40000  //DDRSS_PHY_895_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE00 0x0100000E  //DDRSS_PHY_896_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE04 0x00000000  //DDRSS_PHY_897_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE08 0x00000000  //DDRSS_PHY_898_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE0C 0x00080200  //DDRSS_PHY_899_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE10 0x00000000  //DDRSS_PHY_900_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE14 0x20202020  //DDRSS_PHY_901_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE18 0x20202020  //DDRSS_PHY_902_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE1C 0xF0F02020  //DDRSS_PHY_903_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30CE20 0x00000000  //DDRSS_PHY_904_DATA_F2_R0
WKUP_R5FSS0_0: GEL Output: 0x0F30C000 0x04F00000  //DDRSS_PHY_0_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C004 0x00000000  //DDRSS_PHY_1_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C008 0x00030200  //DDRSS_PHY_2_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C00C 0x00000000  //DDRSS_PHY_3_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C010 0x00000000  //DDRSS_PHY_4_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C014 0x01030000  //DDRSS_PHY_5_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C018 0x00010001  //DDRSS_PHY_6_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C01C 0x01030004  //DDRSS_PHY_7_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C020 0x01000000  //DDRSS_PHY_8_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C024 0x00000000  //DDRSS_PHY_9_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C028 0x00000000  //DDRSS_PHY_10_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C02C 0x05000000  //DDRSS_PHY_11_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C030 0x01010000  //DDRSS_PHY_12_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C034 0x00010000  //DDRSS_PHY_13_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C038 0x00C00001  //DDRSS_PHY_14_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C03C 0x00CC0008  //DDRSS_PHY_15_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C040 0x00660601  //DDRSS_PHY_16_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C044 0x00000003  //DDRSS_PHY_17_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C048 0x00000000  //DDRSS_PHY_18_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C04C 0x00000001  //DDRSS_PHY_19_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C050 0x0000AAAA  //DDRSS_PHY_20_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C054 0x00005555  //DDRSS_PHY_21_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C058 0x0000B5B5  //DDRSS_PHY_22_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C05C 0x00004A4A  //DDRSS_PHY_23_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C060 0x00005656  //DDRSS_PHY_24_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C064 0x0000A9A9  //DDRSS_PHY_25_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C068 0x0000B7B7  //DDRSS_PHY_26_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C06C 0x00004848  //DDRSS_PHY_27_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C070 0x00000000  //DDRSS_PHY_28_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C074 0x00000000  //DDRSS_PHY_29_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C078 0x08000000  //DDRSS_PHY_30_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C07C 0x0F000008  //DDRSS_PHY_31_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C080 0x00000F0F  //DDRSS_PHY_32_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C084 0x00E4E400  //DDRSS_PHY_33_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C088 0x00071020  //DDRSS_PHY_34_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C08C 0x000C0020  //DDRSS_PHY_35_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C090 0x00062000  //DDRSS_PHY_36_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C094 0x00000000  //DDRSS_PHY_37_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C098 0x55555555  //DDRSS_PHY_38_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C09C 0xAAAAAAAA  //DDRSS_PHY_39_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0A0 0x55555555  //DDRSS_PHY_40_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0A4 0xAAAAAAAA  //DDRSS_PHY_41_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0A8 0x00005555  //DDRSS_PHY_42_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0AC 0x01000100  //DDRSS_PHY_43_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0B0 0x00800180  //DDRSS_PHY_44_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0B4 0x00000001  //DDRSS_PHY_45_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0B8 0x00100000  //DDRSS_PHY_46_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0BC 0x00000000  //DDRSS_PHY_47_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0C0 0x0008000F  //DDRSS_PHY_48_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0C4 0x00000000  //DDRSS_PHY_49_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0C8 0x00000000  //DDRSS_PHY_50_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0CC 0x0000027C  //DDRSS_PHY_51_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0D0 0x00041DFF  //DDRSS_PHY_52_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0D4 0x00000000  //DDRSS_PHY_53_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0D8 0x00000001  //DDRSS_PHY_54_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0DC 0x00000000  //DDRSS_PHY_55_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0E0 0x000000B0  //DDRSS_PHY_56_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0E4 0x00000000  //DDRSS_PHY_57_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0E8 0x00000000  //DDRSS_PHY_58_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0EC 0x0C000000  //DDRSS_PHY_59_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0F0 0x07FF07FF  //DDRSS_PHY_60_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0F4 0x00000000  //DDRSS_PHY_61_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0F8 0x000007F0  //DDRSS_PHY_62_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C0FC 0x00000000  //DDRSS_PHY_63_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C100 0x00000000  //DDRSS_PHY_64_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C104 0x00000000  //DDRSS_PHY_65_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C108 0x00000000  //DDRSS_PHY_66_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C10C 0x00000004  //DDRSS_PHY_67_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C110 0x00000000  //DDRSS_PHY_68_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C114 0x00000000  //DDRSS_PHY_69_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C118 0x00000000  //DDRSS_PHY_70_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C11C 0x00000000  //DDRSS_PHY_71_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C120 0x00000000  //DDRSS_PHY_72_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C124 0x00000000  //DDRSS_PHY_73_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C128 0x081F07FF  //DDRSS_PHY_74_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C12C 0x10200080  //DDRSS_PHY_75_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C130 0x00000008  //DDRSS_PHY_76_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C134 0x00000401  //DDRSS_PHY_77_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C138 0x00000000  //DDRSS_PHY_78_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C13C 0x01CC0C01  //DDRSS_PHY_79_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C140 0x1003CC0C  //DDRSS_PHY_80_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C144 0x20000140  //DDRSS_PHY_81_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C148 0x07FF0200  //DDRSS_PHY_82_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C14C 0x0000DD01  //DDRSS_PHY_83_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C150 0x00100303  //DDRSS_PHY_84_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C154 0x00000000  //DDRSS_PHY_85_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C158 0x00000000  //DDRSS_PHY_86_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C15C 0x00021000  //DDRSS_PHY_87_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C160 0x00100010  //DDRSS_PHY_88_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C164 0x00100010  //DDRSS_PHY_89_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C168 0x00100010  //DDRSS_PHY_90_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C16C 0x00100010  //DDRSS_PHY_91_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C170 0x02000010  //DDRSS_PHY_92_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C174 0x00000003  //DDRSS_PHY_93_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C178 0x51516042  //DDRSS_PHY_94_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C17C 0x31C06000  //DDRSS_PHY_95_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C180 0x07800340  //DDRSS_PHY_96_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C184 0x00C0C000  //DDRSS_PHY_97_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C188 0x05000000  //DDRSS_PHY_98_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C18C 0x00050404  //DDRSS_PHY_99_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C190 0x42100010  //DDRSS_PHY_100_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C194 0x010C053E  //DDRSS_PHY_101_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C198 0x000F0C1D  //DDRSS_PHY_102_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C19C 0x01000140  //DDRSS_PHY_103_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1A0 0x007A0120  //DDRSS_PHY_104_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1A4 0x00000C00  //DDRSS_PHY_105_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1A8 0x000001CC  //DDRSS_PHY_106_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1AC 0x00030200  //DDRSS_PHY_107_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1B0 0x02800000  //DDRSS_PHY_108_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1B4 0x80800000  //DDRSS_PHY_109_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1B8 0x00052010  //DDRSS_PHY_110_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1BC 0x76543210  //DDRSS_PHY_111_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1C0 0x00000008  //DDRSS_PHY_112_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1C4 0x034C034C  //DDRSS_PHY_113_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1C8 0x034C034C  //DDRSS_PHY_114_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1CC 0x034C034C  //DDRSS_PHY_115_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1D0 0x034C034C  //DDRSS_PHY_116_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1D4 0x0000034C  //DDRSS_PHY_117_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1D8 0x00008000  //DDRSS_PHY_118_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1DC 0x00800080  //DDRSS_PHY_119_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1E0 0x00800080  //DDRSS_PHY_120_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1E4 0x00800080  //DDRSS_PHY_121_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1E8 0x00800080  //DDRSS_PHY_122_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1EC 0x00800080  //DDRSS_PHY_123_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1F0 0x00800080  //DDRSS_PHY_124_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1F4 0x00800080  //DDRSS_PHY_125_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1F8 0x00800080  //DDRSS_PHY_126_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C1FC 0x01800080  //DDRSS_PHY_127_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C200 0x01000000  //DDRSS_PHY_128_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C204 0x00000000  //DDRSS_PHY_129_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C208 0x00000000  //DDRSS_PHY_130_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C20C 0x00080200  //DDRSS_PHY_131_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C210 0x00000000  //DDRSS_PHY_132_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C214 0x20202020  //DDRSS_PHY_133_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C218 0x20202020  //DDRSS_PHY_134_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C21C 0xF0F02020  //DDRSS_PHY_135_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C220 0x00000000  //DDRSS_PHY_136_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C400 0x04F00000  //DDRSS_PHY_256_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C404 0x00000000  //DDRSS_PHY_257_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C408 0x00030200  //DDRSS_PHY_258_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C40C 0x00000000  //DDRSS_PHY_259_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C410 0x00000000  //DDRSS_PHY_260_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C414 0x01030000  //DDRSS_PHY_261_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C418 0x00010001  //DDRSS_PHY_262_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C41C 0x01030004  //DDRSS_PHY_263_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C420 0x01000000  //DDRSS_PHY_264_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C424 0x00000000  //DDRSS_PHY_265_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C428 0x00000000  //DDRSS_PHY_266_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C42C 0x02000000  //DDRSS_PHY_267_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C430 0x01010000  //DDRSS_PHY_268_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C434 0x00010000  //DDRSS_PHY_269_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C438 0x00C00001  //DDRSS_PHY_270_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C43C 0x00CC0008  //DDRSS_PHY_271_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C440 0x00660601  //DDRSS_PHY_272_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C444 0x00000003  //DDRSS_PHY_273_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C448 0x00000000  //DDRSS_PHY_274_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C44C 0x00000001  //DDRSS_PHY_275_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C450 0x0000AAAA  //DDRSS_PHY_276_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C454 0x00005555  //DDRSS_PHY_277_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C458 0x0000B5B5  //DDRSS_PHY_278_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C45C 0x00004A4A  //DDRSS_PHY_279_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C460 0x00005656  //DDRSS_PHY_280_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C464 0x0000A9A9  //DDRSS_PHY_281_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C468 0x0000B7B7  //DDRSS_PHY_282_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C46C 0x00004848  //DDRSS_PHY_283_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C470 0x00000000  //DDRSS_PHY_284_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C474 0x00000000  //DDRSS_PHY_285_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C478 0x08000000  //DDRSS_PHY_286_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C47C 0x0F000008  //DDRSS_PHY_287_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C480 0x00000F0F  //DDRSS_PHY_288_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C484 0x00E4E400  //DDRSS_PHY_289_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C488 0x00071020  //DDRSS_PHY_290_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C48C 0x000C0020  //DDRSS_PHY_291_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C490 0x00062000  //DDRSS_PHY_292_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C494 0x00000000  //DDRSS_PHY_293_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C498 0x55555555  //DDRSS_PHY_294_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C49C 0xAAAAAAAA  //DDRSS_PHY_295_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4A0 0x55555555  //DDRSS_PHY_296_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4A4 0xAAAAAAAA  //DDRSS_PHY_297_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4A8 0x00005555  //DDRSS_PHY_298_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4AC 0x01000100  //DDRSS_PHY_299_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4B0 0x00800180  //DDRSS_PHY_300_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4B4 0x00000000  //DDRSS_PHY_301_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4B8 0x00100000  //DDRSS_PHY_302_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4BC 0x00000000  //DDRSS_PHY_303_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4C0 0x0008000F  //DDRSS_PHY_304_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4C4 0x00000000  //DDRSS_PHY_305_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4C8 0x00000000  //DDRSS_PHY_306_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4CC 0x0000027C  //DDRSS_PHY_307_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4D0 0x00041DFF  //DDRSS_PHY_308_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4D4 0x00000000  //DDRSS_PHY_309_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4D8 0x00000001  //DDRSS_PHY_310_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4DC 0x00000000  //DDRSS_PHY_311_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4E0 0x000000B0  //DDRSS_PHY_312_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4E4 0x00000000  //DDRSS_PHY_313_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4E8 0x00000000  //DDRSS_PHY_314_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4EC 0x0C000000  //DDRSS_PHY_315_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4F0 0x07FF07FF  //DDRSS_PHY_316_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4F4 0x00000000  //DDRSS_PHY_317_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4F8 0x000007F0  //DDRSS_PHY_318_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C4FC 0x00000000  //DDRSS_PHY_319_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C500 0x00000000  //DDRSS_PHY_320_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C504 0x00000000  //DDRSS_PHY_321_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C508 0x00000000  //DDRSS_PHY_322_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C50C 0x00000004  //DDRSS_PHY_323_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C510 0x00000000  //DDRSS_PHY_324_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C514 0x00000000  //DDRSS_PHY_325_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C518 0x00000000  //DDRSS_PHY_326_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C51C 0x00000000  //DDRSS_PHY_327_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C520 0x00000000  //DDRSS_PHY_328_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C524 0x00000000  //DDRSS_PHY_329_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C528 0x081F07FF  //DDRSS_PHY_330_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C52C 0x10200080  //DDRSS_PHY_331_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C530 0x00000008  //DDRSS_PHY_332_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C534 0x00000401  //DDRSS_PHY_333_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C538 0x00000000  //DDRSS_PHY_334_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C53C 0x01CC0C01  //DDRSS_PHY_335_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C540 0x1003CC0C  //DDRSS_PHY_336_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C544 0x20000140  //DDRSS_PHY_337_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C548 0x07FF0200  //DDRSS_PHY_338_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C54C 0x0000DD01  //DDRSS_PHY_339_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C550 0x00100303  //DDRSS_PHY_340_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C554 0x00000000  //DDRSS_PHY_341_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C558 0x00000000  //DDRSS_PHY_342_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C55C 0x00021000  //DDRSS_PHY_343_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C560 0x00100010  //DDRSS_PHY_344_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C564 0x00100010  //DDRSS_PHY_345_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C568 0x00100010  //DDRSS_PHY_346_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C56C 0x00100010  //DDRSS_PHY_347_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C570 0x02000010  //DDRSS_PHY_348_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C574 0x00000003  //DDRSS_PHY_349_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C578 0x51516042  //DDRSS_PHY_350_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C57C 0x31C06000  //DDRSS_PHY_351_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C580 0x07800340  //DDRSS_PHY_352_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C584 0x00C0C000  //DDRSS_PHY_353_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C588 0x05000000  //DDRSS_PHY_354_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C58C 0x00050404  //DDRSS_PHY_355_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C590 0x42100010  //DDRSS_PHY_356_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C594 0x010C053E  //DDRSS_PHY_357_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C598 0x000F0C1D  //DDRSS_PHY_358_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C59C 0x01000140  //DDRSS_PHY_359_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5A0 0x007A0120  //DDRSS_PHY_360_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5A4 0x00000C00  //DDRSS_PHY_361_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5A8 0x000001CC  //DDRSS_PHY_362_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5AC 0x00030200  //DDRSS_PHY_363_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5B0 0x02800000  //DDRSS_PHY_364_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5B4 0x80800000  //DDRSS_PHY_365_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5B8 0x00052010  //DDRSS_PHY_366_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5BC 0x76543210  //DDRSS_PHY_367_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5C0 0x00000008  //DDRSS_PHY_368_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5C4 0x034C034C  //DDRSS_PHY_369_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5C8 0x034C034C  //DDRSS_PHY_370_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5CC 0x034C034C  //DDRSS_PHY_371_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5D0 0x034C034C  //DDRSS_PHY_372_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5D4 0x0000034C  //DDRSS_PHY_373_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5D8 0x00008000  //DDRSS_PHY_374_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5DC 0x00800080  //DDRSS_PHY_375_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5E0 0x00800080  //DDRSS_PHY_376_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5E4 0x00800080  //DDRSS_PHY_377_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5E8 0x00800080  //DDRSS_PHY_378_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5EC 0x00800080  //DDRSS_PHY_379_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5F0 0x00800080  //DDRSS_PHY_380_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5F4 0x00800080  //DDRSS_PHY_381_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5F8 0x00800080  //DDRSS_PHY_382_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C5FC 0x01800080  //DDRSS_PHY_383_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C600 0x01000000  //DDRSS_PHY_384_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C604 0x00000000  //DDRSS_PHY_385_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C608 0x00000000  //DDRSS_PHY_386_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C60C 0x00080200  //DDRSS_PHY_387_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C610 0x00000000  //DDRSS_PHY_388_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C614 0x20202020  //DDRSS_PHY_389_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C618 0x20202020  //DDRSS_PHY_390_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C61C 0xF0F02020  //DDRSS_PHY_391_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C620 0x00000000  //DDRSS_PHY_392_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C800 0x04F00000  //DDRSS_PHY_512_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C804 0x00000000  //DDRSS_PHY_513_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C808 0x00030200  //DDRSS_PHY_514_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C80C 0x00000000  //DDRSS_PHY_515_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C810 0x00000000  //DDRSS_PHY_516_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C814 0x01030000  //DDRSS_PHY_517_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C818 0x00010001  //DDRSS_PHY_518_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C81C 0x01030004  //DDRSS_PHY_519_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C820 0x01000000  //DDRSS_PHY_520_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C824 0x00000000  //DDRSS_PHY_521_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C828 0x00000000  //DDRSS_PHY_522_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C82C 0x03200000  //DDRSS_PHY_523_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C830 0x01010000  //DDRSS_PHY_524_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C834 0x00010000  //DDRSS_PHY_525_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C838 0x00C00001  //DDRSS_PHY_526_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C83C 0x00CC0008  //DDRSS_PHY_527_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C840 0x00660601  //DDRSS_PHY_528_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C844 0x00000003  //DDRSS_PHY_529_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C848 0x00000000  //DDRSS_PHY_530_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C84C 0x00000001  //DDRSS_PHY_531_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C850 0x0000AAAA  //DDRSS_PHY_532_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C854 0x00005555  //DDRSS_PHY_533_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C858 0x0000B5B5  //DDRSS_PHY_534_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C85C 0x00004A4A  //DDRSS_PHY_535_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C860 0x00005656  //DDRSS_PHY_536_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C864 0x0000A9A9  //DDRSS_PHY_537_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C868 0x0000B7B7  //DDRSS_PHY_538_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C86C 0x00004848  //DDRSS_PHY_539_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C870 0x00000000  //DDRSS_PHY_540_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C874 0x00000000  //DDRSS_PHY_541_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C878 0x08000000  //DDRSS_PHY_542_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C87C 0x0F000008  //DDRSS_PHY_543_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C880 0x00000F0F  //DDRSS_PHY_544_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C884 0x00E4E400  //DDRSS_PHY_545_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C888 0x00071020  //DDRSS_PHY_546_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C88C 0x000C0020  //DDRSS_PHY_547_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C890 0x00062000  //DDRSS_PHY_548_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C894 0x00000000  //DDRSS_PHY_549_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C898 0x55555555  //DDRSS_PHY_550_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C89C 0xAAAAAAAA  //DDRSS_PHY_551_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8A0 0x55555555  //DDRSS_PHY_552_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8A4 0xAAAAAAAA  //DDRSS_PHY_553_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8A8 0x00005555  //DDRSS_PHY_554_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8AC 0x01000100  //DDRSS_PHY_555_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8B0 0x00800180  //DDRSS_PHY_556_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8B4 0x00000001  //DDRSS_PHY_557_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8B8 0x00100000  //DDRSS_PHY_558_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8BC 0x00000000  //DDRSS_PHY_559_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8C0 0x0008000F  //DDRSS_PHY_560_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8C4 0x00000000  //DDRSS_PHY_561_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8C8 0x00000000  //DDRSS_PHY_562_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8CC 0x0000027C  //DDRSS_PHY_563_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8D0 0x00041DFF  //DDRSS_PHY_564_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8D4 0x00000000  //DDRSS_PHY_565_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8D8 0x00000001  //DDRSS_PHY_566_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8DC 0x00000000  //DDRSS_PHY_567_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8E0 0x000000B0  //DDRSS_PHY_568_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8E4 0x00000000  //DDRSS_PHY_569_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8E8 0x00000000  //DDRSS_PHY_570_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8EC 0x0C000000  //DDRSS_PHY_571_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8F0 0x07FF07FF  //DDRSS_PHY_572_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8F4 0x00000000  //DDRSS_PHY_573_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8F8 0x000007F0  //DDRSS_PHY_574_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C8FC 0x00000000  //DDRSS_PHY_575_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C900 0x00000000  //DDRSS_PHY_576_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C904 0x00000000  //DDRSS_PHY_577_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C908 0x00000000  //DDRSS_PHY_578_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C90C 0x00000004  //DDRSS_PHY_579_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C910 0x00000000  //DDRSS_PHY_580_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C914 0x00000000  //DDRSS_PHY_581_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C918 0x00000000  //DDRSS_PHY_582_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C91C 0x00000000  //DDRSS_PHY_583_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C920 0x00000000  //DDRSS_PHY_584_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C924 0x00000000  //DDRSS_PHY_585_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C928 0x081F07FF  //DDRSS_PHY_586_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C92C 0x10200080  //DDRSS_PHY_587_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C930 0x00000008  //DDRSS_PHY_588_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C934 0x00000401  //DDRSS_PHY_589_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C938 0x00000000  //DDRSS_PHY_590_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C93C 0x01CC0C01  //DDRSS_PHY_591_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C940 0x1003CC0C  //DDRSS_PHY_592_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C944 0x20000140  //DDRSS_PHY_593_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C948 0x07FF0200  //DDRSS_PHY_594_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C94C 0x0000DD01  //DDRSS_PHY_595_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C950 0x00100303  //DDRSS_PHY_596_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C954 0x00000000  //DDRSS_PHY_597_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C958 0x00000000  //DDRSS_PHY_598_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C95C 0x00021000  //DDRSS_PHY_599_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C960 0x00100010  //DDRSS_PHY_600_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C964 0x00100010  //DDRSS_PHY_601_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C968 0x00100010  //DDRSS_PHY_602_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C96C 0x00100010  //DDRSS_PHY_603_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C970 0x02000010  //DDRSS_PHY_604_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C974 0x00000003  //DDRSS_PHY_605_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C978 0x51516042  //DDRSS_PHY_606_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C97C 0x31C06000  //DDRSS_PHY_607_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C980 0x07800340  //DDRSS_PHY_608_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C984 0x00C0C000  //DDRSS_PHY_609_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C988 0x05000000  //DDRSS_PHY_610_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C98C 0x00050404  //DDRSS_PHY_611_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C990 0x42100010  //DDRSS_PHY_612_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C994 0x010C053E  //DDRSS_PHY_613_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C998 0x000F0C1D  //DDRSS_PHY_614_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C99C 0x01000140  //DDRSS_PHY_615_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9A0 0x007A0120  //DDRSS_PHY_616_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9A4 0x00000C00  //DDRSS_PHY_617_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9A8 0x000001CC  //DDRSS_PHY_618_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9AC 0x00030200  //DDRSS_PHY_619_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9B0 0x02800000  //DDRSS_PHY_620_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9B4 0x80800000  //DDRSS_PHY_621_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9B8 0x00052010  //DDRSS_PHY_622_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9BC 0x76543210  //DDRSS_PHY_623_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9C0 0x00000008  //DDRSS_PHY_624_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9C4 0x034C034C  //DDRSS_PHY_625_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9C8 0x034C034C  //DDRSS_PHY_626_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9CC 0x034C034C  //DDRSS_PHY_627_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9D0 0x034C034C  //DDRSS_PHY_628_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9D4 0x0000034C  //DDRSS_PHY_629_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9D8 0x00008000  //DDRSS_PHY_630_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9DC 0x00800080  //DDRSS_PHY_631_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9E0 0x00800080  //DDRSS_PHY_632_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9E4 0x00800080  //DDRSS_PHY_633_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9E8 0x00800080  //DDRSS_PHY_634_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9EC 0x00800080  //DDRSS_PHY_635_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9F0 0x00800080  //DDRSS_PHY_636_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9F4 0x00800080  //DDRSS_PHY_637_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9F8 0x00800080  //DDRSS_PHY_638_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30C9FC 0x01800080  //DDRSS_PHY_639_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA00 0x01000000  //DDRSS_PHY_640_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA04 0x00000000  //DDRSS_PHY_641_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA08 0x00000000  //DDRSS_PHY_642_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA0C 0x00080200  //DDRSS_PHY_643_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA10 0x00000000  //DDRSS_PHY_644_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA14 0x20202020  //DDRSS_PHY_645_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA18 0x20202020  //DDRSS_PHY_646_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA1C 0xF0F02020  //DDRSS_PHY_647_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CA20 0x00000000  //DDRSS_PHY_648_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC00 0x04F00000  //DDRSS_PHY_768_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC04 0x00000000  //DDRSS_PHY_769_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC08 0x00030200  //DDRSS_PHY_770_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC0C 0x00000000  //DDRSS_PHY_771_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC10 0x00000000  //DDRSS_PHY_772_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC14 0x01030000  //DDRSS_PHY_773_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC18 0x00010001  //DDRSS_PHY_774_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC1C 0x01030004  //DDRSS_PHY_775_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC20 0x01000000  //DDRSS_PHY_776_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC24 0x00000000  //DDRSS_PHY_777_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC28 0x00000000  //DDRSS_PHY_778_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC2C 0x06800000  //DDRSS_PHY_779_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC30 0x01010000  //DDRSS_PHY_780_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC34 0x00010000  //DDRSS_PHY_781_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC38 0x00C00001  //DDRSS_PHY_782_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC3C 0x00CC0008  //DDRSS_PHY_783_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC40 0x00660601  //DDRSS_PHY_784_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC44 0x00000003  //DDRSS_PHY_785_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC48 0x00000000  //DDRSS_PHY_786_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC4C 0x00000001  //DDRSS_PHY_787_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC50 0x0000AAAA  //DDRSS_PHY_788_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC54 0x00005555  //DDRSS_PHY_789_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC58 0x0000B5B5  //DDRSS_PHY_790_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC5C 0x00004A4A  //DDRSS_PHY_791_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC60 0x00005656  //DDRSS_PHY_792_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC64 0x0000A9A9  //DDRSS_PHY_793_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC68 0x0000B7B7  //DDRSS_PHY_794_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC6C 0x00004848  //DDRSS_PHY_795_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC70 0x00000000  //DDRSS_PHY_796_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC74 0x00000000  //DDRSS_PHY_797_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC78 0x08000000  //DDRSS_PHY_798_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC7C 0x0F000008  //DDRSS_PHY_799_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC80 0x00000F0F  //DDRSS_PHY_800_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC84 0x00E4E400  //DDRSS_PHY_801_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC88 0x00071020  //DDRSS_PHY_802_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC8C 0x000C0020  //DDRSS_PHY_803_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC90 0x00062000  //DDRSS_PHY_804_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC94 0x00000000  //DDRSS_PHY_805_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC98 0x55555555  //DDRSS_PHY_806_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CC9C 0xAAAAAAAA  //DDRSS_PHY_807_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCA0 0x55555555  //DDRSS_PHY_808_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCA4 0xAAAAAAAA  //DDRSS_PHY_809_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCA8 0x00005555  //DDRSS_PHY_810_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCAC 0x01000100  //DDRSS_PHY_811_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCB0 0x00800180  //DDRSS_PHY_812_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCB4 0x00000000  //DDRSS_PHY_813_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCB8 0x00100000  //DDRSS_PHY_814_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCBC 0x00000000  //DDRSS_PHY_815_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCC0 0x0008000F  //DDRSS_PHY_816_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCC4 0x00000000  //DDRSS_PHY_817_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCC8 0x00000000  //DDRSS_PHY_818_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCCC 0x0000027C  //DDRSS_PHY_819_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCD0 0x00041DFF  //DDRSS_PHY_820_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCD4 0x00000000  //DDRSS_PHY_821_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCD8 0x00000001  //DDRSS_PHY_822_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCDC 0x00000000  //DDRSS_PHY_823_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCE0 0x000000B0  //DDRSS_PHY_824_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCE4 0x00000000  //DDRSS_PHY_825_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCE8 0x00000000  //DDRSS_PHY_826_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCEC 0x0C000000  //DDRSS_PHY_827_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCF0 0x07FF07FF  //DDRSS_PHY_828_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCF4 0x00000000  //DDRSS_PHY_829_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCF8 0x000007F0  //DDRSS_PHY_830_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CCFC 0x00000000  //DDRSS_PHY_831_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD00 0x00000000  //DDRSS_PHY_832_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD04 0x00000000  //DDRSS_PHY_833_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD08 0x00000000  //DDRSS_PHY_834_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD0C 0x00000004  //DDRSS_PHY_835_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD10 0x00000000  //DDRSS_PHY_836_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD14 0x00000000  //DDRSS_PHY_837_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD18 0x00000000  //DDRSS_PHY_838_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD1C 0x00000000  //DDRSS_PHY_839_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD20 0x00000000  //DDRSS_PHY_840_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD24 0x00000000  //DDRSS_PHY_841_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD28 0x081F07FF  //DDRSS_PHY_842_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD2C 0x10200080  //DDRSS_PHY_843_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD30 0x00000008  //DDRSS_PHY_844_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD34 0x00000401  //DDRSS_PHY_845_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD38 0x00000000  //DDRSS_PHY_846_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD3C 0x01CC0C01  //DDRSS_PHY_847_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD40 0x1003CC0C  //DDRSS_PHY_848_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD44 0x20000140  //DDRSS_PHY_849_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD48 0x07FF0200  //DDRSS_PHY_850_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD4C 0x0000DD01  //DDRSS_PHY_851_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD50 0x00100303  //DDRSS_PHY_852_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD54 0x00000000  //DDRSS_PHY_853_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD58 0x00000000  //DDRSS_PHY_854_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD5C 0x00021000  //DDRSS_PHY_855_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD60 0x00100010  //DDRSS_PHY_856_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD64 0x00100010  //DDRSS_PHY_857_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD68 0x00100010  //DDRSS_PHY_858_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD6C 0x00100010  //DDRSS_PHY_859_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD70 0x02000010  //DDRSS_PHY_860_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD74 0x00000003  //DDRSS_PHY_861_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD78 0x51516042  //DDRSS_PHY_862_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD7C 0x31C06000  //DDRSS_PHY_863_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD80 0x07800340  //DDRSS_PHY_864_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD84 0x00C0C000  //DDRSS_PHY_865_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD88 0x05000000  //DDRSS_PHY_866_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD8C 0x00050404  //DDRSS_PHY_867_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD90 0x42100010  //DDRSS_PHY_868_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD94 0x010C053E  //DDRSS_PHY_869_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD98 0x000F0C1D  //DDRSS_PHY_870_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CD9C 0x01000140  //DDRSS_PHY_871_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDA0 0x007A0120  //DDRSS_PHY_872_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDA4 0x00000C00  //DDRSS_PHY_873_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDA8 0x000001CC  //DDRSS_PHY_874_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDAC 0x00030200  //DDRSS_PHY_875_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDB0 0x02800000  //DDRSS_PHY_876_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDB4 0x80800000  //DDRSS_PHY_877_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDB8 0x00052010  //DDRSS_PHY_878_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDBC 0x76543210  //DDRSS_PHY_879_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDC0 0x00000008  //DDRSS_PHY_880_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDC4 0x034C034C  //DDRSS_PHY_881_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDC8 0x034C034C  //DDRSS_PHY_882_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDCC 0x034C034C  //DDRSS_PHY_883_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDD0 0x034C034C  //DDRSS_PHY_884_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDD4 0x0000034C  //DDRSS_PHY_885_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDD8 0x00008000  //DDRSS_PHY_886_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDDC 0x00800080  //DDRSS_PHY_887_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDE0 0x00800080  //DDRSS_PHY_888_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDE4 0x00800080  //DDRSS_PHY_889_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDE8 0x00800080  //DDRSS_PHY_890_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDEC 0x00800080  //DDRSS_PHY_891_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDF0 0x00800080  //DDRSS_PHY_892_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDF4 0x00800080  //DDRSS_PHY_893_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDF8 0x00800080  //DDRSS_PHY_894_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CDFC 0x01800080  //DDRSS_PHY_895_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE00 0x01000000  //DDRSS_PHY_896_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE04 0x00000000  //DDRSS_PHY_897_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE08 0x00000000  //DDRSS_PHY_898_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE0C 0x00080200  //DDRSS_PHY_899_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE10 0x00000000  //DDRSS_PHY_900_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE14 0x20202020  //DDRSS_PHY_901_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE18 0x20202020  //DDRSS_PHY_902_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE1C 0xF0F02020  //DDRSS_PHY_903_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30CE20 0x00000000  //DDRSS_PHY_904_DATA_F2_R1
WKUP_R5FSS0_0: GEL Output: 0x0F30D000 0x00000000  //DDRSS_PHY_1024_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D004 0x00001000  //DDRSS_PHY_1025_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D008 0x00080000  //DDRSS_PHY_1026_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D00C 0x00000000  //DDRSS_PHY_1027_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D010 0x00000000  //DDRSS_PHY_1028_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D014 0x00000100  //DDRSS_PHY_1029_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D018 0x00000200  //DDRSS_PHY_1030_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D01C 0x00000000  //DDRSS_PHY_1031_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D020 0x00000000  //DDRSS_PHY_1032_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D024 0x00000000  //DDRSS_PHY_1033_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D028 0x00000000  //DDRSS_PHY_1034_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D02C 0x00400000  //DDRSS_PHY_1035_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D030 0x00000080  //DDRSS_PHY_1036_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D034 0x00DCBA98  //DDRSS_PHY_1037_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D038 0x03000000  //DDRSS_PHY_1038_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D03C 0x00200000  //DDRSS_PHY_1039_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D040 0x00000000  //DDRSS_PHY_1040_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D044 0x21C0040C  //DDRSS_PHY_1041_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D048 0x21C80405  //DDRSS_PHY_1042_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D04C 0x4000A030  //DDRSS_PHY_1043_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D050 0x000001A0  //DDRSS_PHY_1044_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D054 0x0000002A  //DDRSS_PHY_1045_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D058 0x00000015  //DDRSS_PHY_1046_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D05C 0x00000015  //DDRSS_PHY_1047_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D060 0x0000002A  //DDRSS_PHY_1048_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D064 0x00000033  //DDRSS_PHY_1049_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D068 0x0000000C  //DDRSS_PHY_1050_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D06C 0x0000000C  //DDRSS_PHY_1051_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D070 0x00000033  //DDRSS_PHY_1052_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D074 0x0A418820  //DDRSS_PHY_1053_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D078 0x003F0000  //DDRSS_PHY_1054_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D07C 0x000F013F  //DDRSS_PHY_1055_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D080 0x20202003  //DDRSS_PHY_1056_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D084 0x00202020  //DDRSS_PHY_1057_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D088 0x20008008  //DDRSS_PHY_1058_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D08C 0x00000810  //DDRSS_PHY_1059_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D090 0x00000F00  //DDRSS_PHY_1060_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D094 0x000203CC  //DDRSS_PHY_1061_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D098 0x00000002  //DDRSS_PHY_1062_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D09C 0x00000000  //DDRSS_PHY_1063_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0A0 0x00000000  //DDRSS_PHY_1064_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0A4 0x00000000  //DDRSS_PHY_1065_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0A8 0x00000000  //DDRSS_PHY_1066_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0AC 0x00000000  //DDRSS_PHY_1067_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0B0 0x42080010  //DDRSS_PHY_1068_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0B4 0x0000803E  //DDRSS_PHY_1069_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0B8 0x00000001  //DDRSS_PHY_1070_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0BC 0x01000002  //DDRSS_PHY_1071_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30D0C0 0x00008000  //DDRSS_PHY_1072_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC00 0x00000000  //DDRSS_PHY_1792_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC04 0x00010100  //DDRSS_PHY_1793_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC08 0x00000000  //DDRSS_PHY_1794_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC0C 0x00000000  //DDRSS_PHY_1795_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC10 0x00000000  //DDRSS_PHY_1796_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC14 0x00000000  //DDRSS_PHY_1797_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC18 0x00050000  //DDRSS_PHY_1798_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC1C 0x04000000  //DDRSS_PHY_1799_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC20 0x00000055  //DDRSS_PHY_1800_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC24 0x00000000  //DDRSS_PHY_1801_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC28 0x03940202  //DDRSS_PHY_1802_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC2C 0x22C00000  //DDRSS_PHY_1803_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC30 0x00000000  //DDRSS_PHY_1804_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC34 0x00002001  //DDRSS_PHY_1805_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC38 0x00004003  //DDRSS_PHY_1806_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC3C 0x50020028  //DDRSS_PHY_1807_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC40 0x01010000  //DDRSS_PHY_1808_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC44 0x80080001  //DDRSS_PHY_1809_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC48 0x10200000  //DDRSS_PHY_1810_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC4C 0x00000008  //DDRSS_PHY_1811_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC50 0x00000000  //DDRSS_PHY_1812_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC54 0x06000000  //DDRSS_PHY_1813_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC58 0x010F0F0E  //DDRSS_PHY_1814_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC5C 0x00040101  //DDRSS_PHY_1815_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC60 0x0000010F  //DDRSS_PHY_1816_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC64 0x20125770  //DDRSS_PHY_1817_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC68 0x00000064  //DDRSS_PHY_1818_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC6C 0x00000000  //DDRSS_PHY_1819_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC70 0x00000000  //DDRSS_PHY_1820_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC74 0x0F0F0F01  //DDRSS_PHY_1821_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC78 0x0F0F0F02  //DDRSS_PHY_1822_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC7C 0x0F0F0F0F  //DDRSS_PHY_1823_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC80 0x0F0F0804  //DDRSS_PHY_1824_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC84 0x00800120  //DDRSS_PHY_1825_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC88 0x00041B42  //DDRSS_PHY_1826_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC8C 0x00004201  //DDRSS_PHY_1827_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC90 0x00000003  //DDRSS_PHY_1828_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC94 0x00000000  //DDRSS_PHY_1829_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC98 0x00000000  //DDRSS_PHY_1830_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DC9C 0x00000003  //DDRSS_PHY_1831_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCA0 0x00000000  //DDRSS_PHY_1832_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCA4 0x00000000  //DDRSS_PHY_1833_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCA8 0x03010100  //DDRSS_PHY_1834_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCAC 0x00540007  //DDRSS_PHY_1835_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCB0 0x000040A2  //DDRSS_PHY_1836_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCB4 0x000365D5  //DDRSS_PHY_1837_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCB8 0x000165D5  //DDRSS_PHY_1838_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCBC 0x000165D5  //DDRSS_PHY_1839_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCC0 0x000165D5  //DDRSS_PHY_1840_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCC4 0x000165D5  //DDRSS_PHY_1841_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCC8 0x000165D5  //DDRSS_PHY_1842_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCCC 0x0001691E  //DDRSS_PHY_1843_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCD0 0x0001691E  //DDRSS_PHY_1844_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCD4 0x000165D5  //DDRSS_PHY_1845_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCD8 0x000165D5  //DDRSS_PHY_1846_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCDC 0x00000000  //DDRSS_PHY_1847_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCE0 0x00000076  //DDRSS_PHY_1848_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCE4 0x00000400  //DDRSS_PHY_1849_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCE8 0x00000008  //DDRSS_PHY_1850_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCEC 0x008165D5  //DDRSS_PHY_1851_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCF0 0x0081691E  //DDRSS_PHY_1852_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCF4 0x00165D50  //DDRSS_PHY_1853_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCF8 0x001691E8  //DDRSS_PHY_1854_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DCFC 0x00F65D5F  //DDRSS_PHY_1855_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD00 0x03F691EF  //DDRSS_PHY_1856_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD04 0x00000000  //DDRSS_PHY_1857_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD08 0x00000000  //DDRSS_PHY_1858_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD0C 0xB3000000  //DDRSS_PHY_1859_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD10 0x04102006  //DDRSS_PHY_1860_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD14 0x00041020  //DDRSS_PHY_1861_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD18 0x01C98C98  //DDRSS_PHY_1862_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD1C 0x3F400000  //DDRSS_PHY_1863_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD20 0x3F3F1F3F  //DDRSS_PHY_1864_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD24 0x0000001F  //DDRSS_PHY_1865_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD28 0x00000000  //DDRSS_PHY_1866_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD2C 0x00000000  //DDRSS_PHY_1867_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD30 0x00000000  //DDRSS_PHY_1868_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD34 0x00000001  //DDRSS_PHY_1869_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD38 0x00000000  //DDRSS_PHY_1870_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD3C 0x00000000  //DDRSS_PHY_1871_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD40 0x00000000  //DDRSS_PHY_1872_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD44 0x00000000  //DDRSS_PHY_1873_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD48 0x76543210  //DDRSS_PHY_1874_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD4C 0x06010198  //DDRSS_PHY_1875_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD50 0x00000000  //DDRSS_PHY_1876_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD54 0x00000000  //DDRSS_PHY_1877_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD58 0x00000000  //DDRSS_PHY_1878_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD5C 0x00040700  //DDRSS_PHY_1879_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD60 0x00000000  //DDRSS_PHY_1880_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD64 0x0003357C  //DDRSS_PHY_1881_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD68 0x00032CD8  //DDRSS_PHY_1882_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD6C 0x000333F6  //DDRSS_PHY_1883_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD70 0x000310C1  //DDRSS_PHY_1884_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD74 0x0F0F1102  //DDRSS_PHY_1885_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD78 0x00000000  //DDRSS_PHY_1886_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD7C 0x00000000  //DDRSS_PHY_1887_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD80 0x0001F7C2  //DDRSS_PHY_1888_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD84 0x02000002  //DDRSS_PHY_1889_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD88 0x00000000  //DDRSS_PHY_1890_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD8C 0x00001142  //DDRSS_PHY_1891_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD90 0x01020000  //DDRSS_PHY_1892_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD94 0x00000080  //DDRSS_PHY_1893_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD98 0x030002CB  //DDRSS_PHY_1894_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DD9C 0x03000300  //DDRSS_PHY_1895_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDA0 0x03000300  //DDRSS_PHY_1896_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDA4 0x03000300  //DDRSS_PHY_1897_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDA8 0x03000300  //DDRSS_PHY_1898_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDAC 0x03000300  //DDRSS_PHY_1899_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDB0 0x000002CC  //DDRSS_PHY_1900_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDB4 0x00000300  //DDRSS_PHY_1901_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDB8 0x00000300  //DDRSS_PHY_1902_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDBC 0x00000300  //DDRSS_PHY_1903_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDC0 0x00000003  //DDRSS_PHY_1904_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDC4 0x3183BF77  //DDRSS_PHY_1905_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDC8 0x00000000  //DDRSS_PHY_1906_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDCC 0x0C000DFF  //DDRSS_PHY_1907_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDD0 0x30000DFF  //DDRSS_PHY_1908_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDD4 0x3F0DFF11  //DDRSS_PHY_1909_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDD8 0x00EF0000  //DDRSS_PHY_1910_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDDC 0x780DFFCC  //DDRSS_PHY_1911_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDE0 0x00000C11  //DDRSS_PHY_1912_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDE4 0x00018011  //DDRSS_PHY_1913_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDE8 0x0089FF00  //DDRSS_PHY_1914_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDEC 0x000C3F11  //DDRSS_PHY_1915_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDF0 0x01990000  //DDRSS_PHY_1916_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDF4 0x000C3F91  //DDRSS_PHY_1917_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDF8 0x01990000  //DDRSS_PHY_1918_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DDFC 0x3F0DFF11  //DDRSS_PHY_1919_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DE00 0x00EF0000  //DDRSS_PHY_1920_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DE04 0x00018011  //DDRSS_PHY_1921_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DE08 0x0089FF00  //DDRSS_PHY_1922_DATA_F2
WKUP_R5FSS0_0: GEL Output: 0x0F30DE0C 0x20040004  //DDRSS_PHY_1923_DATA_F2

Does this point to any particular cause?

0 Lucas Bowe over 1 year ago in reply to Evan

TI__Expert 5425 points

Greetings Evan,

Tag teaming with James here, the logs seem to indicate that the training is failing very early on; one of the first trainings that are done by the DDRSS is CA and CS training and those are both returning failures.

Can we scope the Power Ramp (so Ta to Tb in JEDEC) and the Reset (Tb to Tc ) portions for the DRAM on the board? I'd like to double check both against the JEDEC spec (Voltage Ramp and Device Initialization section).

Voltage Ramp main items:
- VDD1 always greater than VDD2, VDD2 always greater than VDDQ -200mV
- Ramp sequence takes less than 20ms
- VDD1 = 1.8V , VDD2 = 1.1 V, VDDQ = 1.1V
Reset main items:
- Reset low for at least 200 us after power supplies have ramped
- At least 10ns before reset goes high, CKE goes low

In parallel we're trying to get around the training at a slow speed, this is not the normal operation so it's taking some effort to work around get it running.

Sincerely,

Lucas

0 Evan over 1 year ago in reply to Lucas Bowe

Prodigy 111 points

Hi Lucas, thanks for the help.

Here is the ramp of VDD1 and VDD2, VDD1 > VDD2 and the ramp takes about 1ms.

VDDQ pins are tied to VDD2.

The reset apparently is released after 500ms. CKE0 is already low at that time.

0 Lucas Bowe over 1 year ago in reply to Evan

TI__Expert 5425 points

Hey Evan,

Thank you for the scope shots, the power up and reset sequence looks good. We're still working on the slow speed config to bypass training but it's still taking some time.

Sincerely,

Lucas

0 Evan over 1 year ago in reply to Lucas Bowe

Prodigy 111 points

Hi Lucas, checking again some details of the layout I have noticed that the time for the CK pair propagation is calculated to be faster than that for the DQS pairs, by up to 10 picoseconds. Might this be the cause of the problem, why training fails altogether?

0 Lucas Bowe over 1 year ago in reply to Evan

TI__Expert 5425 points

Hey Evan,

That skew should be okay, though you should be sure those results come from simulation from the SoC die pad to the package pin of the DRAM and not the layout tool estimation. (info here in table 2-7 Data Group Routing Specifications) https://www.ti.com/lit/an/sprad66a/sprad66a.pdf

Couple of things we want to double check:

Can you supply the die revision for the MT53E1G32D2FW-046 part? Is it :A or :B, or :C? This would determine if it's a dual rank/dual channel device or single rank/dual channel device, our EVM for AM62A should use rev :B parts.
How closely did you follow the EVM layout/schematic? Can you send your schematics/layout (not sure if done in e-mail, but I didn't see it on this ticket)?

Sincerely,

Lucas

0 Evan over 1 year ago in reply to Lucas Bowe

Prodigy 111 points

Hi Lucas,

Here's the part number derived from the package code.

FBGA Code	Part Number
D9ZQX	MT53E1G32D2FW-046 WT:A

The datasheet does not really explain what the :B design revision" means, but it is a "D2" device meaning 2 die. It's the wrong part?

The EVM layout is not directly copied due to space, and also because the PCB stackup could not be matched precisely (in terms of properties of available PCB material) so resulting traces would be slightly different widths. I'm looking into how we could adopt the tracking more closely for a respin. Is there an email I can send the current design to?

" simulation from the SoC die pad to the package pin of the DRAM and not the layout tool estimation"

-> OK. The concern I have is that the package delays shown in appendix 4 I don't think were present when the layout was done, so not taken into account in the length matching. This must be making the skew worse.

+1 Lucas Bowe over 1 year ago in reply to Evan

TI__Expert 5425 points

Hey Evan,

The big difference I'm aware of between the :B and :A device is the number of ranks; for the same model number MT53E1G32D2FW-046 , the :A is a single rank dual channel device, while the :B revision is a dual rank dual channel device. I believe the :A revision will be EoL soon, our SKEVM has the :B revision. The datasheets seem to be broken on the Micron website for some reason, but they're listed as two separate devices with unique datasheets (or so I was told).

I've attached a DDR configuration gel (and the sycsonfig file) for the same memory on our board but for a single rank, can you give that a try on your board?AM62Ax_single_rank_medtronic_3200MTs.gelhttps://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/AM62Ax_5F00_single_5F00_rank_5F00_medtronic_5F00_3200MTs.syscfg

Sincerely,

Lucas

0 Evan over 1 year ago in reply to Lucas Bowe

Prodigy 111 points

Hi Lucas,

This worked! At least we go further in the boot process now, so memory access is happening at some speed.

[edit: moved to new thread]

Thanks again for your help and patience!

0 JJD over 1 year ago in reply to Evan

TI__Guru* 86060 points

Evan, please start another thread for this

Thanks,

James