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Questions about the edma3 device

Kevin the almighty
Intellectual 780 points

Is it possible to manually set up transfers outside of the LLD?

Does wince 6 have a ACPY function?

I stole this code from somewhere and can't get it to work aaargh

 

VOID Edma3Init()

{

RETAILMSG(TRUE, (TEXT("DEVICE_EDMA3Init+\r\n")));

 

 

// following init lines from http://processors.wiki.ti.com/index.php/Programming_EDMA_without_EDMA3LLD_package

EDMA30->QUEPRI = 0x10;

EDMA30->QWMTHRA =(16<<8u)|(16 & 0xFF);

EDMA30->QEMCR =  0xFFFFFFFF;

EDMA30->IECR =  0xFFFFFFFF;

EDMA30->ICR =  0xFFFFFFFF;

EDMA30->CCERRCLR = 0xFFFFFFFF;

  EDMA30->QDMAQNUM=0x0;

 

 

// step 1. set up parameters in PARAM0

EDMA3PARAM0->OPT = 0x0010000c; // AB sync, static, TCC=0

EDMA3PARAM0->SRC_DST_BIDX = ACNT << 16; // set DST BIDX = ACNT, SRC = 0

EDMA3PARAM0->LINK_BCNTRLD = 0xffff; // null link address

EDMA3PARAM0->SRC_DST_CIDX = 0;

EDMA3PARAM0->CCNT = 1;

EDMA30->QCHMAP[0] = 3 << 2; // QDMA0 mapped to PARAM0, trigger on DST reg update

EDMA30->QEESR = 1; // enable events for QDMA0

 

RETAILMSG(TRUE, (TEXT("DEVICE_EDMA3Init-\r\n")));

}

 

// QDMA function using AB sync transfer

VOID NandEdmaRead(UINT8 *src, UINT8 *pDest, UINT32 numBytes)

{

UINT32 numB = numBytes / ACNT;

RETAILMSG(TRUE, (TEXT("LOCAL_QDMA_from_NAND+\r\n")));

// step 1. set source register

EDMA3PARAM0->SRC = (UINT32) src;

// step 2. set count

EDMA3PARAM0->A_B_CNT = ACNT | (numB << 16); 

 

// step 3. set destination address

// also triggers QDMA transfer

EDMA3PARAM0->DST = (UINT32) pDest;

// step 4. wait until QDMA finished, TCC 0

// wait for the nand chip to finish

EDMA30->ESR = 1;

// check the edma30 register

while (0 == (EDMA30->IPR & 1));

// step 4a. clear TCC 0

EDMA30->ICR = 1;

RETAILMSG(TRUE, (TEXT("LOCAL_QDMA_from_NAND-\r\n")));

}

  • 0
    TI__Guru 54382 points

    Yes, it's possible to setup EDMA transfers outside of the LLD.  I'm not sure if wince has an EDMA ACPY type function ... my guess is it does not, but that's a guess. 

    Why don't you want to use the EDMA LLD?

    I don't see anything very obviously wrong with the code?  Does the data not transfer?  Does the interrupt not get set?  Can you visually check the values in PaRAM and the various registers using CCS that things are set the way you expect?

    One observation is you seem to be combining EDMA channels and QDMA channel concepts. I.e., the write to ESR (event set register) will trigger EDMA Channel 0 which seems redundant since you triggered QDMA Ch0 with the write to the DST param entry.  I would recommend just using EDMA channels as a starting point. There's no real downside to this compared to QDMA. Just make sure you're not using channels in use elsewhere in the system.  Also, verify that the EMR and SER registers are not set.  That represents an error condition that would need to be cleared before a channel can operate.

    There are a couple of other options/examples . 

    For very low level interaction (similar to what you're doing), you can reference the following examples:

    http://processors.wiki.ti.com/index.php/QuickStartOMAPL1x_rCSL

    The EDMA_manual_trig may help.

    Alternatively, you can reference the Starterware package which provides higher level set of APIs and examples:

    www.ti.com/starterware

     

    Regards
    Kyle

     

     

  • 0 in reply to kcastille
    Intellectual 780 points

    Thanks!

    Though I'm thinking this problem isn't what I think it is. I was able to get the UBL to load EBOOT from nand using DMA, only in the debugger. After building it and and running it through AIS gen, the UBL no longer works reading the nand with DMA.

     

    Same code, different outcome. Is it possible the debugger is initializing more than the code? I was using CCS5 to connect and run the arm ubl code.

  • 0 in reply to Kevin the almighty
    TI__Guru 54382 points

    By debugger I assume you mean CCS?

    CCS will execute the GEL file OnTargetConnect() function when connecting.  This normally sets up a lot of device specific configuration (i.e., it does a lot more than just load code)

    Regards

    Kyle

  • 0 in reply to kcastille
    Intellectual 780 points

    yes, any idea what specifically i need other then the EDMA turned on through the psc to get DMA to work?

  • 0 in reply to Kevin the almighty
    TI__Genius 17355 points

    In theory, enabling the EDMA via the LPSC should be all you need to do.  If that doesn't seem to work, then I suggest you make sure you follow all available documentation on how to initialize the EDMA and review what steps the GEL file takes to see if you can identify what it does differently.

    Regards, Daniel

  • 0 in reply to Daniel Allred
    Intellectual 780 points

    What about finding specifics in a fix? The bsp seems to have a change that may imply it wasn't working with 1.00.00 which is what we are using. I stumbled on that while seeing if they fixed something else. I can't use the bsp because we heavily modifed ours, at least in the parts where it matters.

     

    This is in AM1x_OMAPL13x_WinCE_6.0_BSP_Release_Notes.pdf

    Issues resolved in release 01.00.01:

    SDOCM00070760 – NAND - DMA support in bootloader is not working

  • 0 in reply to Kevin the almighty
    TI__Genius 17355 points

    I'm not at all familiar with the WinCE SDK, but the item you mention in the release notes certainly sounds suspicious.  If possible, I would suggest doing a diff between the two SDKs to see if you can spot the code differences that would represent this fix.

    Regards, Daniel