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AM625: Power Sleep Controller and PMIC settings

Part Number: AM625
Other Parts Discussed in Thread: TPS65219,

Hi Team,

They have a few questions related to low power mode below:

  1. Is their understanding correct that low power mode can be implemented with just configuring the power sleep controller (PCS) and keeping the power pin high?
  2. Is there any settings required on the PMIC side?
    1. Are the PMIC TPS65219 registers (STBY_1_CONFIG、STBY_2_CONFIG) related to low power mode? What is the stby setting for?

Best regards,

Mari Tsunoda

  • Hi Mari,

    Thank You for using E2E. We will review the request and provide an update within 24Hrs.

    Thanks,

    Brenda

  • Hi Mari,

    The low power modes on the AM625 (13x13mm ALW package) require all the PMIC rails to be either ALL ON or ALL OFF. None of the low power modes require the TPS65219 PMIC rails to be partially ON.  

    • If customer is interested in implementing the Partial IO low power mode on the AM62x processor, they can just drive the EN pin of the PMIC with the PMIC_LPM_EN0 signal from the processor. Please note, this would require the PMIC EN/PB/VSENSE pin to be configured as "ENABLE" in the default register settings.  

    • If customer is interested in using any of the low power modes where internal supplies on the processor are turned OFF but all the PMIC rails stay ON, they could drive the MODE/STBY pin of the PMIC with the PMIC_LPM_EN0 signal from the processor. This helps to change the Bucks switching mode from forced-PWM to auto-PFM.

    • The Standby state of the TPS65219 PMIC is typically not used for AM62x applications. This state is only used for applications that require some of the PMIC rails to stay ON while the remaining are OFF.

    Please submit a separate E2E to the Sitara processor forum if you have any questions or need additional information to implement the AM62x low power modes. 

    Thanks,

    Brenda