[FAQ] TDA4VM: How to generate QNX A72 GPIO interrupt using SW10 on TDA4VM EVM

Yes, GPIO0_0 can be driven by SW10 to generate an interrupt to the A72  on the TDA4VM.  Below patch and steps modify the GPIO example code in the PSDK QNX release, to allow  push button, SW10 on the EVM, to be create an interrupt which is then handled by QNX on the A72.

This patch has been tested on the PSDK QNX 9.1 release

• PROCESSOR-SDK-QNX-J721E Software development kit (SDK) | TI.com

Using the TDA4VM EVM

• https://www.ti.com/tool/J721EXCPXEVM
• https://www.ti.com/tool/J721EXSOMXEVM

Below steps assume that user has installed and built the PSDK QNX 9.1 release, and has a functional SD card already created.  The steps are all covered in the SDK QNX link above.

Patch Install Steps:

Create environment variable PSDKQA_PATH, to be that of the psdkqa directory in your installation

• export PSDKQA_PATH=<PSDK_RTOS_INSTALL_PATH>/psdkqa

Download patch:

• /cfs-file/__key/communityserver-discussions-components-files/791/tda4vm_2D00_sdk91_2D00_gpio.patch

Install patch

• cp tda4vm-sdk91-gpio.patch ${PSDKQA_PATH}/qnx
• cd ${PSDKQA_PATH}/qnx
• patch -p1 < ./tda4vm-sdk91-gpio.patch

Copy over some additional header files from the SDK RTOS PDK Installation

• mkdir -p ${PSDKQA_PATH}/pdk/packages/ti/drv/gpio/soc/
• mkdir -p ${PSDKQA_PATH}/pdk/packages/ti/drv/gpio/src/v0
• cp ${PSDKQA_PATH}/../pdk_jacinto_09_01_00_22/packages/ti/drv/gpio/soc/GPIO_soc.h ${PSDKQA_PATH}/pdk/packages/ti/drv/gpio/soc/GPIO_soc.h
• cp ${PSDKQA_PATH}/../pdk_jacinto_09_01_00_22/packages/ti/drv/gpio/GPIO.h ${PSDKQA_PATH}/pdk/packages/ti/drv/gpio/
• cp ${PSDKQA_PATH}/../pdk_jacinto_09_01_00_22/packages/ti/drv/gpio/src/v0/GPIO_v0.h ${PSDKQA_PATH}/pdk/packages/ti/drv/gpio/src/v0

Build Updated gpio binary

• cd ${PSDKQA_PATH}/qnx
• make examples

Copy gpio binary to SD card:

• cp ${PSDKQA_PATH}/qnx/examples/gpio/aarch64/o.le/gpio /media/${USERNAME}/qnxfs/tibin/gpio

For help/usage of gpio example code, type below on target:

•  use gpio

To test SW10

•   k3conf write 0x0011c000 0x40007
•   gpio -m0 -n0 -a392 -i -r1 &
• <Press SW 10>

Expected Output

Why is Interrupt 392 specified?

GPIO interrupt routing / mapping information is available in the TDA4VM TRM. 

• www.ti.com/.../spruil1

GPIO0 to GPIMUX_INTRTR0

Below TRM screenshot indicates that there is a bank level interrupt for GPIO_0, that is going to GPIO_MUX_INTRTR0 (see block diagram).  Any GPIO interrupt on GPIO0 would trigger this bank level interrupt.  It is up to the interrupt handler to differentiate the particular interrupts from the GPIO bank and deal with the status bits accordingly.

The accompanying TRM table give the particular input port on the GPIO_MUX_INTRTR0 , GPIO0_INTR0_IN_256 (see table).  

GPIOMUX_INTR0

The input port to the GPIOMUX_INTRTR0 for GPIO0_0 is known from previous section to be 256.   This GPIO_INTRTRO_INP, instance must be programmed to an output port GPIOMUX_INTRTR0_OUTP.  This will create a path across the mux from input port to output port.   

Looking specifically how this interrupt could be routed to the A72 GIC, reference the table below, which shows that GPIO_MUX_INTR0_OUTP[63:8] can be mapped to GIC[447:392].  This table represents the available H/W mapping that the device has.   The TRM table does not account for any S/W resource management that may be occurring.

Summary

The path through the TDA4VM device that an interrupt on GPIO Bank 0 would take to signal an interrupt on GIC instance 392 is:

• Bank GPIO0[0] -> GPIO_INTRTR0_INP[256] -> GPIO_INTRTR0_OUTP[8] -> GIC[392]