• State TI Thinks Resolved
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 101 subscribers
  • Views 326 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM6442: Sw_reset

Berlam Karli
Intellectual 340 points

Part Number: AM6442

Hello,

When I want to reset with the CPU reset button via CCS, I cannot reinit due to the udma init. I can't pass the "udmainitRxCh" function. What should I do? Note: I am using 09.01 SDK version with Am64x hs-fs evm.

Thanks for your helps.

  • 0
    TI__Guru** 110030 points

    Hello Berlam,

    Which core or cores are you trying to reset?

    Without looking into it, I would suspect that the issue is caused because you are not gracefully shutting down the cores. That means the peripherals are never getting released, and so when the core tries to request the peripheral again on its next boot up, its request is denied.

    Please read the section titled "Graceful Shutdown" on this page. For now, you can ignore all the IPC information. Also, the AM64x academy has not been updated for SDK 9.1 yet. Starting in SDK 9.1, we DO support graceful shutdown from Linux. 

    https://dev.ti.com/tirex/explore/node?a=7qm9DIS__LATEST&node=A__AT0quqp1AZJ7z5jn1Ua5nQ__AM64-ACADEMY__WI1KRXP__LATEST 

    It looks like we haven't added documentation about AM64x graceful shutdown to the MCU+ SDK docs yet. I'll file a ticket to get that fixed. In the meantime, you can reference the documentation in the AM62x version of the SDK:
    https://software-dl.ti.com/mcu-plus-sdk/esd/AM62X/09_01_00_39/exports/docs/api_guide_am62x/GRACEFUL_REMOTECORE_SHUTDOWN.html

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Intellectual 340 points

    Hello Nick,

    I am trying to reset the r5f core with the other r5f core. Is there anyway to close drivers and deinit for one core from another core in case of one core crashed and could not closed its own peripherals gracefully and can not reinit because of that?

    For example r0-0 crashed and r0-1 deinit its peripherals and reset the r0-0 so r0-0 can reinit itself gracefully.

    Regards,

    Berlam

  • 0 in reply to Berlam Karli
    TI__Guru** 110030 points

    Hello Berlam,

    I am not aware of a way for one core to release another core's resources, but I'll pass your thread over to someone more familiar with MCU+ to confirm.

    From the Linux side, there are multiple reasons we don't let Linux just force a core to close if it hangs:
    1) If one core hangs it could often mean that something is wrong with the entire system, not just that core. Then the only real way to recover would be a processor reboot, not just resetting that one core
    2) Leaving the hanging core in its regular state allows developers to go in and inspect what might have gone wrong, review the logs, etc

    Regards,

    Nick

  • 0 in reply to Berlam Karli
    TI__Guru 54738 points
    Berlam Karli said:
    I am trying to reset the r5f core with the other r5f core. Is there anyway to close drivers and deinit for one core from another core in case of one core crashed and could not closed its own peripherals gracefully and can not reinit because of that?

    Hello Berlam,

    When one core is crashed and try to do the de-init the crashed core peripherals in another core are not possible.

    If the core is crashed, try to make the SOC Reset with the help of watchdog. So, that again crashed core peripherals can be initialized properly.

    AM64X device does not support individual core reset. Please tell me what is the use case here to better assist you .

    Actually, when you use any DMA channels in your application, the DMA channel allocation can be done through the SCI client. Now, when you hit the CPU reset button from CCS , your code will try to initialize the DMA channels. Here, SYSFW is allocated the DMA Channels before Reset the CPU, and again it tries to initialize the same channels then you may get this issue, but this problem will not come in SOC Warm Reset /POR .

    Regards,

    S.Anil.