SK-AM62A-LP: Watch OSPI NAND flash content in CCS

Hello,

May I ask what OS are you using- MCU+/RTOS or Linux? Additionally, what SDK version and Code Composer Studio version are you using? This way I can best refer you to the right expert for your inquiry.

-Daolin

Hello,

Currently I am using MCU but next steps will be also with Linux. 

The SDK is _09_01_00_39  and CCS 12.06

BR

Hello,

Ok, I have assigned you to our MCU+ expert on OSPI. Once they help you on the MCU+ side, if you still need help on the Linux side, feel free to submit another E2E inquiry.

-Daolin

Hello Pablo,

I am assuming by memory watcher you are referring to memory browser.

Can you explain more about what do you mean by watch OSPI nand flash content ?

You can also point me to a thread where you got a chance to work on this as I saw you were talking about other TI Microcontrollers.

Looking forward to your response.

Regards,

Vaibhav

Hello,

Vaibhav Kumar said:

I am assuming by memory watcher you are referring to memory browser.

Yes, sorry

Vaibhav Kumar said:

Can you explain more about what do you mean by watch OSPI nand flash content ?

Set memory browser to address memory layout of OSPI nand flash and see its content. TDA3 or TDA2E, configuring QSPI peripheral, system performed read operations automatically and I was able to see flash content

I have searched for a while about any communication that I could have had with TI about that in TDA2E/TDA3, but I did not find.

Let me share configurations needed in TDA2E/TDA3 to achive that (in this case is preparing in Lauterbach with commands). 

QSPI_SPI_SETUP0_REG = 0012376C (PER.Set.simple D:0x4B300054 %Long 0x0012376C)
QSPI_SPI_SWITCH_REG = 00000001 (PER.Set.simple D:0x4B300064 %Long 1)
CTRL_CORE_CONTROL_IO_2 = 00000101 --> (PER.Set.simple D:0x4A002558 %Long 0x101)

I think is related with access in memory  map and/OR SFI:

(from datasheet, chapter 24.5.4.1)

I don't know if something similar could be used in AM62A.

BR

Hello Pablo,

So lets consider a flow as follows.

Lets suppose we have some content ready to be flashed to the OSPI NAND flash part.

Now from your explanation above, I think you are asking how one can see the contents once its flashed to the part ?

So basically wanting to see from OSPI flash part itself.

Please correct my understanding if I am incorrect.

Looking forward to your response.

Regards,

Vaibhav

Correct, your understanding is correct

Vaibhav Kumar said:

So basically wanting to see from OSPI flash part itself.

I want to see flash memory in CCS memory browser.

BR

Hi Pablo,

I think this use case is covered.

Let me check this in context of the ospi_flash_io SDK example.

Here we are performing flash write and read operation to a certain flash offset.

Please allow me sometime to comment on this.

Regards,

Vaibhav

Thanks.let me know as soon as you receive info.

Hi Pablo,

Yes I will put out a response here once I have it working.

Regards,

Vaibhav

Hello. I am a little bit confused....

You said 

Vaibhav Kumar said:

I think this use case is covered.

Let me check this in context of the ospi_flash_io SDK example.

Here we are performing flash write and read operation to a certain flash offset.

Please allow me sometime to comment on this.

With this comment I understood you were looking for information

Vaibhav Kumar said:

Yes I will put out a response here once I have it working.

With this comment, I understand that this feature is not available and it will....

Please, I would appreciate you clarify better.

Thanks

Hi Pablo,

So we have a sample SDK example called ospi_flash_io, where we flash write some data to 0x200000 flash offset, and then read it back from the same offset that is 0x200000.

After this we compare the data and check if written == read data

So I meant to say that I am going to leverage this example and see if I can find a way to see flash contents from CCS memory browser.

I hope this clarifies.

Regards,

Vaibhav

Vaibhav Kumar said:

So we have a sample SDK example called ospi_flash_io, where we flash write some data to 0x200000 flash offset, and then read it back from the same offset that is 0x200000.

Yes. I have worked with it. It is working. 

The required feature does not depends on which applicaition is running. 

If SOC is booting from flash, we could see with this feature WHOLE content on flash using CCS. 

Please point to the feature that I am asking.

BR

Hello Pablo,

Please expect responses by next week.

Best Regards,

Vaibhav

Thanks.

Yes I have confirmed that with that example, the address shows the content of OSPI AFTER execution.

When you say:

Vaibhav Kumar said:

Note: 0x60000000 is not the address of the TX Buffer.

I understand that is a remapping and is not an effective flash . It is needed to perform a SW read to see the content in FSS

In TDA2/TDA3 that I worked before, in QSPI with SFI translator, QSPI commands are done properly to fill Memory browser in CCS with Flash effective content. There is no need to run Flash read from SW running in core.

Imagine that I want to reset the core, set a BP iin main and before making any erase/write operation I like to see the content. What could I do that? With your solution I see 0's because (I guess) is RAM initialized/BSS what I am seeing in 0x60000000.

Is there any mechanism to see the content of flash in that way?

Hello Pablo,

I understand your use case of being able to see flash contents from CCS memory browser, BEFORE writing to the flash.

So, it translates to seeing the initial value in the flash.

I am working on this.

You can expect updates by today.

Regards,

Vaibhav

Hello. 

I have never said that the use case is  to see flash content AFTER or BEFORE writing to the flash

Pablo Varela said:

Set memory browser to address memory layout of OSPI nand flash and see its content. TDA3 or TDA2E, configuring QSPI peripheral, system performed read operations automatically and I was able to see flash content

Pablo Varela said:

I want to see flash memory in CCS memory browser.

Pablo Varela said:

In order to check content on OSPI NAND I would like to have proper configuration to see it in Memory Watcher in Code Composer.

In my last comment, I showed you one use case that is not covered by your suggestion.

Pablo Varela said:

Imagine that I want to reset the core, set a BP iin main and before making any erase/write operation I like to see the content. What could I do that? With your solution I see 0's because (I guess) is RAM initialized/BSS what I am seeing in 0x60000000.

Sorry if I was not clear.

We want to see Flash content with no specific firmware running in any core. Just running proper GEL/cmm file would be enough.

Is this possible with OSPI_NAND-FSS-AM62A?

Pablo Varela said:

We want to see Flash content with no specific firmware running in any core. Just running proper GEL/cmm file would be enough.

Or maybe any CCS Script?

Hi Pablo,

Pablo Varela said:

We want to see Flash content with no specific firmware running in any core.

I understand this.

Please allow me sometime to check the possibility of this.

Regards,

Vaibhav

ok, thanks

Hello Pablo,

Please expect responses by today.

Regards,

Vaibhav

Good to know.

Thanks

Hi Pablo,

Can you tell me about the exact flash part.

I am assuming you are using W35N01JW.

Please correct my assumption.

Regards,

Vaibhav

Please, Vaibhav, look at the title of this long chain of ping-pong.

I was asking for one OPSI mounted in one Starter Kit provided by  Texas Instruments.

Are you going to provide a solution just for one specific device???I guess, the solution should be general for FSS and OSPI. 

Anyway, yes this is the device that is mounted in SK and what I am working on.

Hello Pablo,

I have checked this internally.

Pablo Varela said:

We want to see Flash content with no specific firmware running in any core.

This is not possible as direct memory mapping is missing.

Alternatively, page by page read operation can be possible, but that too by connecting onto the R cores. We would need to write an application in this scenario.

As far as Lauterbach is concerned we do not support it.

Regards,

Vaibhav

Thanks

Hi Pablo,

Vaibhav Kumar said:

Alternatively, page by page read operation can be possible, but that too by connecting onto the R cores. We would need to write an application in this scenario.

Please let us know if you need this, so that we can start working on it. But it comes at the cost of loading firmware to the R cores.

Regards,

Vaibhav