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AM620-Q1: Power-up/down timing

Part Number: AM620-Q1

Dear champs,

in the datasheet of the AM62x devices the timings are missing for the power-up/down sequence.

In the Chapters:

7.11.2.2.1 Power-Up Sequencing (Figure 7-5. Power-Up Sequencing)

7.11.2.2.2 Power-Down Sequencing (Figure 7-6. Power-Dow)

only the diagrams are shown but not the actual timing values. Can you please provide these?

Kind regards, one and zero

  • Hello one and zero,

    Thank you for the query.

    7.11.2.2.1 Power-Up Sequencing (Figure 7-5. Power-Up Sequencing)

    We do not have any time specified between 2 supplies except that the previous supply needs to be ramped and stable before the start of the next supply ramp. The sequence is required to be followed and is provided only to prevent potential differences.

    7.11.2.2.2 Power-Down Sequencing (Figure 7-6. Power-Dow)

    We do not have a ramp time specified for the power-down. The Power-down sequence is required to be followed.

    The supplies are expected to fall below 0.3 V before the start of next power-up sequence.

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    Thanks for your reply. One follow-up question: What up power-down off VMON_VSYS does this have the same restriction (The supplies are expected to fall below 0.3 V before the start of next power-up sequence)? I would suspect not since this is not a supply rail ...

    Am I correct?

    Thanks and kind regards,

    one and zero

  • Hello one and zero,

    Thank you for the query.

    I would suspect not since this is not a supply rail ...
    Am I correct?

    This is correct.

    Additionally, please note that VMON_VSYS is fail-safe meaning it does not have dependency on the SoC supply rails.

    Regards,

    Sreenivasa