TDA4VH-Q1: Memory cpu peripheral loads utilization using lauterbach

Dear TI Support,

We need to understand ddr memory utilization by different stack frames [sw modules] mipi, isp etc. Seems I am unable to do proper configurations in Lauterbach. Request your support for getting this done.

so we have memory map of rtos/dsp cores and want to see how much getting used out of it for our application. currently trying to log from mcu2_0 core. once it is done then will check for A72 side.  

Expectation:

1. Memory Utilization of each task and sub nodes in graph
2. CPU utilization , HW Peripheral Utilization in terms of Accelerators etc.

SDK Rtos Ver: 08.06.01.03

QNX+RTOS Mode

Profile: Debug

PRACTICE Script: 

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Basic CR5 connect for J784S4/TDA4VH
; 13 Apr 22 - Richard Woodruff - Adapt J721S2 for J784S4.
; 15 Jun 23 - Richard Woodruff - Add WIR release via DP
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; INPUT PARAMS: (R5-MCU, R5-MAIN0, R5-MAIN1, R5-MAIN2) + (SMP, AMP1, AMP2)
;   {default=R5-MCU,AMP1}
; note: when setting lockstep AMP1 should be used 

 LOCAL &emulation &dp
 &emulation="no"

 RESet
 SYStem.RESet
 area.create A000 100 1000
 area

 IF COMBIPROBE()||UTRACE()
    SYStem.CONFIG.CONNECTOR MIPI34 ; because of converter LA-3782

; CM4 (2x1)  : TDA4VH-CM4-0 TDA4VH-CM4-1
; A72 (2x4)  : TDA4VH (core.assign 1 2 3 4 5 6 7 8)
; CR5 (4x2)  : TDA4VH-CR5-MCU TDA4VH-CR5-MAIN0 TDA4VH-CR5-MAIN1 TDA4VH-CR5-MAIN2 (core.assign 1 2)
; C7x (4x1)  : TDA4VH-C71X (core.assign 1 2 3 4)

 ; Script parameters: clust, SMP or AMPx operation
 PRIVATE &parameters
 ENTRY %LINE &parameters
 &parameters=STRing.UPpeR("&parameters")
 &parameters="R5-MAIN0 SMP"

 LOCAL &param_core &param_smp &subnum &corenum

 &param_core=STRing.SCANAndExtract("&parameters","R5-","")
 IF "&param_core"=="MAIN0"
 (
    &corenum=13.
    SYStem.CPU TDA4VH-CR5-MAIN0
    &dp=0x348
 )
 ELSE IF "&param_core"=="MAIN1"
 (
    &corenum=15.
    SYStem.CPU TDA4VH-CR5-MAIN1
    &dp=0x350    
 )
 ELSE IF "&param_core"=="MAIN2"
 (
    &corenum=17.
    SYStem.CPU TDA4VH-CR5-MAIN2
    &dp=0x358    
 ) 
 ELSE
 (
    &corenum=11.
    SYStem.CPU TDA4VH-CR5-MCU
    &dp=0x33C    
 )

 &param_smp=(STRing.SCAN("&parameters","SMP",0)!=-1)
 IF !&param_smp
 (
   &param_core=STRing.SCANAndExtract("&parameters","AMP","")
   IF ("&param_core"=="")
     &subnum=1
   ELSE 
     &subnum=&param_core
 )

 IF &param_smp
    SYStem.CONFIG CORE &corenum 1.
 ELSE
    SYStem.CONFIG CORE (&corenum+&subnum-1) 1.

 IF "&emulation"=="yes"
 (
  System.CONFIG DEBUGTIMESCALE 32.
  System.Option MemStatusCheck ON
  SYStem.POLLING OFF
  setup.urate 2500.ms           ; slow window updates, this can be bigger
  SYStem.polling slow           ; sparse pinging
  ;SYStem.JTAGCLOCK rtck 70Khz  ; qt
  SYStem.JTAGCLOCK ctck 70Khz   ; zebu
 )
 ELSE
  system.JTAGCLOCK CTCK 25MHz

 SYStem.Option RESBREAK OFF
 SYStem.Option EnReset OFF

 IF &param_smp
     core.assign 1 2
 ELSE
   core.assign (&subnum)

 SYStem.MemAccess.DAP
 SYStem.Option.imaskasm.on
 SYStem.Option.IMASKHLL.ON

 TPIU.PortMode.Continuous
 IF !SIMULATOR()
 (
   trace.method onchip
   trace.TraceCONNECT.tbr3
   onchip.off
 )
 break.select program onchip
 break.select read onchip
 break.select write onchip

 SYStem.Mode Attach

 Data.LOAD.Elf "/home/c3/TDAH/ti-processor-sdk-rtos-j784s4-evm-08_06_01_03/vision_apps/out/J784S4/R5F/FREERTOS/debug/vx_app_rtos_qnx_mcu2_0.out" /NoCODE
  
 Data.Set EDP:&dp %Long 0yxxxxxxxxxxxxxx0000xxxxxxxxxxxxxx
 IF &param_smp
   Data.Set EDP:&dp+4 %Long 0yxxxxxxxxxxxxxx0000xxxxxxxxxxxxxx
 
 Break

ENDDO