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AM625: QSPI NAND connection

Part Number: AM625

Hi,

My customer is planning to use QSPI-NAND device in their system.
The system is boot-up from this QSPI-NAND. After boot-up, they want to access the QSPI-NAND with 100MHz clock.
There are multiple QSPI/OSPI data capture modes, but it is not clear what is maximum clock for each mode.
- PHY mode with reference clock (No loopback)
- PHY mode with internal PHY loopback
- PHY mode with Internal Pad loopback
- PHY mode with External Board loopback
- PHY mode with DQS (available only for OSPI)
- TAP mode

According to TRM section 5.4.1, it seems LBCLKO loopback is required to support high speed QSPI without DQS signal.

If so, No Loopback, Internal PHY Loopback or Internal Pad Loopback cannot be used for 100MHz normal operation?
Then External Board Loopback (Figure 9-2 in datasheet) must be used?



Thanks and regards,
Koichiro Tashiro