TMS320C6726B McSAP : AFSR in synchronous mode?

tsz said:

I'm using the C6726B DSP together with a couple of DACs and an ADC. For the DACs I use the ACLKX and AFSX pins and for the ADC the ACLKR and AFSR pins. I wish to run the DACs and ADC synchronous and have thus configured the McASP in synchronous mode. The transmit section works fine but the AFSR pin is quiet (it works fine as a GPIO).

In sync mode, the AFSR and ACLKR pins are not used.  The AFSX and ACLKX pins used by the transmitter and receiver of the McASP.

tsz said:

Is it necessary to use asynchronous mode when using the AFSR pin? Upon reexamining the McASP datasheet it seems likely to be the case although I don't find it explicitly stated.

Yes.

tsz said:

If I configure the transmit and receive sections with the same clock settings (and asynchronous mode) and start them at the same time is it safe to assume they will be synchronous and that the AFSR and the AFSX will be in phase?

I'm assuming you are referring to internal clock and frame generation.  Technically you could enable the frame and clock signals for both transmitter and receiver with a single write to the GBLCTL register.  This should make both frames and both clocks start at the same time.  I presume that if you measure both pairs of signals on a scope they will look the same.  However, there is no data sheet timing that guarantees there will be 0 ns delay between each pair of signals and there probably will be some small ns delay.  So I think the answer will depend on exactly what you mean by "in phase".

Thanks for your answer Guz!

Looks like I have to use asynchronous mode then..

I understand that there can be a slight delay between the signals but it would be nice if the frame sync signals are within a clock period (ACLKR/X). The main thing is that I can handle both the receiver and transmitter in the same dMAX-interrupt.

Regards,

 Tobias